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November 2013
FDP18N20F / FDPF18N20FT
TM
®
N-Channel UniFET
FRFET MOSFET
200 V, 18 A, 140 m
Ω
Features
Description
•
•
•
•
•
R
DS(on)
= 120 m
Ω
(Typ.) @ V
GS
= 10
V
,
I
D
= 9 A
Low Gate Charge (Typ. 20 nC)
Low C
rss
(Typ. 24 pF)
UniFET
TM
MOSFET is Fairchild Semiconductor’s high voltage
MOSFET family based on planar stripe and DMOS technology.
This MOSFET is tailored to reduce on-state resistance, and to
provide better switching performance and higher avalanche
energy strength. The body diode’s reverse recovery perfor-
mance of UniFET FRFET
®
MOSFET has been enhanced by
lifetime control. Its t
rr
is less than 100nsec and the reverse dv/dt
immunity is 15V/ns while normal planar MOSFE
T
s
h
ave over
200nsec and 4.5V/nsec respectively. Therefore, it can remove
additional component and improve system reliability in certain
applications in which the performance of MOSFET’s body diode
is significant. This device family is suitable for switching power
converter applications such as power factor correction (PFC),
flat panel display (FPD) TV power, ATX and electronic lamp bal-
lasts.
100% Avalanche Tested
RoHS Compliant
Applications
•
•
•
•
•
LCD/LED TV
Consumer Appliances
Lighting
Uninterruptible Power Supply
AC-DC Power Supply
D
G
G
D
S
G
D
TO-220
TO-220F
S
S
MOSFET Maximum Ratings
T
C
= 25
o
C unless otherwise noted.
Symbol
V
DSS
V
GSS
Parameter
FDP18N20F FDPF18N20FT
Unit
V
Drain to Source Voltage
Gate to Source Voltage
200
±30
V
– Continuous (T
C
= 25
o
C)
– Continuous (T
C
= 100
o
C)
– P
u l s e d
18
10.8
72
18*
10.8*
72*
I
D
D r a in C u r r e n t
D r a i n C u r r e n t
A
I
DM
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
A
mJ
A
E
AS
I
AR
Single Pulsed Avalanche Energy
Avalanche Current
324
18
E
AR
dv/dt
Repetitive Avalanche Energy
10
mJ
V/ns
W
W/
o
C
o
C
Peak Diode Recovery dv/dt
4.5
(T
C
= 25
o
C)
– Derate Above 25
o
C
Operating and Storage
T
e
mperature Range
Maximum Lead
T
e
mperature for Soldering, 1/8” from Case for 5 Seconds
100
41
P
D
Power Dissipation
0.83
0.33
T
J
, T
STG
T
L
-55 to +150
300
o
C
*Drain current limited by maximum junction temperature.
Thermal Characteristics
Symbol
R
θ
JC
R
θ
JA
Parameter
FDP18N20F FDPF18N20FT
Unit
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
1.2
3.0
o
C/W
62.5
62.5
©2009 Fairchild Semiconductor Corporation
FDP18N20F / FDPF18N20FT Rev. C1
1
Package Marking and Ordering Information
Part Number
FDP18N20F
Top Mark
FDP18N20F
FDPF18N20FT
Package
TO-220
Packing Method
Tube
Reel Size
N/A
Tape Width
N/A
Quantity
50 units
50 units
TO-220F
Tube
N/A
N/A
FDPF18N20FT
Electrical Characteristics
T
C
= 25
o
C unless otherwise noted.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Off Characteristics
BV
DSS
Drain to Source Breakdown Voltage
I
D
= 250
μ
A, V
GS
= 0 V, T
J
= 25
o
C
D
= 250
μ
A, Referenced to 25
o
C
DS
= 200 V, V
GS
= 0 V
200
–
–
–
–
V
Δ
BV
DSS
/
Δ
T
J
Breakdown Voltage
T
e
mperature
Coefficient
I
0.2
V/
o
C
V
–
–
–
–
–
–
10
I
DSS
I
GSS
Zero Gate Voltage Drain Current
Gate to Body Leakage Current
μ
A
V
DS
= 160 V, T
C
= 125
o
C
100
V
GS
= ±30 V, V
DS
= 0 V
±100
nA
On Characteristics
V
GS(th)
R
DS(on)
g
FS
Gate Threshold Voltage
V
GS
= V
DS
, I
D
= 250
μ
A
V
GS
= 10 V, I
D
= 9 A
V
DS
= 20
V
,
I
D
= 9 A
3.0
–
5.0
0.14
–
V
Ω
S
Static Drain to Source On Resistance
Forward Transconductance
–
–
0.12
13.6
Dynamic Characteristics
C
iss
Input Capacitance
–
–
–
–
–
–
885
200
24
20
5
1180
270
35
26
–
pF
pF
pF
nC
nC
nC
V
DS
= 25 V, V
GS
= 0 V,
f = 1 MHz
C
oss
C
rss
Q
g(tot)
Q
gs
Output Capacitance
Reverse Transfer Capacitance
T
o
tal Gate Charge at 10V
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
V
V
DS
= 160 V, I
D
= 18 A,
GS
= 10 V
(Note 4)
Q
gd
9
–
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
–
–
–
–
16
50
50
40
40
110
110
90
ns
ns
ns
ns
V
DD
= 100 V, I
D
= 18 A,
GS
= 10 V, R
G
= 25
Ω
V
(Note 4)
Drain-Source Diode Characteristics
I
S
Maximum Continuous Drain to Source Diode Forward Current
Maximum Pulsed Drain to Source Diode Forward Current
–
–
–
–
–
–
–
18
72
1.5
–
A
A
I
SM
V
SD
t
rr
Drain to Source Diode Forward Voltage
Reverse Recovery Time
V
GS
= 0 V, I
SD
= 18 A
–
V
80
240
ns
nC
V
GS
= 0 V, I
SD
= 18 A,
dI
F
/dt = 100 A/
μ
s
Q
rr
Reverse Recovery Charge
–
Notes:
1. Repetitive rating: pulse-width limited by maximum junction temperature.
2. L = 2 mH, I
= 18 A, V
= 50
V
, R
= 2 5
Ω
, starting T
= 25
°
C.
AS
DD
G
J
3. I
≤
18 A, di/dt
≤
200 A/
μ
s, V
≤
BV
, starting T
= 25
°
C.
SD
DD
DSS
J
4. Essentially independent of operating temperature typical characteristics.
©2009 Fairchild Semiconductor Corporation
FDP18N20F / FDPF18N20FT Rev. C1
2
Typical Performance Characteristics
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
50
30
V
GS
=
10.0V
8.0 V
7.0 V
6.5 V
6.0 V
150
o
C
10
5.5 V
10
25
o
C
*Notes:
1. 250
μ
s Pulse Test
2. T
C
= 25
o
C
*Notes:
1. V
DS
= 20V
1
2. 250
μ
s Pulse Test
1
0.1
1
10
4
5
6
7
V
DS
,Drain-Source Voltage[V]
V
GS
,Gate-Source Voltage[V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
0.25
100
150
o
C
0.20
25
o
C
V
GS
= 10V
10
V
GS
= 20V
0.15
0.10
*Notes:
1. V
GS
= 0V
*Note: T
J
= 25
o
C
2. 250
μ
s Pulse Test
1
0.0
0
10
20
30
40
50
0.4
0.8
1.2
1.6
2.0
I
D
, Drain Current [A]
V
SD
, Body Diode Forward Voltage [V]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
10
2000
C
C
C
= C
+ C
(
C =
shorted
)
gs gd
ds
iss
V
DS
= 40V
V
DS
= 100V
= C
+ C
ds gd
oss
rss
= C
gd
8
6
4
2
0
V
DS
= 160V
1500
1000
500
0
*Note:
1. V
GS
= 0V
2. f = 1MHz
C
iss
C
oss
C
rss
*Note: I
D
= 18A
18
0
6
12
24
0.1
1
10
30
Q
g
, Total Gate Charge [nC]
V
DS
, Drain-Source Voltage [V]
©2009 Fairchild Semiconductor Corporation
FDP18N20F / FDPF18N20FT Rev. C1
3
Typical Performance Characteristics
(Continued)
Figure 7. Breakdown Voltage Variation
Figure 8-1. Maximum Safe Operating Area
– FDP18N20F
vs. Temperature
100
1.2
20
μ
s
100
μ
s
10
1.1
1.0
1ms
Operation in This Area
is Limited by R
DS(on)
10ms
1
DC
*Notes:
0.1
0.9
1. T
C
= 25
o
C
*Notes:
1. V
GS
= 0V
2. I
D
= 250
μ
A
2. T
J
= 150
o
C
3. Single Pulse
0.01
0.8
-100
600
1
10
100
-50
T
J
, Junction Temperature [
o
C
1
]
50
0
50
100
200
V
DS
, Drain-Source Voltage [V]
Figure 8-2. Maximum Safe Operating Area
– FDPF18N20FT
Figure 9. Maximum Drain Current
vs. Case Temperature
20
100
10
μ
s
100
μ
s
16
12
8
10
1ms
Operation in This Area
10ms
is Limited by R
DS(on)
1
DC
*Notes:
1. T
C
= 25
o
C
4
0.1
2. T
J
= 150
o
C
3. Single Pulse
0
25
50
75
100
125
150
0.01
T
C
, Case Temperature
[
o
C
]
600
1
10
100
V
DS
, Drain-Source Voltage [V]
Figure 10-1. Transient Thermal Response Curve – FDP18N20F
2
1
0.5
0.2
0.1
0.1
P
DM
0.05
t
1
0.02
0.01
t
2
*Notes:
1. Z
θ
JC
(t) = 1.2
o
C/W Max.
2. Duty Factor, D= t
1
/t
2
3. T
JM
– T
C
= P
DM
* Z
θ
JC
(t)
Single pulse
0.01
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
2
Rectangular Pulse Duration [sec]
t ,
Rectangular Pulse Duration [sec]
1
©2009 Fairchild Semiconductor Corporation
FDP18N20F / FDPF18N20FT Rev. C1
4
Figure 10-2. Transient Thermal Response Curve – FDPF18N20FT
2
0.5
1
0.2
0.1
0.05
P
DM
0.1
0.02
t
1
t
2
0.01
*Notes:
1. Z
θ
JC
(t) = 3.0
o
C/W Max.
2. Duty Factor, D= t
1
/t
2
3. T
JM
– T
C
= P
DM
* Z
θ
JC
(t)
Single pulse
0.01
10
-5
10
-4
10
-3
1
10
-2
10
-1
10
0
10
1
10
2
Rectangular Pulse Duration [sec]
t ,
Rectangular Pulse Duration [sec]
©2009 Fairchild Semiconductor Corporation
FDP18N20F / FDPF18N20FT Rev. C1
5
I
= const.
G
Figure 11. Gate Charge Test Circuit & Waveform
R
L
V
DS
90%
V
DS
V
DD
V
GS
R
G
10%
V
GS
DUT
V
GS
t
d(on)
t
r
t
d(off)
t
f
t
on
t
off
Figure 12. Resistive Switching Test Circuit & Waveforms
V
GS
Figure 13. Unclamped Inductive Switching Test Circuit & Waveforms
©2009 Fairchild Semiconductor Corporation
FDP18N20F / FDPF18N20FT Rev. C1
6
+
DUT
V
DS
_
I
SD
L
Driver
R
G
Same Type
as DUT
V
DD
V
GS
• dv/dt controlled by
R
G
• I
SD
controlled by pulse period
Gate Pulse Width
————————–
V
GS
D =
Gate Pulse Period
10V
( Driver )
I
FM
, Body Diode Forward Current
I
SD
di/dt
( DUT )
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
SD
V
DS
( DUT )
V
DD
Body Diode
Forward Voltage Drop
Figure 14. Peak Diode Recovery dv/dt Test Circuit & Waveforms
©2009 Fairchild Semiconductor Corporation
FDP18N20F / FDPF18N20FT Rev. C1
7
Mechanical Dimensions
Figure 15. TO220, Molded, 3-Lead, Jedec Variation AB
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-
ically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
©2009 Fairchild Semiconductor Corporation
FDP18N20F / FDPF18N20FT Rev. C1
8
Mechanical Dimensions
Figure 16. TO220, Molded, 3-Lead, Full Pack, EIAJ SC91, Straight Lead
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-
ically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
©2009 Fairchild Semiconductor Corporation
FDP18N20F / FDPF18N20FT Rev. C1
9
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
intended to be an exhaustive list of all such trademarks.
AccuPower™
AX-CAP *
BitSiC™
Build it Now™
CorePLUS™
CorePOWER™
CROSSVOLT
™
CTL™
F-PFS™
FRFET
Sync-Lock™
®*
®
®
®
tm
®
Global Power Resource
SM
GreenBridge™
Green FPS™
PowerTrench
PowerXS™
Programmable Active Droop™
QFET
QS™
Quiet Series™
RapidConfigure™
™
®
TinyBoost
TinyBuck
®
®
Green FPS™ e-Series™
G
max
™
GTO™
TinyCalc™
®
TinyLogic
TINYOPTO™
TinyPower™
TinyPWM™
TinyWire™
TranSiC™
TriFault Detect™
Current Transfer Logic™
IntelliMAX™
®
DEUXPEED
ISOPLANAR™
Marking Small Speakers Sound Louder
and Better™
MegaBuck™
MICROCOUPLER™
MicroFET™
MicroPak™
MicroPak2™
MillerDrive™
MotionMax™
Dual Cool™
®
EcoSPARK
Saving our world, 1mW/W/kW at a time™
SignalWise™
SmartMax™
EfficentMax™
ESBC™
®
TRUECURRENT *
μ
SerDes™
SMART START™
®
Solutions for Your Success™
®
®
SPM
Fairchild
®
STEALTH™
SuperFET
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
Fairchild Semiconductor
FACT Quiet Series™
®
®
UHC
®
Ultra FRFET™
UniFET™
VCX™
VisualMax™
VoltagePlus™
XS™
®
mWSaver
OptoHiT™
OPTOLOGIC
OPTOPLANAR
FACT
FAST
®
®
FastvCore™
FETBench™
FPS™
®
®
SupreMOS
SyncFET™
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY
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THEREIN, WHICH COVERS THESE PRODUCTS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
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As used here in:
1. Life
support devices or systems are devices or systems which, (a) are
intended for surgical implant into the body or (b) support or sustain life,
and (c) whose failure to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably
expected to result in a significant injury of the user.
2. A
critical component in any component of a life support, device, or
system whose failure to perform can be reasonably expected to cause
the failure of the life support device or system, or to affect its safety or
effectiveness.
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Advance Information
Formative / In Design
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
Preliminary
First Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
No Identification Needed
Obsolete
Full Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Not In Production
Rev. I66
©2009 Fairchild Semiconductor Corporation
FDP18N20F / FDPF18N20FT Rev. C1
10
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
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PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMEN
T
:
N. American Technical Support
: 800
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282
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9855
T
o
ll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
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Phone: 81
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3
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5817
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1050
Literature Distribution Center for ON Semiconductor
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA
Phone
: 303
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675
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2175 or 800
−
344
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3860
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o
ll Free USA/Canada
Fax
: 303
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675
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2176 or 800
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344
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3867
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Email
: orderlit@onsemi.com
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