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FDP2D3N10C / FDPF2D3N10C
N-Channel Shielded Gate PowerTrench
®
MOSFET
100 V, 222 A, 2.3 m
Ω
Features
General Description
This N-Channel MV MOSFET is produced using ON
Semiconductor’s advanced PowerTrench
®
process that
incorporates Shielded Gate technology. This process has been
optimized to minimize on-state resistance and yet maintain
superior switching performance with best in class soft body
diode.
Max r
DS(on)
= 2.3 m
Ω
at V
GS
= 10 V, I
D
= 100 A
Extremely Low Reverse Recovery Charge, Qrr
100% UIL
T
e
sted
RoHS Compliant
Applications
Synchronous Rectification for ATX / Server / Telecom PSU
Motor drives and Uninterruptible Power Supplies
Micro Solar Inverter
D
G
G
G
D
S
D
S
S
TO-220
TO-220F
MOSFET Maximum Ratings
T
C
= 25 °C unless otherwise noted.
Ratings
Symbol
Parameter
Units
FDP2D3N10C
FDPF2D3N10C
V
DS
V
GS
Drain to Source Voltage
Gate to Source Voltage
100
±20
100
±20
V
V
Drain Current
-Continuous
-Continuous
T
C
= 25°C
(Note 3)
(Note 3)
(Note 1)
(Note 2)
222*
157*
888
222*
157*
888
I
D
T
C
= 100°C
A
-Pulsed
E
AS
Single Pulse Avalanche Energy
Power Dissipation
Power Dissipation
1176
mJ
W
T
C
= 25°C
T
A
= 25°C
214
2.4
45
P
D
2.4
T
J
, T
STG
Operating and Storage Junction
T
e
mperature Range
-55 to +175
°C
* Drain current limited by maximum junction temperature. Package limitation current is 120A.
Thermal Characteristics
Symbol
R
θ
JC
R
θ
JA
Parameter
FDP2D3N10C
FDPF2D3N10C
Units
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
0.7
3.3
°C/W
62.5
62.5
Package Marking and Ordering Information
Device Marking
FDP2D3N10C
FDPF2D3N10C
Device
Package
Packing Method
Tube
Quantity
FDP2D3N10C
FDPF2D3N10C
TO-220
50 units
50 units
TO-220F
Tube
Semiconductor Components Industries, LLC, 2017
March, 2017, Rev. 1.0
Publication Order Number:
FDP2D3N10C / FDPF2D3N10C/D
1
Electrical Characteristics
T
J
= 25 °C unless otherwise noted.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
Off Characteristics
BV
DSS
Drain to Source Breakdown Voltage
I
D
= 250
μ
A, V
GS
= 0 V
100
V
Δ
BV
DSS
Δ
T
J
Breakdown Voltage
T
e
mperature
Coefficient
I
D
= 250
μ
A, referenced to 25 °C
70
mV/°C
V
DS
= 80 V, V
GS
= 0 V
1
μ
A
μ
A
nA
I
DSS
I
GSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
DS
= 80 V, T
J
= 150°C
V
GS
= ±20 V, V
DS
= 0 V
500
±100
On Characteristics
V
GS(th)
r
DS(on)
g
FS
Gate to Source Threshold Voltage
V
GS
= V
DS
, I
D
= 700
μ
A
V
GS
= 10 V, I
D
= 100 A
V
DS
= 5 V, I
D
= 100 A
2.0
3.0
2.1
222
4.0
2.3
V
m
Ω
S
Static Drain to Source On Resistance
Forward Transconductance
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
7980
4490
40
11180
6290
75
pF
pF
pF
Ω
V
DS
= 50 V, V
GS
= 0 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
0.1
0.8
1.8
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Rise Time
42
35
67
56
ns
ns
V
DD
= 50
V
,
I
D
= 100 A,
V
GS
= 10 V, R
GEN
= 6
Ω
Turn-Off Delay Time
Fall Time
74
118
57
ns
32
ns
Q
g
T
o
tal Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
Output Charge
V
GS
= 0 V to 10 V
108
36
152
nC
nC
nC
nC
V
DD
= 50 V,
D
= 100 A
Q
gs
Q
gd
Q
oss
I
22
V
DD
= 50 V, V
GS
= 0 V
297
Drain-Source Diode Characteristic
I
S
Maximum Continuous Drain to Source Diode Forward Current
Maximum Pulsed Drain to Source Diode Forward Current
–
–
–
222
888
1.3
A
A
I
SM
V
SD
t
rr
–
Source to Drain Diode Forward Voltage
Reverse Recovery Time
V
GS
= 0 V, I
SD
= 100 A
0.9
107
191
97
V
172
306
155
788
ns
nC
ns
nC
V
GS
= 0 V, V
DD
= 50 V,
I
F
= 100 A, dI
F
/dt = 100 A/
μ
s
Q
rr
t
rr
Reverse Recovery Charge
Reverse Recovery Time
V
GS
= 0 V, V
DD
= 50 V,
I
F
= 100 A, dI
F
/dt = 300 A/
μ
s
Q
rr
Reverse Recovery Charge
492
Notes
:
1. Pulsed Id please refer to Figure.11 and
Figure.12 “Forward Bias Safe Operating Area” for more details.
2. E
of 1176
mJ is
based on starting T
= 25
°
C, L = 3 mH, I
= 28 A, V
= 90 V, V
= 10 V.
100% test at L = 0.1 mH, I
= 89 A.
AS
J
AS
DD
GS
AS
3. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design.
2
Typical Characteristics
T
J
= 25 °C unless otherwise noted.
360
7
6
5
4
3
2
1
0
V
GS
= 10 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 4.5 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
300
240
180
120
60
V
GS
= 6 V
V
GS
= 5 V
V
GS
= 5.5 V
V
GS
= 5.5 V
V
GS
= 5 V
V
GS
= 6 V
V
GS
= 10 V
300 360
V
GS
= 4.5 V
0
0
1
2
3
0
60
120
180
240
V
DS
,
DRAIN TO SOURCE VOLTAGE (V)
I
D
,
DRAIN CURRENT (A)
Figure 1.
On-Region Characteristics
Figur
e
2
. Normalized On- Resistance
v s . D r a i n C u r r e n t a n d G a t e V o l t a g e
1.9
16
I
D
= 100 A
V
GS
= 10 V
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
12
8
I
D
= 100 A
T
J
= 150
o
C
4
T
J
= 25
o
C
0
-75 -50 -25
0
25 50 75
100 125 150 175
4
5
6
7
8
9
10
T
J
,
JUNCTION TEMPERATURE
(
o
C
)
V
GS
,
GATE TO SOURCE VOLTAGE (V)
F i gu re 3.
No rma li zed
O n- Resi sta nce
vs. Junction Temperature
Figure 4.
On-Resistance vs.
Gate to
Source Voltage
360
400
V
GS
= 0 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
100
300
240
180
120
60
V
DS
= 5 V
10
T
J
= 175
o
C
1
T
J
= 25
o
C
T
J
= 25
o
C
0.1
T
J
= 175
o
C
T
J
= -55
o
C
0.01
0.001
T
J
= -55
o
C
0
2
3
4
5
6
7
0.0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5.
Transfer Characteristics
Figur
e
6
. Source
to Drain Diode
Forward Voltage vs. Source Current
3
Typical Characteristics
T
J
= 25 °C unless otherwise noted.
10000
1000
100
10
10
I
D
= 100 A
8
C
iss
C
oss
V
DD
= 50 V
6
4
2
0
V
DD
= 30 V
V
DD
= 75 V
f = 1 MHz
GS
= 0 V
V
C
rss
1
0.1
1
10
100
0
10 20 30 40 50 60 70 80 90
100 110 120
Q
g
, GATE CHARGE (nC)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figur
e
8
. Capacitance vs. Drain
to Source Voltage
Figure 7.
Gate Charge Characteristics
240
200
160
120
80
500
100
10
1
V
GS
= 10 V
T
J
= 25
o
C
T
J
= 125
o
C
T
J
= 150
o
C
40
R
θ
JC
= 0.7
o
C/W
0
25
0.01
0.1
1
10
100
1000
50
75
100
125
150
175
T
C
,
CASE TEMPERATURE
(
o
C
)
t
AV
, TIME IN AVALANCHE (ms)
Figur
e
9
. U
n c l a m p e d I n d u c t i v e
Switching Capability
Figur
e
1
0. Maximum Continuous Drain
Current vs. Case Temperature
2000
1000
2000
1000
10
μ
s
10
μ
s
100
100
THIS AREA IS
10
LIMITED BY r
DS(on)
THIS AREA IS
10
LIMITED BY r
DS(on)
100
μ
s
100
μ
s
SINGLE PULSE
T
J
= MAX RATED
R
θ
JC
= 0.7
o
C/W
SINGLE PULSE
T
J
= MAX RATED
R
θ
JC
= 3.3
o
C/W
T
C
= 25
o
C
1 ms
1 ms
1
1
10 ms
100 ms
10 ms
CURVE BENT TO
MEASURED DATA
CURVE BENT TO
MEASURED DATA
T
C
= 25
o
C
100 ms
100 400
0.1
0.1
0.1
0.1
1
10
100
400
1
10
V
DS
, DRAIN to SOURCE VOLTAGE (V)
V
DS
, DRAIN to SOURCE VOLTAGE (V)
F i g u r e 1 1 .
F o r w a r d B i a s
S a f e
Operating Area for FDP2D3N10C
Figur
e
1
2. Forwar
d
B
ia
s
S
afe
Operating Area for FDPF2D3N10C
4
Typical Characteristics
T
J
= 25 °C unless otherwise noted.
100000
100000
10000
1000
100
SINGLE PULSE
R
θ
Jc
= 0.7
o
C/W
SINGLE PULSE
R
θ
Jc
= 3.3
o
C/W
C
= 25
o
C
T
C
= 25
o
C
T
10000
1000
100
10
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
2
t, PULSE WIDTH (sec)
t, PULSE WIDTH (sec)
Figure 13.
Single Pulse Maximum Power Dissipation
for FDP2D3N10C
Figure 14.
Single Pulse Maximum Power Dissipation
for FDPF2D3N10C
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
P
DM
0.1
0.05
0.02
0.01
0.1
t
1
t
2
NOTES:
(t) = r(t) x R
0.01
Z
θ
JC
θ
JC
o
R
= 0.7
C/W
θ
JC
SINGLE PULSE
Peak T
= P
x Z
(t) + T
J
DM
θ
JC C
Duty Cycle, D = t
/ t
1
2
0.001
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
2
t, RECTANGULAR PULSE DURATION (sec)
Figure 15.
Junction-to-Case Transient Thermal Response Curve for FDP2D3N10C
2
1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
P
DM
0.1
0.1
0.05
0.02
0.01
t
1
0.01
t
2
NOTES:
(t) = r(t) x R
Z
θ
JC
θ
JC
o
R
= 3.3
C/W
θ
JC
0.001
0.0001
SINGLE PULSE
10
-4
Peak T
= P
Duty Cycle, D = t
/ t
x Z
(t) + T
J
DM
θ
JC C
1
2
10
-5
10
-3
10
-2
10
-1
10
0
10
1
10
2
t, RECTANGULAR PULSE DURATION (sec)
Figure 16.
Junction-to-Case Transient Thermal Response Curve for FDPF2D3N10C
5
3.89
3.60
0.36
10.360
10.109
A
M
B A
C
8.89
6.86
B
2.860
2.660
1.41
1.17
6.477
6.121
7°
3°
12.878
12.190
15.215
14.757
15.97
15.89
8.787
8.587
5°
3°
5°
3°
3
1
1
3
2.755
2.555
13.894
12.941
1.650
1.250
3.962
3.505
(SEE NOTE E)
1.91
0.889
0.787
M
0.36
C B
0.457
0.357
2.640
2.440
5.180
4.980
NOTES:
5°
3°
5°
3°
A. PACKAGE REFERENCE: JEDEC TO220
VARIATION AB
B. ALL DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSION AND TOLERANCE AS PER ASME
Y14.5-2009.
4.672
4.472
D. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR PROTRUSIONS.
E. MAX
WIDTH FOR F102 DEVICE = 1.35mm.
F. DRAWING FILE NAME: TO220T03REV4.
G. FAIRCHILD SEMICONDUCTOR.
10.36
9.96
2.66
2.42
B
A
B
3.28
3.08
7.00
3.40
3.20
0.70
SEE NOTE “F”
SEE NOTE “F”
6.88
6.48
1 X
4
5°
16.07
15.67
B
16.00
15.60
B
(3.23)
3
1
1.47
1.24
2.96
2.56
2.14
0.90
0.70
0.50
10.05
9.45
M
A
30°
0.45
0.25
0.60
0.45
B
2.54
2.54
4.90
4.50
B
NOTES:
A. EXCEPT WHERE NOTED CONFORMS TO
EIAJ SC91A.
B
DOES NOT COMPLY EIAJ STD. VALUE.
C. ALL DIMENSIONS ARE IN MILLIMETERS.
D. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR PROTRUSIONS.
E. DIMENSION AND TOLERANCE AS PER ASME
Y14.5-1994.
F. OPTION 1 – WITH SUPPORT PIN HOLE.
OPTION 2 – NO SUPPORT PIN HOLE.
G. DRAWING FILE NAME: TO220M03REV5
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at
www.onsemi.com/site/pdf/Patent
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Marking.pdf
. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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