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August 2006  
FDS2672  
tm  
N-Channel UltraFET Trench

®

MOSFET  
200V, 3.9A, 70m
Ω  
Features  
General Description  
„
Max r

DS(on)

=
70m
Ω
at V

GS

= 10V, I

D

= 3.9A  
„
Max r

DS(on)

=
80m
Ω
at V

GS

= 6V, I

D

= 3.5A  
„
Fast switching speed  
This single N-Channel MOSFET is produced using  
Fairchild Semiconductor’s advanced UItraFET Trench

®  

process that
 
has been
 
especially tailored to
 
minimize  
the on-state resistance and yet maintain superior switching  
performance.  
„
High performance trench technology for extremely low  
r

DS(on)  

Application  
„
DC-DC conversion  
„
RoHS compliant  
D
D
5
6
7
8
4
3
2
1
D
D
SO-8  
G
S
S
S
Pin 1  
MOSFET Maximum Ratings
T

A

= 25°C unless otherwise noted  
Symbol  
V

DS  

V

GS  

Parameter  
Ratings  
200  
±20  
3.9  
Units  
Drain to Source Voltage  
Gate to Source Voltage  
Drain Current
 
-Continuous  
-Pulsed  
V
V
(Note 1a)  
I

D  

A
mJ  
W
50  
E

AS  

P

D  

Single Pulse Avalanche Energy  
Power Dissipation  
(Note 3)  
(Note 1a)  
(Note 1b)  
37.5  
2.5  
Power Dissipation  
1.0  
T

J

, T

STG  

Operating and Storage
T
e
mperature  
-55 to 150  
°
C  
Thermal Characteristics  
R

θ
JC  

R

θ
JA  

R

θ
JA  

Thermal Resistance, Junction to Case  
(Note 1)  
(Note 1a)  
(Note 1b)  
25  
50  
Thermal Resistance, Junction to Ambient  
Thermal Resistance, Junction to Ambient  
°
C/W  
125  
Package Marking and Ordering Information  
Device Marking  
Device  
Reel Size  
Tape Width  
12mm  
Quantity  
FDS2672  
FDS2672  
13’’  
2500 units  
©2006 Fairchild Semiconductor Corporation  
FDS2672 Rev. B  
1

Electrical Characteristics
T

J

= 25°C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Units  
Off Characteristics  
BV

DSS  

Drain to Source Breakdown Voltage  
I

D

= 250
µ
A, V

GS

= 0V  
200  
V
∆
BV

DSS  

∆
T

J  

Breakdown Voltage
T
e
mperature  
Coefficient  
I

D

= 250
µ
A, referenced to 25°C  
206  
mV/°
C  
V

DS

= 160V, V

GS

=0V  
V

DS

= 160V, V

GS

=0V T

J

= 55°C  
V

GS

= ±20V  
1
µ
A  
µ
A  
nA  
I

DSS  

I

GSS  

Zero Gate Voltage Drain Current  
Gate to Source Leakage Current  
10  
±100  
On Characteristics
(Note 2)  
V

GS(th)  

Gate to Source Threshold Voltage  
V

GS

= V

DS

, I

D

= 250
µ
A  
2
2.9  
-11  
4
V
∆
V

GS(th)  

∆
T

J  

Gate to Source Threshold Voltage  
T
e
mperature Coefficient  
I

D

= 250
µ
A, referenced to 25°C  
mV/°C  
V

GS

= 10
V
,
I

D

= 3.9A  
59  
63  
70  
80  
r

DS(on)  

g

FS  

Drain to Source On Resistance  
Forward Transcondductance  
V

GS

= 6
V
,
I

D

= 3.5A  
m
Ω  
V

GS

= 10
V
,
I

D

= 3.9A, T

J

= 125°C  
V

DS

= 10V,I

D

= 3.9A  
124  
15  
148  
S
Dynamic Characteristics  
C

iss  

C

oss  

C

rss  

R

g  

Input Capacitance  
1905  
100  
30  
2535  
135  
45  
pF  
pF  
pF  
Ω
V

DS

= 100V, V

GS

= 0V,  
f = 1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate Resistance  
f = 1MHz  
0.7  
Switching Characteristics  
t

d(on)  

t

r  

t

d(off)  

t

f  

Turn-On Delay Time  
Rise Time  
22  
10  
35  
10  
33  
11  
7
35  
20  
56  
20  
46  
ns  
ns  
V

DD

= 100V, I

D

= 3.9A  
V

GS

= 10V, R

GEN

= 6
Ω  
Turn-Off Delay Time  
Fall Time  
ns  
ns  
Q

g(TOT)  

Q

gs  

Q

gd  

T
o
tal Gate Charge at 10V  
Gate to Source Gate Charge  
Gate to Drain “Miller”Charge  
nC  
nC  
nC  
V

DD

=100V I

D

= 3.9A  
Drain-Source Diode Characteristics  
V

SD  

t

rr  

Source to Drain Diode
 
Voltage  
Reverse Recovery Time  
V

GS

= 0V, I

S

= 3.9A  
0.75  
67  
1.2  
101  
269  
V
I

F

= 3.9A, di/dt = 100A/
µ
s  
I

F

= 3.9A, di/dt = 100A/
µ
s  
ns  
nC  
Q

rr  

Reverse Recovery Charge  
179  
Notes:  
1:
R  
is the sum of the junction-to-case and case-to- ambient
 
thermal resistance where the case thermal reference is defined
 
as the solder mounting surface of  
θ
JA  
the drain pins. R  
is guaranteed by design
 
while R  
is determined by the user’s board design.  
θ
JC  
θ
CA  
a)
50°C/W (10 sec)  
b)
125°C/W when mounted on a  
minimum pad .  
62.5°C/W steady state  
2
when mounted on a 1in  
pad of 2 oz copper  
Scale 1:1 on letter size paper  
2:
Pulse Test: Pulse Width < 300 us, Duty Cycle < 2.0%.  
3:
Starting T
 
= 25
°
C, L = 3mH, I
 
= 5A, V
 
= 100V, V
 
= 10V  
J
AS  
DD  
GS  
FDS2672 Rev. B  
2

Typical Characteristics
T

J

= 25°C unless otherwise noted  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
50  
40  
30  
20  
10  
0
PULSE DURATION = 80
µ
s  
DUTY CYCLE = 0.5%MAX  
V
= 10V  
PULSE DURATION = 80
µ
s  
DUTY CYCLE = 0.5%MAX  
GS  
V

GS

= 4.5V  
V
= 6V  
GS  
V

GS

= 5V  
V

GS

= 6V  
V
= 5V  
GS  
V
= 4.5V  
GS  
V

GS

= 10V  
0
5
10 15 20 25 30 35 40 45 50  
I

D

, DRAIN CURRENT(A)  
0
1
2
3
4
V
, DRAIN TO SOURCE VOLTAGE (V)  
DS  
Figure 1.
 
On Region Characteristics  
Figure 2.
 
Normalized On-Resistance vs Drain  
Current and Gate Voltage  
180  
2.8  
2.2  
1.6  
1.0  
0.4  
PULSE DURATION = 80
µ
s  
I =
 
3.9A  
D
I
= 3.9A  
D
DUTY CYCLE = 0.5%MAX  
160  
140  
120  
100  
80  
V
= 10V  
GS  
T =
 
150

o

C  
J
60  
T
J
= 25

o

C  
40  
3.0  
10  
4.5  
6.0  
7.5  
9.0  
-50 -25  
0
25  
50  
75  
100 125 150  
T

J

, JUNCTION TEMPERATURE
(

o

C
)  
V

GS

, GATE TO SOURCE VOLTAGE (V)  
Figure 3.
 
Normalized On Resistance vs Junction  
Temperature  
Figure 4.
 
On-Resistance vs Gate to Source  
Voltage  
30  
100  
PULSE DURATION = 80
µ
s  
V
GS  
= 0V  
DUTY CYCLE = 0.5%MAX  
25  
10  
1
V
= 10V  
DD  
T =
 
150

o

C  
J
20  
15  
10  
5
T =
 
150

o

C  
J
T
J
= 25

o

C  
T
= 25

o

C  
J
0.1  
0.01  
T
J
= -55

o

C  
T
J
= – 55

o

C  
5
0
1E-3  
2
3
4
6
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
V

GS

, GATE TO SOURCE VOLTAGE (V)  
V ,
 
BODY DIODE FORWARD VOLTAGE (V)  
SD  
Figure 5.
 
Transfer Characteristics  
Figure 6.
 
Source to Drain
 
Diode Forward  
Voltage vs Source Current  
FDS2672 Rev. B  
3

Typical Characteristics
T

J

= 25°C unless otherwise noted  
10000  
10  
f = 1MHz  
= 0V  
V
GS  
C
iss  
V
DD  
= 50V  
8
6
4
2
0
1000  
100  
10  
V
= 100V  
DD  
C
oss  
V
= 150V  
DD  
C
rss  
0.1  
1
10  
100  
0
8
16  
24  
32  
40  
V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
Q ,
 
GATE CHARGE(nC)  
g
Figure 7.
 
Gate Charge Characteristics  
Figure 8.
 
Capacitance vs Drain to Source Voltage  
4.0  
3.5  
3.0  
10  
V
= 10V  
GS  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
T

J

= 25

o

C  
1
V
= 6V  
GS  
T

J

= 125

o

C  
R
θ
JA  
= 50

o

C/W  
50  
0.1  
0.01  
25  
75  
100  
125  
150  
0.1  
1
10  
100  
1000  
t

AV

, TIME IN AVALANCHE(ms)  
T

A

, AMBIENT TEMPERATURE
(

o

C
)  
Figure 9.
 
Unclamped Inductive Switching  
Capability  
Figure 10.
 
Ambient Continuous Drain Current vs  
Case Temperature  
10

2  

3000  
o
T
= 25
 
C  
A
V

GS

= 10V  
1000  
100  
10  
FOR TEMPERATURES  
10

1  

10

0  

o
100us  
1ms  
ABOVE 25
 
C DERATE PEAK  
150
–
T  
A
I = I  
———————–  
25  
125  
LIMITED BY  
PACKAGE  
10

-1  

10

-2  

10

-3  

10ms  
100ms  
1s  
SINGLE PULSE  
OPERATION IN THIS  
AREA MAY BE  
LIMITED BY r  
DS(on)  
DC  
T
= MAX RATED  
= 25

O

C  
SINGLE PULSE  
J
T
A
1
10

-4  

10

-3  

10

-2  

t, PULSE WIDTH (s)  
10

-1  

10

0  

10

1  

10

2  

10

3  

0.01  
0.1  
1
10  
100  
1000  
V

DS

, DRAIN-SOURCE VOLTAGE (V)  
Figure 11.
 
Forward Bias Safe Operating Area  
Figure 12.
 
Single Pulse Maximum Power  
Dissipation  
FDS2672 Rev. B  
4

Typical Characteristics
T

J

= 25°C unless otherwise noted  
2
1
DUTY CYCLE-DESCENDING ORDER  
D = 0.5  
0.2  
0.1  
0.1  
0.05  
0.02  
0.01  
P
DM  
0.01  
1E-3  
1E-4  
t
1
t
2
NOTES:  
DUTY FACTOR: D = t
 
/t  
SINGLE PULSE  
1
2
x R  
PEAK T
 
= P  
J
x Z  
+ T  
DM  
θ
JA  
θ
JA
A  
10

-4  

10

-3  

10

-2  

10

-1  

10

0  

10

1  

10

2  

10

3  

t, RECTANGULAR PULSE DURATION (s)  
Figure 13.
 
Transient Thermal Response Curve  
Thermal characterization performed using the conditions described in Note 1b  
Transient thermal response will change depending on the circuit board design  
FDS2672 Rev. B  
5

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intended to be an exhaustive list of all such trademarks.  
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This datasheet contains the design specifications for  
product development. Specifications may change in  
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Fairchild Semiconductor reserves the right to make  
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