onsemi-FDS6672A

Part #onsemi-FDS6672A
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onsemi-FDS6672A
April 2001  
FDS6672A  
30V N-Channel PowerTrench
 
MOSFET  
General Description  
Features  
This N-Channel MOSFET has been designed  
specifically to improve the overall efficiency of DC/DC  
converters using either synchronous or conventional  
switching PWM controllers.
 
It has been optimized for  
low gate charge, low R

DS(ON)

and fast switching speed.  
•
12.5 A, 30 V.
 
R

DS(ON)

= 8 m
Ω
@ V

GS

= 10 V  
R

DS(ON)

= 9.5 m
Ω
@ V

GS

= 4.5 V  
•
High performance trench technology for extremely  
low R

DS(ON)  

Applications  
•
Low gate charge (33 nC typical)  
•
DC/DC converter  
•
High power and current handling capability  
D
D
D
5
6
7
8
4
3
2
1
D
G
S
S
SO-8  
S
Absolute Maximum Ratings
 
T

A

=25

o

C unless otherwise noted  
Symbol  
V

DSS  

Parameter  
Drain-Source Voltage  
Ratings  
Units  
30  
V
V
A
V

GSS  

Gate-Source Voltage  
±
12  
12.5  
I

D  

Drain Current
 
– Continuous  
– Pulsed  
(Note 1a)  
50  
Power Dissipation for Single Operation  
(Note 1a)  
(Note 1b)  
(Note 1c)  
2.5  
P

D  

W
1.2  
1.0  
T

J

, T

STG  

Operating and Storage Junction Temperature Range  
-55 to +150  
°
C  
Thermal Characteristics  
Thermal Resistance, Junction-to-Ambient  
Thermal Resistance, Junction-to-Case  
(Note 1a)  
(Note 1)  
50  
25  
R

θ
JA  

°
C/W  
°
C/W  
R

θ
JC  

Package Marking and Ordering Information  
Device Marking  
Device  
Reel Size  
Tape width  
Quantity  
FDS6672A  
FDS6672A  
13’’  
12mm  
2500 units  
FDS6672A Rev
 
C(W)  
2000 Fairchild Semiconductor Corporation  

Electrical Characteristics  
T

A

= 25°C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min Typ Max Units  
Off Characteristics  
BV

DSS  

Drain–Source Breakdown Voltage  
30  
V
V

GS

= 0 V, I

D

= 250
µ
A  
∆
BV
DSS  
∆
T

J  

Breakdown Voltage Temperature  
Coefficient  
20  
I

D

= 250
µ
A, Referenced to 25
°
C  
mV/
°
C  
I

DSS  

Zero Gate Voltage Drain Current  
Gate–Body Leakage, Forward  
Gate–Body Leakage, Reverse  
V

DS

= 24 V,
 
V

GS

= 0 V  
V

GS

= 12 V,
 
V

DS

= 0 V  
V

GS

= –12 V V

DS

= 0 V  
1
µ
A  
nA  
nA  
I

GSSF  

I

GSSR  

100  
–100  
On Characteristics  
(Note 2)  
V

GS(th)  

Gate Threshold Voltage  
0.8  
50  
1.2  
-4  
2.0  
V
V

DS

= V

GS

, I

D

= 250
µ
A  
∆
V
GS(th)  
∆
T

J  

Gate Threshold Voltage  
Temperature Coefficient  
I

D

= 250
µ
A, Referenced to 25
°
C  
mV/
°
C  
m
Ω  
R

DS(on)  

Static Drain–Source  
On–Resistance  
V

GS

= 10 V,
 
I

D

= 14 A  
V
V

GS

= 4.5 V, I

D

= 12.5 A,  
T

J

=125
°
C  
6.8  
8.2  
11.5  
8
9.5  
16  

GS

= 4.5 V, I

D

= 12.5 A  
I

D(on)  

g

FS  

On–State Drain Current  
V

GS

= 10 V,
 
V

DS

= 5 V  
A
S
Forward Transconductance  
V

DS

= 10
 
V,  
I

D

= 15 A  
75  
Dynamic Characteristics  
C

iss  

C

oss  

C

rss  

Input Capacitance  
5070  
550  
pF  
pF  
pF  
V

DS

= 15 V,
 
V

GS

= 0 V,  
f = 1.0 MHz  
Output Capacitance  
Reverse Transfer Capacitance  
230  
Switching Characteristics
 
(Note 2)  
V

DD

= 10 V,
 
I

D

= 1 A,  
V

GS

= 4.5
 
V, R

GEN

= 6
Ω  
t

d(on)  

t

r  

t

d(off)  

t

f  

Turn–On Delay Time  
Turn–On Rise Time  
Turn–Off Delay Time  
Turn–Off Fall Time  
Total Gate Charge  
Gate–Source Charge  
Gate–Drain Charge  
17  
18  
69  
29  
33  
7.5  
6.8  
25  
25  
ns  
ns  
100  
42  
ns  
ns  
V
V

DS

= 15 V,
 
I

D

= 15 A,  

GS

= 4.5 V  
Q

g  

Q

gs  

Q

gd  

46  
nC  
nC  
nC  
Drain–Source Diode Characteristics and Maximum Ratings  
I

S  

Maximum Continuous Drain–Source Diode Forward Current  
2.1  
1.2  
A
V
Drain–Source Diode Forward  
V

GS

= 0 V,
 
I

S

= 2.1 A  
Voltage  
V

SD  

(Note 2)  
0.7  
Notes:  
1.
R

θ
JA

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of  
the drain pins.
 
R

θ
JC

is guaranteed by design while R

θ
CA

is determined by the user’s board design.  
a) 50°/W
 
when  
b) 105°/W
 
when  
c) 125°/W
 
when mounted on a  
minimum pad.  
mounted on a 1in

2  

pad of 2 oz copper  
mounted on a .04 in

2  

pad of 2 oz copper  
Scale 1 : 1 on letter size paper  
2.
Pulse Test: Pulse Width < 300
µ
s, Duty Cycle < 2.0%  
FDS6672A Rev C(W)  

Typical Characteristics  
50  
1.5  
1.3  
1.1  
0.9  
V

GS

= 4.5V  
3.5V  
3.0V  
40  
30  
20  
10  
0
V

GS

= 2.5V  
2.5V  
2.0V  
3.0V  
3.5V  
4.0V  
4.5V  
0
10  
20  
30  
40  
50  
60  
0
0.5  
1
1.5  
I

D

, DRAIN CURRENT (A)  
V

DS

, DRAIN-SOURCE VOLTAGE (V)  
Figure 1. On-Region Characteristics.  
Figure 2. On-Resistance Variation with  
Drain Current and Gate Voltage.  
0.025  
1.8  
I

D

= 6 A  
I

D

= 15A  
V

GS

= 10V  
1.6  
1.4  
1.2  
1
0.02  
0.015  
0.01  
0.005  
0
T

A

= 125

o

C  
T

A

= 25

o

C  
0.8  
0.6  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
0
2
4
6
8
10  
T

J

, JUNCTION TEMPERATURE (

o

C)  
V

GS

, GATE TO SOURCE VOLTAGE (V)  
Figure 3. On-Resistance Variation with  
Temperature.  
Figure 4. On-Resistance Variation with  
Gate-to-Source Voltage.  
100  
60  
V

GS

= 0V  
V

DS

= 5V  
10  
1
T

A

= 125

o

C  
45  
30  
15  
0
25

o

C  
-55

o

C  
0.1  
T

A

= 125

o

C  
25

o

C  
-55

o

C  
0.01  
0.001  
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
1.4  
0.5  
1
1.5  
2
2.5  
3
V

SD

, BODY DIODE FORWARD VOLTAGE (V)  
V

GS

, GATE TO SOURCE VOLTAGE (V)  
Figure 5. Transfer Characteristics.  
Figure 6. Body Diode Forward Voltage Variation  
with Source Current and Temperature.  
FDS6672A Rev C(W)  

Typical Characteristics  
5
8000  
6000  
4000  
2000  
0
I

D

= 12.5A  
f = 1MHz  
V

GS

= 0 V  
10V  
V

DS

= 5V  
4
C

ISS  

15V  
3
2
1
0
C

OSS  

C

RSS  

0
10  
20  
30  
40  
0
5
10  
15  
20  
25  
30  
Q

g

, GATE CHARGE (nC)  
V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
Figure 7. Gate Charge Characteristics.  
Figure 8. Capacitance Characteristics.  
100  
10  
50  
40  
30  
20  
10  
0
100
µ
s  
SINGLE PULSE  
R

θ

JA

= 125°C/W  
R

DS(ON)

LIMIT  
1ms  
10ms  
100ms  
1s  
10s  
T

A

= 25°C  
1
DC  
V

GS

= 10V  
SINGLE PULSE  
R

θ
JA

= 125

o

C/W  
T

A

= 25

o

C  
0.1  
0.01  
0.01  
0.1  
1
10  
100  
0.001  
0.01  
0.1  
1
10  
100  
V

DS

, DRAIN-SOURCE VOLTAGE (V)  
t

1

, TIME (sec)  
Figure 9. Maximum Safe Operating Area.  
Figure 10. Single Pulse Maximum  
Power Dissipation.  
1
D = 0.5  
0.2  
R

θ
JA

(t) = r(t) + R

θ
JA  

R

θ
JA

= 125°C/W  
0.1  
0.1  
0.05  
0.02  
P(pk)  
t

1  

0.01  
t

2  

0.01  
SINGLE PULSE  
T

J

– T

A

= P * R

θ
JA

(t)  
Duty Cycle, D = t

1

/ t

2  

0.001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
t

1

, TIME (sec)  
Figure 11. Transient Thermal Response Curve.  
Thermal characterization performed using the conditions described in Note 1c.  
Transient thermal response will change depending on the circuit board design.  
FDS6672A Rev C(W)  

TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is  
not intended to be an exhaustive list of all such trademarks.  
PACMAN™  
POP™  
PowerTrench  
QFET™  
QS™  
QT Optoelectronics™  
Quiet Series™  
SILENT SWITCHER  
SMART START™  
Star* Power™  
Stealth™  
SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
SyncFET™  
TinyLogic™  
UHC™  
FAST  
FASTr™  
GlobalOptoisolator™  
GTO™  
HiSeC™  
ISOPLANAR™  
LittleFET™  
MicroFET™  
MICROWIRE™  
OPTOLOGIC™  
OPTOPLANAR™  
ACEx™  
Bottomless™  
CoolFET™  
CROSSVOLT
™  
DenseTrench™  
DOME™  
UltraFET  
VCX™  
EcoSPARK™  
E

2

CMOS

TM  

EnSigna

TM  

FACT™  
FACT Quiet Series™  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER  
NOTICE T
O
A
NY PRODUCTS HEREIN TO IMPROVE RELIABILIT
Y
,
F
UNCTION OR DESIGN. FAIRCHILD  
DOES NO
T
A
SSUM
E
A
NY LIABILIT
Y
A
RISING OUT OF TH
E
A
PPLICATION OR USE O
F
A
NY PRODUCT  
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT  
RIGHTS, NOR THE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOU
T
T
HE EXPRESS WRITTE
N
A
PPROVA
L
O
F FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant into  
the body, or (b) support or sustain life, or (c) whose  
failure to perform when properly used in accordance  
with instructions for use provided in the labeling, can be  
reasonably expected to result in significant injury to the  
user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or  
In Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
Rev. H1