onsemi-FDS8958

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onsemi-FDS8958
October 2004  
FDS8958  
Dual N & P-Channel PowerTrench

Ò

MOSFET  
General Description  
Features  
These dual N- and P-Channel enhancement mode  
power field effect transistors are produced using  
Fairchild Semiconductor’s advanced PowerTrench  
process that has been especially tailored to minimize  
on-state ressitance and yet maintain superior switching  
performance.  
·
Q1
:  
N-Channel  
7.0A, 30V  
R

DS(on)

= 0.028
W
@ V

GS

= 10V  
R

DS(on)

= 0.040
W
@ V

GS

= 4.5V  
·
Q2
:  
P-Channel  
-5A, -30V  
R

DS(on)

= 0.052
W
@ V

GS

= -10V  
R

DS(on)

= 0.080
W
@ V

GS

= -4.5V  
These devices are well suited for low voltage and  
battery powered applications where low in-line power  
loss and fast switching are required.  
·
·
Fast switching speed  
High power and handling capability in a widely  
used surface mount package  
Q2  
D2  
5
6
7
8
4
3
2
1
D2  
D1  
D1  
Q1  
G2  
SO-8  
S2  
G1  
S1  
Pin 1  
Absolute Maximum Ratings
 
T

A

= 25°C unless otherwise noted  
Symbol  
V

DSS  

Parameter  
Drain-Source Voltage  
Q1  
30  
±
20  
7
Q2  
30  
Units  
V
V
A
V

GSS  

Gate-Source Voltage  
±
20  
-5  
I

D  

Drain Current
 
– Continuous  
– Pulsed  
(Note 1a)  
20  
-20  
P

D  

Power Dissipation for Dual Operation  
Power Dissipation for Single Operation  
2
W
(Note 1a)  
(Note 1b)  
1.6  
1
(Note 1c)  
0.9  
T

J

, T

STG  

Operating and Storage Junction Temperature Range  
-55 to +150  
°
C  
Thermal Characteristics  
Thermal Resistance, Junction-to-Ambient  
(Note 1a)  
(Note 1)  
78  
40  
R

q
JA  

°
C/W  
°
C/W  
Thermal Resistance, Junction-to-Case  
R

q
JC  

Package Marking and Ordering Information  
Device Marking  
Device  
Reel Size  
Tape width  
Quantity  
FDS8958  
FDS8958  
13”  
12mm  
2500 units  
FDS8958 Rev A(W)  
Ó
2004 Fairchild Semiconductor Corporation  

Electrical Characteristics  
T

A

= 25°C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Type Min
 
Typ Max
 
Units  
Off Characteristics  
BV

DSS  

Drain-Source Breakdown  
Q1  
Q2  
30  
-30  
V
V

GS

= 0 V, I

D

= 250
m
A  
V

GS

= 0 V, I

D

= -250
m
A  
Voltage  
Breakdown Voltage  
Temperature Coefficient  
Q1  
Q2  
25  
-22  
D
BV
DSS  
D
T

J  

I

DSS  

I

D

= 250
m
A, Referenced to 25
°
C  
I

D

= -250 µA, Referenced to 25
°
C  
V

DS

= 24 V, V

GS

= 0 V  
mV/
°
C  
m
A  
Zero Gate Voltage Drain  
Current  
Gate-Body Leakage, Forward
 
V

GS

= 20 V, V

DS

= 0 V  
Q1  
Q2  
All  
1
-1  
100  
V

DS

= -24 V, V

GS

= 0 V  
I

GSSF  

I

GSSR  

nA  
nA  
Gate-Body Leakage, Reverse
 
V

GS

= -20 V, V

DS

= 0 V  
All  
-100  
On Characteristics  
(Note 2)  
V

GS(th)  

Gate Threshold Voltage  
Q1  
Q2  
1
-1  
1.6  
-1.7  
3
-3  
V
V

DS

= V

GS

, I

D

= 250
m
A  
V

DS

= V

GS

, I

D

= -250 µA  
Gate Threshold Voltage  
Temperature Coefficient  
Q1  
Q2  
-4.3  
4
D
V
GS(th)  
D
T

J  

R

DS(on)  

I

D

= 250
m
A, Referenced to 25
°
C  
I

D

= -250 µA, Referenced to 25
°
C  
V

GS

= 10 V, I

D

= 7 A  
V

GS

= 10 V, I

D

= 7 A, T

J

= 125
°
C  
V

GS

= 4.5 V, I

D

= 6 A  
mV/
°
C  
m
W  
Static Drain-Source  
On-Resistance  
Q1  
21  
32  
27  
28  
42  
40  
V

GS

= -10 V, I

D

= -5 A  
V

GS

= -10 V, I

D

= -5 A, T

J

= 125
°
C  
V

GS

= -4.5 V, I

D

= -4 A  
V

GS

= 10 V, V

DS

= 5 V  
V

GS

= -10 V, V

DS

= -5 V  
V

DS

= 5 V, I

D

= 7 A  
Q2  
41  
58  
58  
52  
78  
80  
I

D(on)  

g

FS  

On-State Drain Current  
Q1  
Q2  
Q1  
Q2  
20  
-20  
A
S
Forward Transconductance  
19  
11  
V

DS

= -5 V, I

D

=-5 A  
Dynamic Characteristics  
C

iss  

C

oss  

C

rss  

Input Capacitance  
Q1  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
789  
690  
173  
306  
66  
pF  
pF  
pF  
V

DS

= 10 V, V

GS

= 0 V, f = 1.0 MHz  
Output Capacitance  
Q2  
V

DS

= -10 V, V

GS

= 0 V, f = 1.0 MHz  
Reverse Transfer Capacitance  
77  
FDS8958 Rev A(W)  

Electrical Characteristics
 
(continued)  
T

A

= 25°C unless otherwise noted  
Symbol Parameter
 
Test Conditions  
Type Min
 
Typ Max
 
Units  
Switching Characteristics
 
(Note 2)  
t

d(on)  

t

r  

t

d(off)  

t

f  

Turn-On Delay Time  
Turn-On Rise Time  
Turn-Off Delay Time  
Turn-Off Fall Time  
Total Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
Q1  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
6
6.7  
10  
9.7  
18  
19.8  
5
12.3  
16  
14  
12  
13.4  
18  
19.4  
29  
35.6  
12  
22.2  
26  
23  
ns  
ns  
V

DD

= 10 V, I

D

= 1 A,  
V

GS

= 10V, R

GEN

= 6
W  
Q2  
V
ns  

DD

= -10 V, I

D

= -1 A,  
V

GS

= -10V, R

GEN

= 6
W  
ns  
Q

g  

Q

gs  

Q

gd  

Q1  
V
nC  
nC  
nC  

DS

= 15 V, I

D

= 7 A, V

GS

= 10 V  
2.5  
2.2  
2.1  
1.9  
Q2  

DS

= -15 V, I

D

= -5 A,V

GS

= -10 V  
V
Drain–Source Diode Characteristics and Maximum Ratings  
I

S  

Maximum Continuous Drain-Source Diode Forward Current  
Q1  
Q2  
Q1  
Q2  
1.3  
-1.3  
1.2  
A
V
V

SD  

Drain-Source Diode Forward
 
V

GS

= 0 V, I

S

= 1.3 A  
(Note 2)  
(Note 2)  
0.74  
-0.76  
Voltage  
V

GS

= 0 V, I

S

= -1.3 A  
-1.2  
Notes:  
1.
R

q
JA

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of  
the drain pins.
 
R

q
JC

is guaranteed by design while R

q
CA

is determined by the user’s board design.  
a) 78°/W
 
when  
mounted on a  
0.5 in

2

pad of 2 oz  
copper  
b) 125°/W
 
when  
c) 135°/W
 
when mounted on a  
minimum pad.  
mounted on a .02 in

2  

pad of 2 oz copper  
Scale 1 : 1 on letter size paper  
2. Pulse Test: Pulse Width < 300
m
s, Duty Cycle < 2.0%  
FDS8958 Rev A(W)  

Typical Characteristics:
 
Q1  
2.4  
2.2  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
30  
V

GS

= 10V  
4.0V  
V

GS

= 3.0V  
7.0V  
3.5V  
5.0V  
20  
4.5V  
3.5V  
3.0V  
4.0V  
4.5V  
10  
5.0V  
6.0V  
7.0V  
10V  
2.5V  
0
0
1
2
3
4
5
0
6
12  
18  
24  
30  
V

DS

, DRAIN-SOURCE VOLTAGE (V)  
I

D

, DRAIN CURRENT (A)  
Figure 1. On-Region Characteristics.  
Figure 2. On-Resistance Variation with  
Drain Current and Gate Voltage.  
0.09  
0.08  
0.07  
0.06  
0.05  
0.04  
0.03  
0.02  
1.9  
I

D

= 7A  
I

D

= 7A  
V

GS

= 10V  
1.6  
1.3  
1.0  
0.7  
0.4  
T

A

= 125

o

C  
T

A

= 25

o

C  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
2
4
6
8
10  
T

J

, JUNCTION TEMPERATURE (

o

C)  
V

GS

, GATE TO SOURCE VOLTAGE (V)  
Figure 3. On-Resistance Variation with  
Temperature.  
Figure 4. On-Resistance Variation with  
Gate-to-Source Voltage.  
100  
30  
V

GS

= 0V  
V

DS

= 10V  
25

o

C  
T

A

= -55

o

C  
25  
20  
15  
10  
5
10  
1
T

A

= 125

o

C  
125

o

C  
25

o

C  
0.1  
0.01  
-55

o

C  
0
0.001  
1
2
3
4
5
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
1.4  
V

GS

, GATE TO SOURCE VOLTAGE (V)  
V

SD

, BODY DIODE FORWARD VOLTAGE (V)  
Figure 5. Transfer Characteristics.  
Figure 6. Body Diode Forward Voltage Variation  
with Source Current and Temperature.  
FDS8958 Rev A(W)  

Typical Characteristics:
 
Q1  
10  
1200  
900  
600  
300  
0
f = 1MHz  
V

GS

= 0 V  
I

D

=7A  
V

DS

= 5V  
10V  
8
6
4
2
0
15V  
C

ISS  

C

OSS  

C

RSS  

0
4
8
12  
16  
0.0  
5.0  
10.0  
15.0  
20.0  
Q

g

, GATE CHARGE (nC)  
V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
Figure 7. Gate Charge Characteristics.  
Figure 8. Capacitance Characteristics.  
100  
10  
50  
40  
30  
20  
10  
0
R

DS(ON)

LIMIT  
SINGLE PULSE  
R

q

JA

= 135°C/W  
T

A

= 25°C  
m
100  
1ms  
10ms  
s
100ms  
1s  
1
10s  
DC  
V

GS

= 10V  
SINGLE PULSE  
R

q

JA

= 135

o

C/W  
T

A

= 25

o

C  
0.1  
0.01  
0.1  
1
10  
100  
0.001  
0.01  
0.1  
1
10  
100  
1000  
V

DS

, DRAIN-SOURCE VOLTAGE (V)  
t

1

, TIME (sec)  
Figure 9. Maximum Safe Operating Area.  
Figure 10. Single Pulse Maximum  
Power Dissipation.  
FDS8958 Rev A(W)  

Typical Characteristics:
 
Q2  
30  
2.5  
2
V

GS

= -10.0V  
V

GS

= -3.5V  
25  
-7.0V  
-5.0V  
-6.0V  
20  
15  
10  
5
-4.0V  
-4.0V  
-4.5V  
1.5  
1
-5.0V  
-6.0V  
-3.5V  
-7.0V  
-10.0V  
-3.0V  
4
0
0.5  
0
1
2
3
5
0
6
12  
18  
24  
30  
-V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
-I

D

, DRAIN CURRENT (A)  
Figure 11. On-Region Characteristics.  
Figure 12. On-Resistance Variation with  
Drain Current and Gate Voltage.  
1.6  
0.2  
I

D

= -5A  
I

D

= -5A  
V

GS

= -10V  
1.4  
0.15  
0.1  
0.05  
0
1.2  
1.0  
0.8  
0.6  
T

A

= 125

o

C  
T

A

= 25

o

C  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
2
4
6
8
10  
T

J

, JUNCTION TEMPERATURE (

o

C)  
-V

GS

, GATE TO SOURCE VOLTAGE (V)  
Figure 13. On-Resistance Variation with  
Temperature.  
Figure 14. On-Resistance Variation with  
Gate-to-Source Voltage.  
30  
25  
20  
15  
10  
5
100  
V

GS

= 0V  
T

A

= -55

o

C  
V

DS

= -10V  
10  
25

o

C  
T

A

= 125

o

C  
1
25

o

C  
125

o

C  
0.1  
0.01  
-55

o

C  
0
0.001  
1.5  
2.5  
3.5  
4.5  
5.5  
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
1.4  
-V

GS

, GATE TO SOURCE VOLTAGE (V)  
-V

SD

, BODY
 
DIODE FORWARD VOLTAGE (V)  
Figure 15. Transfer Characteristics.  
Figure 16. Body Diode Forward Voltage Variation  
with Source Current and Temperature.  
FDS8958 Rev A(W)  

Typical Characteristics:
 
Q2  
1000  
800  
600  
400  
200  
0
10  
f = 1 MHz  
V

GS

= 0 V  
I

D

= -5.3A  
V

DS

= -5V  
-10V  
8
C

ISS  

-15V  
6
4
2
0
C

OSS  

C

RSS  

10  
0
4
8
12  
16  
0
5
15  
20  
Q

g

, GATE CHARGE (nC)  
-V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
Figure 17. Gate Charge Characteristics.  
Figure 18. Capacitance Characteristics.  
100  
50  
40  
30  
20  
10  
0
R

DS(ON)

LIMIT  
m
100  
s
SINGLE PULSE  
R

q

JA

= 135°C/W  
T

A

= 25°C  
1ms  
10ms  
100ms  
1s  
10  
1
10s  
DC  
V

GS

= -10V  
SINGLE PULSE  
R

q

JA

= 135

o

C/W  
T

A

= 25

o

C  
0.1  
0.01  
0.1  
1
10  
100  
0.001  
0.01  
0.1  
1
10  
100  
-V

DS

, DRAIN-SOURCE VOLTAGE (V)  
t

1

, TIME (sec)  
Figure 19. Maximum Safe Operating Area.  
Figure 20. Single Pulse Maximum  
Power Dissipation.  
1
D = 0.5  
R

q

(t) = r(t) + R

q  

R

q

JA

= 135

o

C/W  
JA  
JA  
0.  
0.1  
0.1  
0.05  
P(pk)  
0.02  
0.01  
t

1  

SINGLE PULSE  
0.01  
t

2  

T

J

– T

A

= P * R

q

JA

(t)  
Duty Cycle, D = t

1

/ t

2  

0.001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
t

1

, TIME (sec)  
Figure 21. Transient Thermal Response Curve.  
Thermal characterization performed using the conditions described in Note 1c.  
Transient thermal response will change depending on the circuit board design.  
FDS8958 Rev A(W)  

TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is  
not intended to be an exhaustive list of all such trademarks.  
ACEx™  
Power247™  
PowerEdge™  
PowerSaver™  
PowerTrench  
QFET  
Stealth™  
ISOPLANAR™  
LittleFET™  
MICROCOUPLER™  
MicroFET™  
MicroPak™  
MICROWIRE™  
MSX™  
MSXPro™  
OCX™  
OCXPro™  
FAST  
FASTr™  
FPS™  
FRFET™  
GlobalOptoisolator™  
GTO™  
ActiveArray™  
Bottomless™  
CoolFET™  
CROSSVOLT
™  
DOME™  
EcoSPARK™  
E

2

CMOS™  
EnSigna™  
FACT™  
SuperFET™  
SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
SyncFET™  
QS™  
QT Optoelectronics™
 
TinyLogic  
HiSeC™  
I

2

C™  
Quiet Series™  
RapidConfigure™  
RapidConnect™  
µ
SerDes™  
TINYOPTO™  
TruTranslation™  
UHC™  
i-Lo
™  
ImpliedDisconnect™  
FACT Quiet Series™  
UltraFET  
OPTOLOGIC  
OPTOPLANAR™  
PACMAN™  
POP™  
SILENT SWITCHER
 
VCX™  
SMART START™  
SPM™  
Across the board. Around the world.™  
The Power Franchise  
Programmabl
e
A
ctive Droop™  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVE
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HE RIGH
T
T
O MAKE CHANGES WITHOU
T
F
URTHER NOTIC
E
T
O
A
NY  
PRODUCTS HEREI
N
T
O IMPROVE RELIABILIT
Y
,
F
UNCTION OR DESIGN. FAIRCHILD DOES NO
T
A
SSUM
E
A
N
Y
L
IABILITY  
ARISING OU
T
O
F
T
H
E
A
PPLICATION OR USE O
F
A
N
Y
P
RODUC
T
O
R CIRCUI
T
D
ESCRIBED HEREIN; NEITHER DOES IT  
CONVE
Y
A
N
Y
L
ICENSE UNDER ITS PATEN
T
R
IGHTS, NO
R
T
HE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOU
T
T
HE EXPRESS WRITTE
N
A
PPROVA
L
O
F FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant into  
the body, or (b) support or sustain life, or (c) whose  
failure to perform when properly used in accordance  
with instructions for use provided in the labeling, can be  
reasonably expected to result in significant injury to the  
user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or  
In Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
Rev. I13  

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FDS8958  
30V Dual N & P-Channel PowerTrench MOSFET  
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Contents  
•
General description  
•
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•
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•
Qualification Support  
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(PCNs)  
Datasheet  
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•
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Design center  
General description  
These dual N- and P-Channel enhancement mode power field effect  
transistors are produced using Fairchild Semiconductor’s advanced  
PowerTrench process that has been especially tailored to minimize on-  
state ressitance and yet maintain superior switching performance.  
e-mail this datasheet  
This page  
These devices are well suited for low voltage and battery powered  
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applications where low in-line power loss and fast switching are required.  
This product  
Use in FETBench  
Analysis  
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Features  
z
Q1: N-Channel  

{

7.0A, 30V  
„
R
R
= 0.028
Ω
@ V
 
= 10V  
DS(ON)  
GS  
„
= 0.040
Ω
@ V
 
= 4.5V  
DS(ON)  
GS  
z
Q2: P-Channel  

{

-5A, -30V  
„
„
R
R
= 0.052
Ω
@ V
 
= -10V  
DS(ON)  
GS  
= 0.080
Ω
@ V
 
= -4.5V  
DS(ON)  
GS  
z
z
Fast switching speed  
High power and handling capability in a widely used surface mount  
package  

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Product status/pricing/packaging  
Product  
Product status  
Pb-free Status  
Package type  
Leads  
Packing method  
Package Marking Convention**  
Line 1:
 
(Fairchild logo)  
$Y  
(Asm. Plant Code)  
&
Z
FDS8958_NF073  
Full Production  
SO-8  
8
TAPE REEL  
& (2-Digit
 
Date Code)  
2
&
T
(Die Trace Code)  
Line 2: FDS Line 3: 8958  
** A sample button will appear if the part is available through Fairchild’s on-line samples program. If there is no sample button, please  
contact a
Fairchild distributor
to obtain samples  
Indicates product with Pb-free second-level interconnect. For more information
click here.  
Package marking information for product FDS8958 is available.
Click here for more information
.  
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Application notes  
AN-4143: LCD Backlight Inverter Drive IC (FAN7310)
(321 K) Jul 27, 2007  
AN-6016: AN-6016 LCD Backlight Inverter Drive IC (FAN7311)
(462 K) Jul 27,  
2007  
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Qualification Support  
Click on a product for detailed qualification data  
Product  
FDS8958_NF073  
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