onsemi-FDY3000NZ

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January 2007  
tm  
FDY3000NZ  
“
Dual N-Channel 2.5V Specified PowerTrench
 
MOSFET  
General Description  
Features  
This Dual N-Channel MOSFET has been designed  
using Fairchild Semiconductor’s advanced Power  
Trench process to optimize the R

DS(ON)

@ V

GS

= 2.5v.  
x
600 mA, 20 V
 
R

DS(ON)

= 700
 
m
:

ꢀ
@ V

GS

= 4.5 V  
R

DS(ON)

= 850
 
m
:
@ V

GS

= 2.5 V  
Applications  
x
ESD protection diode (note 3)  
x
RoHS Compliant  
x
Li-Ion Battery Pack  
6
5
4
D

1  

6
S

1  

G

1  

D

2  

1
5
4
G

2  

S

2  

2
3
1
2
3
Absolute Maximum Ratings
 
T

A

=25

o

C unless otherwise noted  
Symbol  
Parameter  
Ratings  
Units  
V

DSS  

Drain-Source Voltage  
20  
r
12  
V
V
V

GSS  

I

D  

Gate-Source Voltage  
Drain Current
 
– Continuous  
– Pulsed  
(Note 1a)  
600  
1000  
mA  
P

D  

Power Dissipation (Steady State)  
(Note 1a)  
(Note 1b)  
625  
446  
mW  
T

J

, T

STG  

Operating and Storage Junction Temperature  
Range  
–55 to +150  
q
C  
Thermal Characteristics  
Thermal Resistance, Junction-to-Ambient
 
(Note 1a)  
Thermal Resistance, Junction-to-Ambient
 
(Note 1b)  
200  
280  
R

T
JA  

R

T
JA  

q
C/W  
Package Marking and Ordering Information  
Device Marking  
Device  
Reel Size  
Tape width  
Quantity  
C
FDY3000NZ  
7 ’’  
8 mm  
3000 units  
”
200
7
Fairchild Semiconductor Corporation  
FDY3000NZ Rev
B
 

Electrical Characteristics  
T

A

= 25°C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min Typ
 
Max Units  
Off Characteristics  
BV

DSS  

Drain–Source Breakdown  
20  
V
V

GS

= 0 V,  
I

D

= 250
P
A  
Voltage  
Breakdown Voltage Temperature  
14  
‘
BV
DSS  
ꢀꢀꢀ’
T

J  

I

DSS  

I

D

= 250
P
A, Referenced to 25
q
C  
mV/
q
C  
Coefficient  
Zero Gate Voltage Drain Current
 
V

DS

= 16 V,  
V

GS

= 0 V  
V

GS

=
r
12 V,
 
V

DS

= 0 V  
V

GS

=
r
4.5 V,
 
V

DS

= 0 V  
1
r
10  
r
1  
P
A  
P
A  
P
A  
I

GSS  

Gate–Body Leakage,  
On Characteristics  
(Note 2)  
V

GS(th)  

Gate Threshold Voltage  
0.6  
1.0  
–
3  
1.
3
 
V
V

DS

= V

GS  

,
I

D

= 250
P
A  
Gate Threshold Voltage  
‘
V

GS(th)  

ꢀꢀꢀ’
T

J  

R

DS(on)  

I

D

= 250
P
A, Referenced to 25
q
C  
mV/
q
C  
Temperature Coefficient  
Static Drain–Source  
On–Resistance  
V

GS

= 4.5 V,  
V

GS

= 2.5 V,  
V

GS

= 1.8 V,  
V

GS

= 4.5 V, I

D

=600mA, T

J

= 125
q
C  
V

DS

= 5 V,  
I

D

= 600 mA  
I

D

= 500 mA  
I

D

= 150 mA  
0.25 0.70  
0.37 0.85  
0.73 1.25  
0.35 1.00  
:
g

FS  

Forward Transconductance  
I

D

= 600 mA  
1.8  
S
Dynamic Characteristics  
C

iss  

C

oss  

C

rss  

Input Capacitance  
60  
20  
10  
pF  
pF  
pF  
V

DS

= 10 V,  
f = 1.0 MHz  
V

GS

= 0 V,  
Output Capacitance  
Reverse Transfer Capacitance  
Switching Characteristics
 
(Note 2)  
t

d(on)  

t

r  

t

d(off)  

t

f  

Turn–On Delay Time  
Turn–On Rise Time  
Turn–Off Delay Time  
Turn–Off Fall Time  
Total Gate Charge  
Gate–Source Charge  
Gate–Drain Charge  
6
8
12  
16  
ns  
ns  
V

DD

= 10 V,  
V

GS

= 4.5 V,  
I

D

= 1 A,  
R

GEN

= 6
:  
8
16  
ns  
2.4  
0.8  
0.16  
0.26  
4.8  
1.1  
ns  
Q

g  

Q

gs  

Q

gd  

nC  
nC  
nC  
V

DS

= 10 V,  
I

D

= 600 mA,  
V

GS

= 4.5 V  
Drain–Source Diode Characteristics and Maximum Ratings  
V

SD  

Drain–Source Diode Forward  
Voltage  
V

GS

= 0 V,
 
I

S

= 150 mA
 
(Note 2)  
0.7  
1.2  
V
t

rr  

Diode Reverse Recovery Time  
I

F

= 600 mA,  
dI

F

/dt = 100 A/µs  
8
1
nS  
nC  
Q

rr  

Diode Reverse Recovery Charge  
Notes:  
1
.  
R

T
JA

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of  
the drain pins. R

T
JC

is guaranteed by design while R

T
CA

is determined by the user’s board design  
a)  
200°C/W when  
b) 280°C/W when mounted on a  
minimum pad of 2 oz copper  
Scale 1 : 1 on letter size paper  
mounted on a 1in

2

pad  
of 2 oz copper  
2
.
Pulse Test: Pulse Width < 300
P
s,  
Duty Cycle
 
< 2.0%  
3. The diode connected between the gate  
and source serves only as protection  
againts ESD.
 
No gate overvoltage  
rating is implied.  
FDY3000NZ Rev
B
 

Typical Characteristics  
1
2.6  
2.4  
2.2  
2
V

GS

= 4.5V  
3.5V  
3.0V  
2.5V  
V

GS

= 2.0V  
0.8  
0.6  
0.4  
0.2  
0
2.0V  
1.8  
1.6  
1.4  
1.2  
1
2.5V  
3.0V  
3.5V  
4.5V  
0.8  
0
0.2  
0.4  
0.6  
0.8  
1
0
0.25  
0.5  
0.75  
1
I

D

, DRAIN CURRENT (A)  
V

DS

, DRAIN-SOURCE VOLTAGE (V)  
Figure 1. On-Region Characteristics.  
Figure 2. On-Resistance Variation with  
Drain Current and Gate Voltage.  
1
1.6  
I

D

= 600mA  
I

D

= 300mA  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
V

GS

= 4.5V  
1.4  
1.2  
1
T

A

= 125

o

C  
T

A

= 25

o

C  
0.8  
0.6  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
1
2
3
4
5
T

J

, JUNCTION TEMPERATURE (

o

C)  
V

GS

, GATE TO SOURCE VOLTAGE (V)  
Figure 3. On-Resistance Variation with  
Temperature.  
Figure 4. On-Resistance Variation with  
Gate-to-Source Voltage.  
1
1
V

GS

= 0V  
V

DS

= 5V  
0.8  
0.1  
T

A

= 125

o

C  
0.6  
0.4  
0.2  
0
0.01  
25

o

C  
T

A

= 125

o

C  
-55

o

C  
25

o

C  
-55

o

C  
0.001  
0.0001  
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
0.5  
1
1.5  
2
2.5  
V

SD

, BODY DIODE FORW
 
ARD VOLTAGE (V)  
V

GS

, GATE TO SOURCE VOLTAGE (V)  
Figure 5. Transfer Characteristics.  
Figure 6. Body Diode Forward Voltage Variation  
with Source Current and Temperature.  
FDY3000NZ Rev
B
 

Typical Characteristics  
5
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
f = 1MHz  

GS

= 0 V  
I

D

= 600mA  
V
4
V

DS

= 5V  
C

iss  

10V  
15V  
3
2
1
0
C

oss  

C

rss  

0
0.2  
0.4  
0.6  
0.8  
1
0
4
8
12  
16  
20  
Q

g

, GATE CHARGE (nC)  
V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
Figure 7. Gate Charge Characteristics.  
Figure 8. Capacitance Characteristics.  
10  
30  
25  
20  
15  
10  
5
SINGLE PULSE  
R

T
JA

= 280°C/W  
T

A

= 25°C  
R

DS(ON)

LIMIT  
1ms  
1
0.1  
10ms  
100ms  
10s  
1s  
DC  
V

GS

= 4.5V  
SINGLE PULSE  
R

T
JA

= 280

o

C/W  
T

A

= 25

o

C  
0
0.01  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
0.1  
1
10  
100  
t

1

, TIME (sec)  
V

DS

, DRAIN-SOURCE VOLTAGE (V)  
Figure 9. Maximum Safe Operating Area.  
Figure 10. Single Pulse Maximum  
Power Dissipation.  
1
D = 0.5  
R

T
JA

(t) = r(t) * R

T
JA  

R

T
JA

=280 °C/W  
0.2  
P(pk)  
0.1  
0.1  
0.05  
t

1  

t

2  

0.02  
0.01  
T

J

– T

A

= P * R

T
JA

(t)  
Duty Cycle, D = t

1

/ t

2  

SINGLE PULSE  
0.01  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
t

1

, TIME (sec)  
Figure 11. Transient Thermal Response Curve.  
Thermal characterization performed using the conditions described in Note 1b.  
Transient thermal response will change depending on the circuit board design.  
FDY3000NZ Rev
B
 

SOT−563  
CASE 419BH  
ISSUE O  
1.70  
1.50  
A
B
6
1
4
1.42  
0.72  
1.30  
1.10  
1.70  
1.50  
0.1 C B A  
3
0.30  
0.50  
0.20  
0.50  
0.50  
LAND PATTERN  
RECOMMENDATION  
TOP VIEW  
0.60  
0.50  
C
SEATING PLANE  
0.10  
0.00  
0.20  
0.08  
0.05 C  
C
NOTES: UNLESS OTHERWISE SPECIFIED.  
A. REFERENCE TO JEDEC MO293.  
B. ALL DIMENSIONS ARE IN MILLIMETERS.  
C
DOES NOT COMPLY JEDEC STANDARD VALUE  
0.30  
0.10  
0.46  
0.20  
C
D. DIMENSIONS ARE EXCLUSIVE OF BURRS,  
MOLD FLASH AND TIE BAR PROTRUSION.  
E. DIMENSION AND TOLERANCE AS PER ASME  
Y14.5−2009.  
F. LANDPATTERN RECOMMENDATION GENERATED  
WITH IPC LANDPATTERN GENERATOR  
0.31  
0.15  
0.10  
0.05  
M
M
C A B  
C
BOTTOM VIEW  

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arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized  
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and  
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such  
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literature is subject to all applicable copyright laws and is not for resale in any manner.  
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