onsemi-FDZ197PZ
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December 2014
FDZ197PZ
P-Channel 1.5 V Specified PowerTrench
®
Thin WL-CSP MOSFET
-20 V, -3.8 A, 64 m
Ω
Features
General Description
Max r
DS(on)
= 64 m
Ω
at V
GS
= -4.5
V
,
I
D
= -2.0 A
Max r
DS(on)
= 71 m
Ω
at V
GS
= -2.5
V
,
I
D
= -2.0 A
Max r
DS(on)
= 79 m
Ω
at V
GS
= -1.8
V
,
I
D
= -1.0 A
Max r
DS(on)
= 95 m
Ω
at V
GS
= -1.5
V
,
I
D
= -1.0 A
Designed on Fairchild’s advanced 1.5 V PowerTrench
®
process
with state of the art “fine pitch” WLCSP packaging process, the
FDZ197PZ minimizes both PCB space and r
DS(on)
. This
advanced WLCSP MOSFET embodies a breakthrough in
packaging technology which enables the device to combine
excellent thermal transfer characteristics, ultra-low profile
Occupies only 1.5 mm
2
of PCB area.Less than 50% of the
packaging, low gate charge, and low r
DS(on)
.
area of 2 x 2 BGA
Applications
Ultra-thin package:
less than 0.65 mm height when mounted
to PCB
Battery management
Load switch
HBM ESD protection level > 4400V (Note3)
RoHS Compliant
Battery protection
PIN1
S
S
D
G
S
D
TOP
BOTTOM
WL-CSP 1×1.5 Thin
MOSFET Maximum Ratings
T
A
= 25 °C unless otherwise noted
Symbol
V
DS
V
GS
Parameter
Ratings
-20
Units
Drain to Source Voltage
Gate to Source Voltage
V
V
±8
-Continuous
-Pulsed
Power Dissipation
Power Dissipation
T
A
= 25°C
(Note 1a)
-3.8
I
D
A
-15
T
A
= 25°C
T
A
= 25°C
(Note 1a)
(Note 1b)
1.9
P
D
W
0.9
T
J
, T
STG
Operating and Storage Junction
T
e
mperature Range
-55 to +150
°C
Thermal Characteristics
R
θ
JA
R
θ
JA
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
(Note 1a)
(Note 1b)
65
°C/W
133
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
7 ”
Tape Width
8 mm
Quantity
7
FDZ197PZ
WL-CSP 1×1.5 Thin
5000 units
1
©2009 Fairchild Semiconductor Corporation
FDZ197PZ Rev.C3
Electrical Characteristics
T
J
= 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain to Source Breakdown Voltage
I
D
= -250
µ
A, V
GS
= 0 V
-20
V
∆
BV
DSS
∆
T
J
Breakdown Voltage
T
e
mperature
Coefficient
I
D
= -250
µ
A, referenced to 25 °C
-10
mV/°C
I
DSS
I
GSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
DS
= -16 V, V
GS
= 0 V
V
GS
= ±8 V, V
DS
= 0 V
-1
µ
A
µ
A
±10
On Characteristics
V
GS(th)
Gate to Source Threshold Voltage
V
GS
= V
DS
, I
D
= -250
µ
A
-0.4
-0.5
2.7
-1.0
V
∆
V
GS(th)
∆
T
J
Gate to Source Threshold Voltage
T
e
mperature Coefficient
I
D
= -250
µ
A, referenced to 25 °C
mV/°C
V
GS
= -4.5 V, I
D
= -2.0 A
V
GS
= -2.5 V, I
D
= -2.0 A
V
GS
= -1.8 V, I
D
= -1.0 A
V
GS
= -1.5 V, I
D
= -1.0 A
46
53
59
68
64
71
79
95
r
DS(on)
Static Drain to Source On Resistance
Forward Transconductance
m
Ω
V
GS
= -4.5 V, I
D
= -2.0 A,
T
J
=125 °C
54
21
84
g
FS
V
DD
= -5 V, I
D
= -3.8 A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
1180
190
160
1570
255
pF
pF
pF
V
DS
= -10 V, V
GS
= 0 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
225
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Rise Time
5.8
5.9
311
280
18
12
12
ns
ns
V
DD
= -10
V
,
I
D
= -3.8 A,
V
GS
= -4.5 V, R
GEN
= 6
Ω
Turn-Off Delay Time
Fall Time
498
448
25
ns
ns
Q
g
T
o
tal Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
V
GS
= 0V to -4.5V
V
DD
= -10
V
,
nC
nC
nC
Q
gs
Q
gd
1.5
4.7
I
D
= -3.8 A
Drain-Source Diode Characteristics
V
SD
t
rr
Source to Drain Diode
Forward Voltage
Reverse Recovery Time
V
GS
= 0 V, I
S
= -1.1 A
(Note 2)
-0.6
194
344
-1.2
310
550
V
ns
nC
I
F
= -3.8 A, di/dt = 100 A/
µ
s
Q
rr
Reverse Recovery Charge
Notes:
2
1. R
is determined with the device mounted on a 1 in
pad 2 oz copper pad on a 1.5 x 1.5
in. board of FR-4 material. R
is guaranteed by design while R
is determined by
θ
JA
θ
JC
θ
CA
the user’s board design.
a. 65 °C/W when mounted
on
a 1 in
pad of
2 oz
copper.
b. 133 °C/W when mounted on
a
minimum pad of 2 oz copper.
2
2. Pulse Test: Pulse Width < 30
0
µ
s, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection ESD. No gate overvoltage rating is implied.
©2009 Fairchild Semiconductor Corporation
FDZ197PZ Rev.C3
2
Typical Characteristics
T
J
= 25 °C unless otherwise noted
15
2.5
2.0
1.5
1.0
0.5
PULSE DURATION = 80
µ
s
DUTY CYCLE = 0.5% MAX
12
V
GS
= -4.5 V
V
GS
= -3 V
9
V
GS
= -1.5 V
V
GS
= -2.5 V
V
GS
= -1.8 V
V
GS
= -1.8 V
6
V
GS
= -2.5 V
V
GS
= -1.5 V
3
PULSE DURATION = 80
µ
s
DUTY CYCLE = 0.5% MAX
V
GS
= -3 V
V
GS
= -4.5 V
12
0
0
1
2
3
0
3
6
9
15
4.5
1.2
-V
DS
,
DRAIN TO SOURCE VOLTAGE (V)
-I
D
,
DRAIN CURRENT (A)
Figure 1.
On-Region Characteristics
Figur
e
2
. N
o r m a l i z e d O n – R e s i s ta n c e
vs Drain Current and Gate Voltage
1.4
150
I
D
= -2 A
I
D
= -2 A
PULSE DURATION = 80
µ
s
V
GS
= -4.5 V
DUTY CYCLE = 0.5% MAX
1.2
1.0
0.8
0.6
120
90
T
J
= 125
o
C
60
T
J
= 25
o
C
30
-75 -50 -25
T
J
0
25 50 75
100 125 150
1.0
1.5
2.0
2.5
3.0
3.5
4.0
,
JUNCTION TEMPERATURE
( )
o
C
-V
GS
,
GATE TO SOURCE VOLTAGE (V)
F i gu re 3 .
N orma li zed
On – Res is ta nc e
vs Junction Temperature
Figur
e
4
. On-Resistance vs Gate to
Source Voltage
15
12
9
20
10
V
GS
= 0 V
PULSE DURATION = 80
DUTY CYCLE = 0.5% MAX
µ
s
V
DS
= -5 V
1
T
J
= 150
o
C
T
J
= 25
o
C
0.1
6
T
J
= 25
o
C
T
J
= 150
o
C
0.01
0.001
T
J
= -55
o
C
3
T
J
= -55
o
C
0
0.0
0.5
1.0
1.5
2.0
0.0
0.2
0.4
0.6
0.8
1.0
-V
GS
, GATE TO SOURCE VOLTAGE (V)
-V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5.
Transfer Characteristics
Figur
e
6
. Source to Drain Diode
Forward Voltage vs Source Current
©2009 Fairchild Semiconductor Corporation
FDZ197PZ Rev.C3
3
Typical Characteristics
T
J
= 25 °C unless otherwise noted
4.5
3000
1000
I
D
= -3.8 A
V
DD
= -8 V
C
iss
3.0
V
DD
= -10 V
V
DD
= -12 V
1.5
C
oss
f = 1 MHz
= 0 V
C
rss
V
GS
0.0
100
0.1
0
3
6
9
12
15
18
1
10
20
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q ,
GATE CHARGE (nC)
g
Figure 7.
Gate Charge Characteristics
Figur
e
8
. C
a p a c i t a n c e v s
D r a i n
to Source Voltage
20
10
10
100
µ
s
1 ms
T
J
= 25
o
C
1
0.1
10 ms
1
THIS AREA IS
T
J
= 125
o
C
LIMITED BY r
DS(on)
100 ms
1 s
SINGLE PULSE
T
J
= MAX RATED
R
θ
JA
= 133
o
C/W
T
A
= 25
o
C
DC
0.01
0.1
0.01
0.1
1
10
100
1000
0.1
1
10
50
t
AV
, TIME IN AVALANCHE (ms)
-V
DS
, DRAIN to SOURCE VOLTAGE (V)
F i g u r e 9 .
U n c l a m p e d I n d u c t i v e
Switching Capability
Figure 10.
Forward Bias Safe
Operating Area
10
-2
10
-3
10
-4
10
-5
10
-6
10
-7
10
-8
10
-9
200
100
V
GS
= 0 V
SINGLE PULSE
R
θ
JA
= 133
o
C/W
T
A
= 25
o
C
T
J
= 125
o
C
10
T
J
= 25
o
C
1
0.5
0
3
-V
GS
6
9
12
,
GATE TO SOURCE VOLTAGE (V)
15
10
-4
10
-3
10
-2
t, PULSE WIDTH (sec)
10
-1
1
10
100 1000
Figure 11.
Gate Leakage
Current vs
Gate to Source Voltage
Figure 12.
Single Pulse Maximum
Power Dissipation
©2009 Fairchild Semiconductor Corporation
FDZ197PZ Rev.C3
4
Typical Characteristics
T
J
= 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05
0.02
0.01
P
DM
0.1
t
1
t
2
SINGLE PULSE
R
θ
JA
= 133
o
C/W
NOTES:
DUTY FACTOR: D = t /t
1
2
0.01
PEAK T
= P
J
x Z
x R
+ T
DM
θ
JA
θ
JA
A
0.005
10
-4
10
-3
10
-2
10
-1
t, RECTANGULAR PULSE DURATION (sec)
1
10
100
1000
Figure 13.
Transient Thermal Response Curve
©2009 Fairchild Semiconductor Corporation
FDZ197PZ Rev.C3
5
Dimensional Outline and Pad Layout
Pin Definations:
Gate
A1
Drain
Source
C1, C2
A2, B1, B2
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
©2009 Fairchild Semiconductor Corporation
FDZ197PZ Rev.C3
6
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The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
intended to be an exhaustive list of all such trademarks.
OPTOPLANAR
®
AccuPower
AttitudeEngine™
Awinda
®
F-PFS
®*
FRFET
®
Global Power Resource
SM
GreenBridge
Green FPS
Green FPS
e-Series
G
max
TinyBoost
®
TinyBuck
®
TinyCalc
TinyLogic
®
TINYOPTO
TinyPower
TinyPWM
TinyWire
TranSiC
®
AX-CAP
®
*
PowerTrench
®
PowerXS™
Programmable Active Droop
QFET
®
BitSiC
Build it Now
CorePLUS
CorePOWER
CROSSVOLT
CTL
Current Transfer Logic
DEUXPEED
®
Dual Cool™
EcoSPARK
®
EfficientMax
GTO
IntelliMAX
QS
Quiet Series
RapidConfigure
ISOPLANAR
Making Small Speakers Sound Louder
and Better™
MegaBuck
MICROCOUPLER
MicroFET
TriFault Detect
TRUECURRENT
®
*
μ
SerDes
Saving our world, 1mW/W/kW at a time™
SignalWise
SmartMax
SMART START
Solutions for Your Success
SPM
®
ESBC
MicroPak
®
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®
MicroPak2
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MotionMax
MotionGrid
®
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UniFET
VCX
VisualMax
VoltagePlus
XS™
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FACT
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®
SuperSOT
-3
MTi
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-6
SuperSOT
-8
SupreMOS
®
SyncFET
Sync-Lock™
MTx
®
FAST
®
MVN
®
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FPS
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®
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OptoHiT
仙童
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®
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THEREIN, WHICH COVERS THESE PRODUCTS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life
support devices or systems are devices or systems which, (a) are
intended for surgical implant into the body or (b) support or sustain
life, and (c) whose failure to perform when properly used in
accordance with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the user.
2. A
critical component in any component of a life support, device, or
system whose failure to perform can be reasonably expected to
cause the failure of the life support device or system, or to affect its
safety or effectiveness.
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.
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Definition of Terms
Datasheet Identification
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Definition
Datasheet contains the design specifications for product development. Specifications may change
in any manner without notice.
Advance Information
Formative / In Design
Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild
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Rev. I73
7
FDZ197PZ Rev.C3
