onsemi-FQD2P40TF
| Part # | onsemi-FQD2P40TF |
Download  | onsemi-FQD2P40TF |
October 2008
QFET
®
FQD2P40 / FQU2P40
400V P-Channel MOSFET
General Description
Features
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
•
•
•
•
•
•
•
-1.56A, -400V, R
= 6.5
Ω
@V =
-10 V
DS(on) GS
Low gate charge ( typical 10 nC)
Low Crss ( typical
6.5 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
RoHS
C
ompliant
This advanced technology is especially tailored to minimize
on-state
resistance,
provide
superior
switching
performance, and withstand a high energy pulse in the
avalanche and commutation modes. These devices are
well suited for electronic lamp ballasts based on the
complementary half bridge topology.
S
!
D
●
●
G
!
▶
▲
●
I-PAK
FQU Series
D-PAK
FQD Series
G
S
G
D
S
!
D
Absolute Maximum Ratings
T =
25°C unless otherwise noted
C
Symbol
Parameter
FQD2P40 / FQU2P40
Units
V
V
I
Drain-Source Voltage
-400
-1.56
-0.98
-6.24
±
30
DSS
– Continuous (T
= 25°C)
Drain Current
A
D
C
– Continuous (T
= 100°C)
A
C
I
(Note 1)
Drain Current
– Pulsed
A
DM
V
E
I
Gate-Source Voltage
V
GSS
AS
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Single Pulsed Avalanche Energy
Avalanche Current
120
mJ
A
-1.56
3.8
AR
E
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
mJ
V/ns
W
AR
dv/dt
-4.5
Power Dissipation (T
= 25°C) *
2.5
P
A
D
Power Dissipation (T
= 25°C)
38
W
C
– Derate above 25°C
Operating and Storage
T
e
mperature Range
0.3
W/°C
°C
T , T
-55 to +150
J
STG
Maximum lead temperature for soldering purposes,
1/8
”
from case for 5 seconds
T
300
°C
L
Thermal Characteristics
Symbol
Parameter
Typ
—
Max
3.29
50
Units
°C
/
W
°C
/
W
°C
/
W
R
R
R
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
θ
JC
θ
JA
θ
JA
—
—
110
* When mounted on the minimum pad size recommended (PCB Mount)
2008 Fairchild Semiconductor Internationa
Rev. A
3
,
October
200
8
Elerical Characteristics
T =
25°C unless otherwise noted
C
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
V
= 0
V
, I
=
–
250
µ
A
GS D
Drain-Source Breakdown Voltage
-400
—
—
–
—
—
V
DSS
∆
BV
Breakdown Voltage
T
e
mperature
Coefficient
DSS
J
I
= -250
µ
A, Referenced to 25°C
V/°C
D
/
I
∆
T
V
V
V
V
= -400
V
, V
= 0 V
—
—
—
—
—
—
—
—
-1
µ
A
µ
A
nA
nA
DSS
DS
GS
Zero Gate Voltage Drain Current
= -320
V
, T
=
1
25°C
-10
DS
GS
GS
C
I
I
= -30
V
, V
= 0 V
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
-100
100
GSSF
DS
= 30
V
, V
= 0 V
GSSR
DS
On Characteristics
V
V
V
V
= V
, I
= -250
µ
A
Gate Threshold Voltage
-3.0
—
—
-5.0
6.5
—
V
Ω
S
GS(th)
DS
GS
DS
GS
D
R
Static Drain-Source
On-Resistance
DS(on)
= -10
V
, I
=
–
0.78 A
5.0
D
g
= -50
V
, I
=
–
0.78 A
(Note 4)
Forward Transconductance
—
1.26
FS
D
Dynamic Characteristics
C
C
C
Input Capacitance
—
—
—
270
45
350
60
pF
pF
pF
iss
V
= -25
V
, V
= 0 V,
GS
DS
Output Capacitance
oss
rss
f = 1.0 MHz
Reverse Transfer Capacitance
6.5
8.5
Switching Characteristics
t
t
t
t
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
T
o
tal Gate Charge
Gate-Source Charge
Gate-Drain Charge
—
—
—
—
—
—
—
9
30
75
55
60
13
—
ns
ns
d(on)
V
= -200
V
, I
=
–
2.0 A,
DD
D
33
22
25
10
2.1
5.5
r
R
= 25
Ω
G
ns
d(off)
f
(Note 4, 5)
ns
Q
Q
Q
nC
nC
nC
g
V
V
= -320
V
, I
= -2.0 A,
DS
D
= -10 V
gs
gd
GS
(Note 4, 5)
—
Drain-Source Diode Characteristics and Maximum Ratings
I
Maximum Continuous Drain-Source Diode Forward Current
—
—
—
—
—
—
—
-1.56
-6.24
-5.0
—
A
A
S
I
Maximum Pulsed Drain-Source Diode Forward Current
SM
V
t
V
V
= 0
V
, I
=
–
1.56 A
Drain-Source Diode Forward Voltage
Reverse Recovery Time
—
V
SD
GS
S
= 0
V
, I
=
–
2.0 A,
250
0.85
ns
µ
C
rr
GS
S
(Note 4)
dI /
dt = 100 A/
µ
s
Q
Reverse Recovery Charge
—
F
rr
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 86mH, I
= -1.56A, V
= -50V, R
= 25
Ω,
Starting T =
25°C
AS
DD
G
J
3. I
≤
-2.0A, di/dt
≤
200A/
µ
s, V
≤
BV
Starting T =
25°C
SD
DD
DSS,
J
4. Pulse Test : Pulse width
≤
300
µ
s, Duty cycle
≤
2%
5. Essentially independent of operating temperature
©200
8
Fairchild Semiconductor International
Rev. A
3
,
October
200
8
Typical Characteristics
V
GS
Top :
-15.0 V
-10.0 V
-8.0 V
-7.0 V
-6.5 V
-6.0 V
10
0
Bottom :
-5.5 V
10
0
℃
150
-1
10
℃
25
※
Notes :
※
Notes :
μ
1. 250
s Pulse Test
℃
-55
1. V
D
S
= -50V
℃
2. T
C
= 25
μ
2. 250
s Pulse Test
-2
-1
10
10
-1
10
0
10
1
2
4
6
8
10
10
-V
GS
, Gate-Source Voltage
[V]
-V
DS
, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
12
10
8
V
G
S
= – 10V
V
G
S
= – 20V
10
0
6
℃
25
℃
150
※
Notes :
1. V
G
S
= 0V
※
℃
Note : T = 25
J
μ
2. 250
s Pulse Test
-1
4
10
0.0
0.5
1.0
1.5
2.0
2.5
3.0
0
1
2
3
4
5
6
-I
D
, Drain Current
[A]
-V
SD
, Source-Drain Voltage
[V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
12
10
8
600
500
400
300
200
100
0
C
iss
=
C
gs
+ C
gd
(C
ds
= shorted)
C
oss
= C
ds
+ C
gd
C
rss
= C
gd
V
DS
= -80V
V
DS
= -200V
V
DS
= -320V
C
iss
6
C
oss
※
Notes :
1. V
GS
= 0 V
2. f = 1 MHz
4
C
rss
2
※
Note : I
D
= -2.0 A
10
0
-1
10
10
0
10
1
0
2
4
6
8
12
-V
DS
,
D
rain-Source Voltage [V]
Q
G
, Total Gate Charge [nC]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
©200
8
Fairchild Semiconductor International
Rev. A
3
,
October
200
8
Typical Characteristics
(Continued)
1.2
1.1
1.0
2.5
2.0
1.5
1.0
0.5
0.0
※
N
otes :
1. V
G
S
= 0 V
2. I
D
= -250
μ
A
0.9
※
Notes :
1. V
GS
= -10 V
2. I
D
= -1.0 A
0.8
-100
-100
-50
0
50
100
150
200
-50
0
50
100
150
200
T
J
, Junction Temperature [
o
C]
T,
J
unction Temperature [
o
C
]
J
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
1.8
1.5
1.2
0.9
0.6
0.3
0.0
Operation in This Area
is Limited by R
DS(on)
10
1
10
0
100
µ
s
1 ms
10 ms
DC
-1
10
※
Notes :
1. T
C
= 25
o
2. T
J
= 150
o
3. Single Pulse
C
C
-2
10
10
0
10
1
10
2
10
3
25
50
75
100
125
150
℃
T
C
, Case Temperature [
]
-V
DS
, Drain-Source Voltage [V]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
D = 0
.
5
1 0
0
※
N o
t
e s
:
℃
/W M
a x .
1 .
Z
θ
C
(
t)
=
3
.
2 9
2 .
D u
t
y
F a c to r,
D = t
1
/
t
2
3 .
T
J M
T
C
P
D
Z
θ
C
(
t)
0
.
2
J
–
=
*
M
J
0
.
1
0
.
0 5
0
.
0 2
P
DM
1 0
–
1
0
.
0 1
t
1
s in g le
p u ls e
t
2
1 0
–
5
1 0
–
4
1 0
–
3
1 0
–
2
1 0
–
1
1 0
0
1 0
1
t
1
, S
q u a
r
e
W a
v e
P u ls e
D u ra tio n
[s e c ]
Figure 11. Transient Thermal Response Curve
©200
8
Fairchild Semiconductor International
Rev. A
3
,
October
200
8
Gate Charge Test Circuit & Waveform
V
GS
Same Type
50K
Ω
as DUT
Q
g
12V
200nF
-10V
300nF
V
DS
V
GS
Q
gs
Q
gd
DUT
-3mA
Charge
Resistive Switching Test Circuit & Waveforms
R
L
t
on
t
off
V
DS
t
d(on)
t
r
t
d(off)
t
f
V
DD
V
GS
V
GS
R
G
10%
DUT
-10V
90%
V
DS
Unclamped Inductive Switching Test Circuit & Waveforms
BV
DSS
——————–
BV
DSS
– V
DD
L
1
2
2
—-
E
AS
=
L
I
AS
V
DS
I
D
t
p
Time
V
DD
V
DS
(t)
R
G
V
DD
I
D
(t)
DUT
-10V
I
AS
t
p
BV
DSS
©200
8
Fairchild Semiconductor International
Rev. A
3
,
October
200
8
Peak Diode Recovery dv/dt Test Circuit & Waveforms
+
V
DS
DUT
_
I
SD
L
Driver
R
G
Compliment of DUT
(N-Channel)
V
DD
V
GS
• dv/dt controlled by
R
G
• I
SD
controlled by pulse period
Gate Pulse Width
————————–
V
GS
D =
Gate Pulse Period
10V
( Driver )
Body Diode Reverse Current
I
RM
I
SD
( DUT )
di/dt
I
FM
, Body Diode Forward Current
V
SD
V
DS
( DUT )
Body Diode
V
DD
Forward Voltage Drop
Body Diode Recovery dv/dt
©200
8
Fairchild Semiconductor International
Rev. A
3
,
October
200
8
Mechanical Dimensions
D – PAK
Dimensions in Millimeters
©200
8
Fairchild Semiconductor International
Rev. A
3
,
October
200
8
Mechanical Dimensions
I – PAK
Dimensions in Millimeters
©200
8
Fairchild Semiconductor International
Rev. A
3
,
October
2
008
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Datasheet Identification
Product Status
Definition
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
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Not In Production
Rev. I37
F
QD2P40
/ F
QU2P40
Rev. A
3
