onsemi-FQP2N90

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Decem
ber
2013  
FQP2N90  
N-Channel QFET

®

MOSFET  
9
00
V,
2.2
A,
7.2
Ω  
Description  
Features  
•
2.2
A,
9
00
V, R

DS(on)

=
7.2
Ω
(Max.) @ V

GS

= 10 V,  
I

D

=
1.1
A  
This N-Channel enhancement mode power MOSFET is  
produced using Fairchild Semiconductor’s proprietary planar  
stripe and DMOS technology. This advanced MOSFET  
technology has been especially tailored to reduce on-state  
resistance, and to provide superior switching performance  
and high avalanche energy strength. These devices are  
suitable for switched mode power supplies, active power  
factor correction (PFC), and electronic lamp ballasts.  
•
•
•
Low Gate Charge (Typ.
12
nC)  
Low Crss (Typ.
5.5
pF)  
100% Avalanche Tested  
D
G
G
D
S
TO-220  
S
Absolute Maximum Ratings  
T =
 
25°C unless otherwise noted
.  
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1/8″ from Case for 5 Seconds.  
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Thermal Characteristics  
ꢀꢁꢂꢃꢄꢅ  
ꢆꢇꢈꢇꢂꢉꢊꢉꢈ  
FQP2N90  
1.47  
ꢋꢌꢍꢊ  
6ꢀ
ꢀ
?
 
6ꢀ
ꢀ
?
 
+
Thermal Resistance, Junction-to-Case, Max.  
Thermal Resistance, Junction-to-Ambient, Max.  
θ
ꢀꢁ  
θ
ꢀꢂ  
+
-‘ &
 
©2000 Fairchild Semiconductor Corporation  
FQP2N90
Rev. C
1  
1

Package Marking and Ordering Information  
Part Number  
Top Mark  
Package  
Packing Method
 
Reel Size  
N/A  
Tape Width  
Quantity  
FQP2N90  
TO-220  
N/A  
50
units  
FQP2N90  
Tube  
Electrical Characteristics  
T =
 
25°C unless otherwise noted.  
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Notes:  
1. Repetitive
r
ating :
p
ulse
–
width limited by maximum junction temperature
.  
2. L =
65
mH, I
 
=
2.2
A, V
 
= 50 V, R
 
= 25
Ω,
s
tarting T =
 
25°C
.  
AS  
DD  
G
J
I
≤
2.2
A, di/dt
≤
200 A/
µ
s , V
 
≤
BV  
s
tarting T =
 
25°C
.  
3.  
SD  
DD  
DSS,  
J
4. Essentially independent of operating temperature
.  
©2000 Fairchild Semiconductor Corporation  
FQP2N90
Rev. C
1  
2

ꢀ !ꢁꢂꢃꢄꢅꢆꢇꢃꢈꢃꢂꢉꢊꢈꢁꢋꢉꢁꢂꢋ
 
ꢀ
ꢀ
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢊ

ꢃ
ꢂ  

ꢆꢂꢋꢀꢅꢀꢀꢀꢀꢀꢀꢀꢌꢉꢍꢎꢀꢊ
 
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢌꢎꢍꢎꢀꢊ
 
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢏꢍꢎꢀꢊ
 
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢐꢍꢎꢀꢊ
 
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢑꢍꢉꢀꢊ
 
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢑꢍꢎꢀꢊ
 
ꢀꢁ

ꢂ  

ꢒꢂꢃꢃꢂꢓꢀꢅꢀꢀꢀꢀꢉꢍꢉꢀꢊ
 
ꢃꢆꢄ
ꢀ
 
ꢄ
ꢃꢄ  
ꢂꢆ
ꢀ  
ꢀꢁ  
ꢀꢁ  
ꢅꢆꢆ
ꢀ  
ꢀ
ꢀꢁꢂꢃꢄꢅꢀꢆ  
ꢀ
ꢀꢁꢂꢃꢄꢔꢀꢅ
 
ꢀꢀꢀꢇꢈꢀꢉ

ꢁ
ꢂ

ꢀꢊꢀꢋꢌꢉ  
ꢁ
ꢀꢀꢀꢍꢈꢀꢍꢋꢌ ꢅꢀꢎꢏꢐꢅꢄꢀꢑꢄꢅꢃ  
ꢂ
ꢀꢀꢀꢌꢍꢀꢈꢉꢎ
 
ꢔꢀꢕꢖꢗꢔꢄꢀꢆꢄꢔꢃ
 
ꢁ
ꢀꢀꢀꢈꢍꢀꢆ

ꢄ

ꢀꢇꢀꢈꢉ
 
ꢀꢃ  
ꢀꢁ  
ꢀꢁ  
ꢀꢁ  
ꢂꢃ  
ꢃꢄ  
ꢀꢁ

ꢂ  

ꢀꢁ

ꢁ  

ꢂ
ꢁ
ꢇ
ꢀ
ꢃꢄ  
ꢁ

ꢁ
ꢂ

ꢀꢂꢀꢃꢄꢅꢆꢇꢈꢉꢊꢋꢌꢆꢀꢁꢉꢍꢅꢄꢎꢆꢀꢀꢏꢁꢐ  
 

ꢀ
ꢂ

ꢙꢗꢀꢓꢚꢑꢐ!ꢁꢏꢛꢓ”ꢜꢗ ꢏ#ꢌꢚꢖꢜꢗꢝ ꢞ
 
ꢀꢁꢂꢃꢄꢅꢆ’ꢈꢆꢔꢎꢕꢖꢅꢂꢁꢘꢎꢆꢉꢏꢊꢄꢊꢌꢍꢅꢄꢁꢐꢍꢁꢌꢐ
 
ꢀꢁꢂꢃꢄꢅꢆ%ꢈꢆ#ꢄꢊꢎꢐ&ꢅꢄꢆꢉꢏꢊꢄꢊꢌꢍꢅꢄꢁꢐꢍꢁꢌꢐ
 
ꢗ
ꢀ
ꢃꢂ  
ꢃꢁ  
ꢀꢂ  
ꢀꢁ  
ꢂ
ꢇ
ꢈꢉꢈꢀꢁꢇ  
ꢀꢁ  
ꢇ
ꢈꢉꢈꢃꢁꢇ  
ꢀꢁ  
ꢄ
ꢃꢄ  
ꢃꢆꢄ
ꢀ  
ꢂꢆ
ꢀ  
ꢀ
ꢀꢁꢂꢃꢄꢅꢀꢆ  
ꢀꢀꢀꢇꢈꢀꢉ

ꢃ
ꢂ

ꢀꢊꢀꢌꢉ  
ꢁ
ꢀꢀꢀꢍꢈꢀꢍꢋꢌ ꢅꢀꢎꢏꢐꢅꢄꢀꢑꢄꢅꢃ  
ꢀ
ꢁ
ꢀꢁꢂꢃꢄꢀꢅꢀꢆ
 
ꢀꢇꢀꢈꢉ
 
ꢀ
ꢂꢃ  
ꢃꢄ  
ꢄꢈꢂ  
ꢁ
ꢁ
ꢀ
ꢃ
ꢄ
ꢆ
ꢂ
ꢅ
ꢄꢈꢁ  
ꢄꢈꢇ  
ꢄꢈꢀ  
ꢃꢈꢄ  
ꢃꢈꢂ  
ꢃꢈꢁ  
ꢘ
 
ꢗꢙꢗꢀꢓꢚꢑꢐꢗꢂꢛꢓꢓꢜꢐꢌꢗꢗꢝꢅꢞ
 
ꢁ

ꢂ
ꢀ

ꢀꢂꢀꢈꢉꢊꢋꢌꢆꢇꢑꢋꢄꢒꢓꢀꢁꢉꢍꢅꢄꢎꢆꢀꢀꢏꢁꢐ  
ꢀ
ꢀꢁꢂꢃꢄꢅꢆꢓꢈꢆꢔꢎꢕꢖꢅꢐꢁꢐꢍꢊꢎꢌꢅꢆꢗꢊꢄꢁꢊꢍꢁꢘꢎꢆꢆꢙꢐꢈ
 
ꢚꢄꢊꢁꢎꢆꢉꢃꢄꢄꢅꢎꢍꢆꢊꢎꢛꢆꢒꢊꢍꢅꢆꢗꢘꢜꢍꢊꢂꢅ
 
ꢀꢁꢂꢃꢄꢅꢆꢝꢈꢆꢞꢘꢛ ꢆꢚꢁꢘꢛꢅꢆꢀꢘꢄ!ꢊꢄꢛꢆꢗꢘꢜꢍꢊꢂꢅꢆ
 
ꢗꢊꢄꢁꢊꢍꢁꢘꢎꢆꢙꢐꢈꢆ”ꢘꢃꢄꢌꢅꢆꢉꢃꢄꢄꢅꢎꢍꢆꢊꢎꢛꢆ
 
#ꢅ$ꢋꢅꢄꢊꢍꢃꢄꢅ
 
ꢀ
ꢀ
ꢇꢁꢁ  
ꢆꢁꢁ  
ꢅꢁꢁ  
ꢄꢁꢁ  
ꢃꢁꢁ  
ꢂꢁꢁ  
ꢀꢁꢁ  
ꢁ
ꢅꢁ  
ꢚ

ꢅꢆꢆ

ꢀꢇꢀꢚ

ꢇ
ꢆ

ꢀꢛꢀꢚ

ꢇ
ꢈ

ꢀꢜꢚ

ꢈ
ꢆ

ꢀꢇꢀꢔꢝꢂꢞꢃꢄ !
 
ꢚ

ꢉ
ꢆꢆ

ꢀꢇꢀꢚ

ꢈ
ꢆ

ꢀꢛꢀꢚ
 
ꢇꢈ  
ꢀ
ꢁꢂꢁꢆꢇꢅꢀ  
ꢁꢂꢁꢃꢄꢅꢀ  
ꢅꢁ  
ꢚ

ꢊꢆꢆ

ꢀꢇꢀꢚ
 
ꢇꢈ  
ꢅꢀ  
ꢄ
ꢀ
ꢀ
ꢅꢁ  
ꢊ
ꢉꢇꢇ  
ꢁꢂꢁꢈꢉꢅꢀ  
ꢅꢁ  
ꢊ
ꢃ
ꢈꢇꢇ  
ꢀ
ꢀꢁꢂꢃꢄꢔꢀꢅ
 
ꢀꢀꢀꢌꢍꢀꢊ

ꢃ
ꢂ

ꢀꢇꢀꢎꢀꢊ
 
ꢀꢀꢀꢈꢍꢀ”ꢀꢇꢀꢌꢀ#$%
 
ꢂ
ꢊ
ꢆꢇꢇ  
ꢁ
ꢀ
ꢀꢁꢂꢃꢄꢀꢅꢀꢘ

ꢁ

ꢀꢇꢀꢈꢍꢈꢀꢙ
 
ꢀ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅꢀ  
ꢅꢁ  
ꢅꢂ  
ꢀꢁ  
ꢂ
ꢁ
ꢀꢁ  
ꢀꢁ  
ꢀꢁ  
ꢀ ꢁꢂꢃꢄꢅꢆꢇꢂꢈꢆꢅꢉꢂꢊꢋꢆꢌꢍꢉꢂꢎꢏꢊꢐ  
ꢁ
 

ꢀ
ꢂ

ꢙꢗꢀꢓꢚꢑꢐ!ꢁꢏꢛꢓ”ꢜꢗ ꢏ#ꢌꢚꢖꢜꢗꢝ ꢞ
 
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢆꢉꢊꢋꢊꢌꢁꢍꢊꢎꢌꢅꢆꢉꢏꢊꢄꢊꢌꢍꢅꢄꢁꢐꢍꢁꢌꢐ
 
ꢀꢁꢂꢃꢄꢅꢆꢑꢈꢆꢒꢊꢍꢅꢆꢆꢉꢏꢊꢄꢂꢅꢆꢉꢏꢊꢄꢊꢌꢍꢅꢄꢁꢐꢍꢁꢌꢐ
 
©2000 Fairchild Semiconductor Corporation  
FQP2N90
Rev. C
1  
3

(Continued)  
Typical Characteristics  
ꢗ
ꢀ
ꢃꢉꢁ  
ꢂꢉꢅ  
ꢂꢉꢁ  
ꢀꢉꢅ  
ꢀꢉꢁ  
ꢁꢉꢅ  
ꢁꢉꢁ  
ꢆꢓꢉ  
ꢆꢓꢆ  
ꢆꢓꢅ  
ꢅꢓꢗ  
ꢅꢓꢇ  
ꢀ
ꢉꢊꢋꢌꢍꢎꢉꢏ  
ꢉꢉꢉꢅꢈꢉꢐ ꢉꢑꢉꢀꢉꢐ  
ꢇꢈ  
ꢀ
ꢀꢁꢂꢃꢄꢅꢀꢆ  
ꢁ
ꢓ
ꢉꢉꢉꢁꢈꢉꢒ ꢉꢑꢉꢁꢆꢀꢉ  
ꢉ
ꢀꢀꢀꢇꢈꢀꢉ

ꢃꢂ

ꢀꢊꢀꢇꢌꢀꢉ  
ꢀꢀꢀꢍꢈꢀꢒ

ꢁ

ꢀꢊꢀꢇꢈꢇꢀꢓ  
ꢖꢆꢅꢅ  
ꢖꢄꢅ  
ꢅ
ꢄꢅ  
ꢆꢅꢅ  
ꢆꢄꢅ  
ꢉꢅꢅ  
ꢈꢀꢁꢁ  
ꢈꢅꢁ  
ꢁ
ꢅꢁ  
ꢀꢁꢁ  
ꢀꢅꢁ  
ꢂꢁꢁ  
ꢔ
ꢂ
ꢀꢕꢊꢓꢌꢅꢒꢉꢓꢀꢔꢆꢖꢗꢆꢋꢄꢅꢊꢋꢆꢀꢏ

ꢉ

ꢘ
ꢐ  
ꢚ
ꢂ
ꢃꢛꢔꢑꢕꢘꢋꢆꢑꢃꢚꢍꢈꢜꢍꢇꢉꢘꢔꢇꢍꢃꢝ

ꢇ

ꢞ
  
ꢈ
%
ꢀꢁꢂꢃꢄꢅꢆ-ꢈꢆꢞꢄꢅꢊ.ꢛꢘ!ꢎꢆꢗꢘꢜꢍꢊꢂꢅꢆꢗꢊꢄꢁꢊꢍꢁꢘꢎ
 
ꢙꢐꢈꢆ#ꢅ$ꢋꢅꢄꢊꢍꢃꢄꢅ
 
ꢀꢁꢂꢃꢄꢅꢆ/ꢈꢆꢔꢎꢕꢖꢅꢐꢁꢐꢍꢊꢎꢌꢅꢆꢗꢊꢄꢁꢊꢍꢁꢘꢎ
 
ꢙꢐꢈꢆ#ꢅ$ꢋꢅꢄꢊꢍꢃꢄꢅ
 
ꢀ
ꢀ
ꢁꢈꢆ  
ꢁꢈꢀ  
ꢅꢈꢆ  
ꢅꢈꢀ  
ꢀꢈꢆ  
ꢀꢈꢀ  
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢉꢆꢈꢉꢊꢋꢆꢌꢉꢍꢃꢂꢄꢉ
 
ꢆꢌꢉꢎꢆꢏꢆꢅꢂꢐꢉꢑꢒꢉꢓꢉ

ꢅꢆꢇꢈꢉꢊ  

ꢅ
ꢅꢀ  
ꢆꢅꢅꢁ
µ
ꢊ  
ꢆꢁꢕꢊ  
ꢆꢅꢁꢕꢊ  
ꢅꢀ

ꢆ  

ꢒꢔ  
ꢀꢅ  
ꢅꢀ  
ꢀ
ꢉꢔꢇꢅꢂꢌꢉꢕ
 
ꢉꢉꢉꢖꢗꢉꢊ

ꢁ

ꢉꢘꢉꢙꢚꢉ

ꢈ

ꢛ
 
ꢉꢉꢉꢙꢗꢉꢊ

ꢀ

ꢉꢘꢉꢖꢚꢜꢉ

ꢈ

ꢛ
 
ꢉꢉꢉꢝꢗꢉꢞꢆꢈ !ꢂꢉ”#!ꢌꢂ
 
ꢀꢄ  
ꢅꢀ  
ꢆ
ꢅ
ꢄ
ꢃ
ꢁꢆ  
ꢆꢀ  
ꢇꢆ  
ꢅꢀꢀ  
ꢅꢁꢆ  
ꢅꢆꢀ  
ꢅꢀ  
ꢅꢀ  
ꢅꢀ  
ꢅꢀ  
ꢀ
ꢃ ꢁꢂꢊꢆꢗꢉꢂꢃꢉꢛꢜꢉꢌꢆꢅꢓꢌꢉꢂꢎ  
ꢐ
ꢝ
ꢁꢂꢘꢌꢆꢙꢏꢞꢑꢄꢓꢌꢚꢉꢂꢝꢄꢇꢅꢆꢍꢉꢂꢎꢝꢐ  
ꢃ
ꢀꢄ  
ꢀꢁꢂꢃꢄꢅꢆ(ꢈꢆ)ꢊ*ꢁ$ꢃ$ꢆ”ꢊ&ꢅꢆꢔꢋꢅꢄꢊꢍꢁꢎꢂꢆ+ꢄꢅꢊ
 
ꢀꢁꢂꢃꢄꢅꢆ’,ꢈꢆ)ꢊ*ꢁ$ꢃ$ꢆꢚꢄꢊꢁꢎꢆꢉꢃꢄꢄꢅꢎꢍ
 
ꢙꢐꢈꢆꢆꢉꢊꢐꢅꢆ#ꢅ$ꢋꢅꢄꢊꢍꢃꢄꢅ
 
ꢀ
ꢅ ꢀ

ꢆ  

ꢒ ꢂ ꢅ
ꢓ
ꢄ  
ꢀ
ꢀꢁ
 
ꢂ
 
ꢃꢄ
 
ꢔ
 
ꢀꢅ
 
ꢅ
ꢓ
ꢉ  
ꢅ
ꢓ
ꢆ  
ꢁ
ꢀꢀꢀꢌ
 
ꢍꢀ&
 

ꢀ
ꢁ

ꢜ
ꢃ!
 
ꢀꢇ
 
ꢀꢌ
 
ꢍ’
 
ꢐ
 
ꢀ
 
()
 
ꢀ#
 
*
 
+
 
ꢍ
 
ꢀ
ꢀꢀꢀꢈ
 
ꢍꢀ,
 
ꢖ
 
ꢃ-
 
ꢀ.
 
*
 
/
 
ꢃꢂ
 
ꢞ0ꢀ,
 
ꢇ
 
ꢃ

ꢂ

(
ꢃ

ꢃ  

ꢀꢀꢀ1
 
ꢍꢀꢆ
 

ꢀ ꢄ

ꢀ
2ꢀꢆ
 

ꢁ

ꢀ
ꢇ
 
ꢀꢕ
 

ꢅ

ꢀ
3
 
ꢀ&
 

ꢀ
ꢁ

ꢜ
ꢃ!
 
ꢀ
ꢄ
ꢅ ꢀ

ꢀ
ꢅ  

ꢅ
ꢓ
ꢅ ꢄ  
“
ꢁꢂ  
ꢅ
ꢓ
ꢅ ꢉ  
ꢅ
ꢓ
ꢅ ꢆ  
ꢃ

ꢀ  

ꢊ
ꢋ
ꢌ ꢍ ꢎꢏ ꢁꢐ ꢑ ꢎꢊ ꢏ  
ꢃ

ꢃ  

ꢅ ꢀ

ꢀ
ꢄ  

ꢅ ꢀ

ꢀ
ꢁ  

ꢅ ꢀ

ꢀ
ꢂ  

ꢅ ꢀ

ꢀ
ꢃ  

ꢅ ꢀ

ꢀ
ꢄ  

ꢅ ꢀ

ꢀ
ꢅ  

ꢅ ꢀ

ꢆ  

ꢅ ꢀ

ꢅ  

ꢅ
ꢁꢂꢑ ꢒ ꢓ ꢆ ꢌꢉ ꢂꢔ
 
ꢆ ꢕ ꢉ ꢂꢖ ꢓ ꢇꢗ ꢉ ꢂꢘ ꢓ ꢌꢆ ꢅꢙꢄ ꢏ ꢂꢎꢗ ꢉ ꢚ ꢐ  
ꢂ
ꢀꢁꢂꢃꢄꢅꢆ”ꢈꢆ#ꢄꢊꢎꢐꢁꢅꢎꢍꢆ#ꢏꢅꢄ$ꢊꢜꢆꢖꢅꢐꢋꢘꢎꢐꢅꢆꢉꢃꢄꢙꢅ
 
©2000 Fairchild Semiconductor Corporation  
FQP2N90
Rev. C
1  
4

V

GS  

Same Type  
as DUT  
50K
Ω
 
Q

g  

12V  
200nF  
300nF  
V

DS  

V

GS  

Q

gs  

Q

gd  

DUT  
I
= const.  
G
Charge  
Figure 12. Gate Charge Test Circuit & Waveform  
R

L  

V

DS  

90%  
V

DS  

V

DD  

V

GS  

R

G  

10%  
V

GS  

DUT  
V
GS  
t

d(on)  

t

r  

t

d(off)  

t

f  

t

on  

t

off  

Figure 13. Resistive Switching Test Circuit & Waveforms  
BV

DSS  

——————–  
BV

DSS

– V

DD  

L
1
2
2
—-  
E

AS  

=
L I

AS  

V

DS  

I

D  

BV

DSS  

I

AS  

R

G  

V

DD  

I

D

(t)  
V
V

DS

(t)  
V

DD  

DUT  

G

S  

t

p  

t

p  

Time  
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms  
©2000 Fairchild Semiconductor Corporation  
FQP2N90
Rev. C
1  
5

+
DUT  
V

DS  

_
I

SD  

L
Driver  
R

G  

Same Type  
as DUT  
V

DD  

V

GS  

• dv/dt controlled by
 
R

G  

• I

SD

controlled by pulse period  
Gate Pulse Width  
————————–  
V

GS  

D =  
Gate Pulse Period  
10V  
( Driver )  
I

FM

, Body Diode Forward Current  
I

SD  

di/dt  
( DUT )  
I

RM  

Body Diode Reverse Current  
Body Diode Recovery dv/dt  
V

SD  

V

DS  

( DUT )  
V

DD  

Body Diode  
Forward Voltage Drop  
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms  
©2000 Fairchild Semiconductor Corporation  
FQP2N90
Rev. C
1  
6

Mechanical Dimensions  
Figure
16
. TO220, Molded, 3-Lead, Jedec Variation AB  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-  
ically the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
7
©2000 Fairchild Semiconductor Corporation  
FQP2N90
Rev. C
1  

TRADEMARKS  
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not  
intended to be an exhaustive list of all such trademarks.  
AccuPower™  
AX-CAP *  
BitSiC™  
Build it Now™  
CorePLUS™  
CorePOWER™  
CROSSVOLT
™  
CTL™  
F-PFS™  
FRFET  
Sync-Lock™  
®*  
®
®
®
tm  
®
Global Power Resource

SM  

GreenBridge™  
Green FPS™  
PowerTrench  
PowerXS™  
Programmable Active Droop™  
QFET  
QS™  
Quiet Series™  
RapidConfigure™  
™
®
TinyBoost  
TinyBuck  
®
®
Green FPS™ e-Series™  
G
max
™  
GTO™  
TinyCalc™  
®
TinyLogic  
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TranSiC™  
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IntelliMAX™  
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MegaBuck™  
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MicroPak™  
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MillerDrive™  
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®
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®
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SerDes™  
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®
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®
®
SPM  
Fairchild  
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Fairchild Semiconductor  
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®
®
UHC  
®
Ultra FRFET™  
UniFET™  
VCX™  
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VoltagePlus™  
XS™  
®
mWSaver  
OptoHiT™  
OPTOLOGIC  
OPTOPLANAR  
FACT  
FAST  
®
®
FastvCore™  
FETBench™  
FPS™  
®
®
SupreMOS  
SyncFET™  
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Rev. I66  
8
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FQP2N90
Rev. C
1
 

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