onsemi-FQP32N20C
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QFET
®
FQP32N20C/FQPF32N20C
200V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
Features
•
•
•
•
•
•
28A, 200V, R
DS(on)
= 0.082
Ω
@V
GS
= 10 V
Low gate charge ( typical
82.5 nC)
Low Crss ( typical
185 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switching DC/DC converters,
switch mode power supplies, DC-AC converters for
uninterrupted power supplies and motor controls.
D
{
●
◀
▲
●
●
{
G
TO-220F
TO-220
G D
S
G
D S
FQPF Series
FQP Series
{
S
Absolute Maximum Ratings
T =
25°C unless otherwise noted
C
Symbol
V
DSS
Parameter
FQP32N20C
FQPF32N20C
200
Units
V
Drain-Source Voltage
I
D
– Continuous (T
C
= 25°C)
– Continuous (T
C
= 100°C)
– Pulsed
Drain Current
28.0
17.8
112
28.0 *
17.8 *
112 *
A
A
A
I
DM
(Note 1)
Drain Current
V
GSS
E
AS
I
AR
E
AR
dv/dt
P
D
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T
C
= 25°C)
±
30
955
28.0
15.6
5.5
V
mJ
A
mJ
V/ns
W
(Note 2)
(Note 1)
(Note 1)
(Note 3)
156
50
– Derate above 25°C
Operating and Storage
T
e
mperature Range
1.25
0.4
W/°C
°C
T
J
, T
STG
T
L
-55 to +150
300
Maximum lead temperature for soldering purposes,
°C
1/8
”
from case for 5 seconds
* Drain current limited by maximum junction temperature.
Thermal Characteristics
Symbol
Parameter
FQP32N20C
FQPF32N20C
Units
°C
/
W
°C
/
W
°C
/
W
R
θ
JC
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink Typ.
Thermal Resistance, Junction-to-Ambient
0.8
0.5
62.5
2.51
—
62.5
R
θ
JS
R
θ
JA
©2004 Fairchild Semiconductor Corporation
Rev. A, March 2004
Electrical Characteristics
T =
25°C unless otherwise noted
C
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
V
GS
= 0 V, I
D
= 250
µ
A
D
= 250
µ
A, Referenced to 25°C
Drain-Source Breakdown Voltage
Breakdown Voltage
T
e
mperature
200
—
—
—
—
V
∆
BV
DSS
I
0.24
V/°C
/
∆
T
J
Coefficient
I
DSS
V
V
DS
= 200
V
,
V
GS
= 0 V
DS
= 160
V
,
T
C
= 125°C
—
—
—
—
—
—
—
—
10
µ
A
µ
A
nA
nA
Zero Gate Voltage Drain Current
100
100
-100
I
GSSF
I
GSSR
V
GS
= 30
V
,
V
DS
= 0 V
V
GS
= -30 V, V
DS
= 0 V
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
On Characteristics
V
GS(th)
R
DS(on)
V
DS
= V
GS
, I
D
= 250
µ
A
Gate Threshold Voltage
2.0
—
—
4.0
V
Ω
S
Static Drain-Source
V
GS
=
1
0
V
,
I
D
=
1
4 A
0.068 0.082
On-Resistance
Forward Transconductance
g
FS
V
DS
= 40
V
, I
D
= 14 A
(Note 4)
—
20
—
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
—
—
—
1700
400
185
2220
520
245
pF
pF
pF
V
DS
= 25
V
,
V
GS
= 0 V,
Output Capacitance
Reverse Transfer Capacitance
f = 1.0 MHz
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
T
o
tal Gate Charge
Gate-Source Charge
Gate-Drain Charge
—
—
—
—
—
—
—
25
60
550
500
430
110
—
ns
ns
ns
V
DD
= 100
V
,
I
D
= 32 A,
270
245
210
82.5
10.5
44.5
R
G
= 25
Ω
(Note 4, 5)
(Note 4, 5)
ns
Q
g
Q
gs
Q
gd
nC
nC
nC
V
DS
= 160
V
,
I
D
= 32 A,
V
GS
= 10 V
—
Drain-Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain-Source Diode Forward Current
Maximum Pulsed Drain-Source Diode Forward Current
—
—
—
—
—
—
—
—
265
2.73
28
112
1.5
—
A
A
V
ns
µ
C
I
SM
V
SD
t
rr
V
GS
= 0 V, I
S
= 28 A
GS
= 0 V, I
S
= 32 A,
dI
F
/ dt = 100 A/
µ
s
Drain-Source Diode Forward Voltage
Reverse Recovery Time
V
(Note 4)
Q
rr
Reverse Recovery Charge
—
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 1.4mH, I
= 32A, V
= 50V, R
= 25
Ω,
Starting T =
25
°
C
AS
DD
G
DSS,
J
3. I
≤
28A, di/dt
≤
300A/
µ
s, V
≤
BV
Starting T =
25
°
C
J
SD
DD
4. Pulse Test : Pulse width
≤
300
µ
s, Duty cycle
≤
2%
5. Essentially independent of operating temperature
©2004 Fairchild Semiconductor Corporation
Rev. A, March 2004
Typical Characteristics
10
2
10
1
10
0
10
2
V
G
S
Top :
15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
5.0 V
150
o
C
Bottom :
4.5 V
10
1
25
o
C
-55
o
C
※
Notes :
1. 250µ s Pulse Test
2. T
C
= 25
℃
※
N
otes :
1. V
D
S
= 40V
2. 250µ s Pulse Test
10
0
10
-1
10
10
0
10
1
-1
2
4
6
8
10
V
G
S
,
G
ate-Source Voltage [V]
V
D
S
,
D
rain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
0.3
0.2
0.1
0.0
10
2
10
1
10
0
V
G
S
=
1
0V
150
℃
25
℃
V
G
S
=
2
0V
※
N
otes :
1. V
G
S
= 0V
※
N
ote : T = 25
℃
2. 250µ s Pulse Test
J
-1
10
0.0
0.4
0.8
1.2
1.6
2.0
0
20
40
60
80
100
V
SD
,
S
ource-Drain voltage [V]
I
D
,
D
rain Current [A]
Figure 3. On-Resistance Variation
vs
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
12
10
8
6000
C
iss
=
C
gs
+ C
gd
(C
ds
= shorted)
oss
=
C
ds
+ C
gd
rss
=
C
gd
V
D
S
=
4
0V
V
D
S
=
1
00V
C
C
5000
4000
3000
2000
1000
0
V
D
S
=
1
60V
C
iss
6
C
oss
4
C
rss
※
N
otes :
1. V
G
S
= 0 V
2. f = 1 MHz
2
※
N
ote : I
D
=
3
2.0A
0
-1
10
10
0
10
1
0
20
40
60
80
100
Q
G
,
T
otal Gate Charge [nC]
V
D
S
,
D
rain-Source Voltage [V]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
©2004 Fairchild Semiconductor Corporation
Rev. A, March 2004
Typical Characteristics
(Continued)
3.0
2.5
2.0
1.5
1.0
0.5
0.0
1.2
1.1
1.0
※
N
otes :
1. V
G
S
= 0 V
2. I
D
=
2
50 µ A
0.9
0.8
※
N
otes :
1. V
G
S
=
1
0 V
2. I
D
=
1
4 A
-100
-50
0
50
100
150
200
-100
-50
0
50
100
150
200
T,
J
unction Temperature [
o
C
]
T,
J
unction Temperature [
o
C
]
J
J
Figure 7. Breakdown Voltage Variation
vs Temperature
Figure 8. On-Resistance Variation
vs Temperature
Operation in This Area
is Limited by R
D
S
(
on)
Operation in This Area
is Limited by R
D
S(on)
2
10
2
10
1
10
0
10
100
µ
s
1
m
s
10 ms
10
µ
s
100
µ
s
1
10
1
m
s
10 ms
DC
DC
0
※
N
otes :
※
N
otes :
10
1. T
C
= 25
o
C
1. T
C
=
2
5
o
C
2. T
= 150
o
C
2. T
= 150
o
C
J
J
3. Single Pulse
3. Single Pulse
-1
-1
10
10
10
0
10
1
10
2
0
1
2
10
10
10
V
D
S
,
D
rain-Source Voltage [V]
V ,
D
rain-Source Voltage [V]
DS
Figure 9-1. Maximum Safe Operating Area
for FQP32N20C
Figure 9-2. Maximum Safe Operating Area
for FQPF32N20C
30
25
20
15
10
5
0
25
50
75
100
125
150
T
C
,
C
ase Temperature [
℃
]
Figure 10. Maximum Drain Current
vs Case Temperature
©2004 Fairchild Semiconductor Corporation
Rev. A, March 2004
Typical Characteristics
(Continued)
1 0
0
D = 0
.
5
※
N o
t
e s
:
1 .
θ
J C
(
t)
Z
= 0
.
8 0
℃
/
W M
a x.
0
.
2
2 .
D u
t
y
F a c to r,
D = t
1
/
t
2
1 0
–
1
3 .
T
J M
–
T
C
=
P
D
* Z
θ
J C
(
t)
M
0
.
1
0
.
0 5
0
.
0 2
P
DM
0
.
0 1
t
1
s in g le
p u ls e
t
2
1 0
–
2
1 0
–
5
1 0
–
4
1 0
–
3
1 0
–
2
1 0
–
1
1 0
0
1 0
1
t
1
, S
q u a
r
e
W a
v e
P u ls e
D u ra tio n
[s e c ]
Figure 11-1. Transient Thermal Response Curve for FQP32N20C
D = 0 .5
1 0
0
※
N o
t
e s
:
0 .2
1 .
θ
J C
(
t)
Z
= 2
.
5 1
℃
/
W M
a x.
2 .
D u
t
y
F a c to r,
D = t
1
/
t
2
0 .1
3 .
T
J M
–
T
C
=
P
D M
* Z
θ
J C
(
t)
0 .0 5
1 0
-1
0 .0 2
0
.
0 1
P
DM
sin g le
p u lse
t
1
t
2
1 0
-2
1 0
–
5
1 0
–
4
1 0
–
3
1 0
–
2
1 0
–
1
1 0
0
1 0
1
t
1
, S
q u a
r
e
W a
ve P
u ls e
D u ra tio n
[s e c ]
Figure 11-2. Transient Thermal Response Curve for FQPF32N20C
©2004 Fairchild Semiconductor Corporation
Rev. A, March 2004
Gate Charge Test Circuit & Waveform
V
GS
Same Type
50K
Ω
as DUT
10V
Q
g
12V
200nF
300nF
V
DS
V
GS
Q
gs
Q
gd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
R
L
V
DS
90%
V
DS
V
DD
V
GS
R
G
10%
V
GS
DUT
10V
t
d(on)
t
r
t
d(off)
t
f
t
on
t
off
Unclamped Inductive Switching Test Circuit & Waveforms
BV
DSS
L
1
2
—-
——————–
BV
DSS
– V
DD
E
AS
=
L
I
AS
V
DS
I
D
2
BV
DSS
I
AS
R
G
V
DD
I
D
(t)
V
DD
V
DS
(t)
DUT
10V
t
p
t
p
Time
©2004 Fairchild Semiconductor Corporation
Rev. A, March 2004
Peak Diode Recovery dv/dt Test Circuit & Waveforms
+
DUT
V
DS
_
I
SD
L
Driver
R
G
Same Type
as DUT
V
DD
V
GS
• dv/dt controlled by
R
G
• I
SD
controlled by pulse period
Gate Pulse Width
V
GS
( Driver )
————————–
Gate Pulse Period
D =
10V
I
FM
, Body Diode Forward Current
I
SD
( DUT )
di/dt
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
SD
V
DS
( DUT )
V
DD
Body Diode
Forward Voltage Drop
©2004 Fairchild Semiconductor Corporation
Rev. A, March 2004
Package Dimensions
TO-220
4.50
±
0.20
9.90
±
0.20
(8.70)
+0.10
–0.05
1.30
ø3.60
±
0.10
1.27
±
0.10
1.52
±
0.10
0.80
±
0.10
+0.10
–0.05
0.50
2.40
±
0.20
2.54TYP
2.54TYP
[2.54
±
0.20
]
[2.54
±
0.20
]
10.00
±
0.20
Dimensions in Millimeters
©2004 Fairchild Semiconductor Corporation
Rev. A, March 2004
Package Dimensions
(Continued)
TO-220F
2.54
±
0.20
10.16
±
0.20
ø3.18
±
0.10
(7.00)
(0.70)
(1.00×45
°
)
MAX1.47
0.80
±
0.10
#1
0.35
±
0.10
+0.10
–0.05
0.50
2.76
±
0.20
2.54TYP
2.54TYP
[2.54
±
0.20
]
[2.54
±
0.20
]
9.40
±
0.20
Dimensions in Millimeters
©2004 Fairchild Semiconductor Corporation
Rev. A, March 2004
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not
intended to be an exhaustive list of all such trademarks.
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FACT Quiet series™
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Bottomless™
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®
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LittleFET™
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SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
MICROCOUPLER™ PowerSaver™
MicroFET™
MicroPak™
PowerTrench
®
QFET™
CROSSVOLT
™ FRFET™
DOME™
GlobalOptoisolator™ MICROWIRE™
QS™
EcoSPARK™
E
2
CMOS™
EnSigna™
FACT™
GTO™
HiSeC™
I
2
C™
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TinyLogic
®
MSXPro™
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®
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PACMAN™
SILENT SWITCHER
®
UltraFET
®
Across the board. Around the world.™
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DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In
Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
©2004 Fairchild Semiconductor Corporation
Rev. I8
