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August
201
4
FQP15P12 /
FQPF15P12
P
-Channel QFET
®
MOSFET
-12
0
V,
–
1
5
A,
0.2
Ω
Description
Features
-15 A, -120 V, R
DS(on)
=
0.2
Ω (Max.) @ V
GS
=-10 V, I
D
= -7.5 A
This P-Channel enhancement mode power MOSFET is
produced using Fairchild Semiconductor
®
’s proprietary
planar stripe and DMOS technology. This advanced
MOSFET technology has been especially tailored to
reduce on-state resistance, and to provide superior
switching performance and high avalanche energy
strength. These devices are suitable for switched mode
power supplies, audio amplifier, DC motor control, and
variable switching power applications.
•
•
•
•
•
Low
G
ate
C
harge (
Typ.
29 nC)
Low Crss (
Typ.
110 pF)
100% Avalanche Tested
175°C Maximum Junction Temperature Rating
S
G
G
G
D
S
D
TO-220
TO-220F
S
D
Absolute Maximum Ratings
T =
25°C unless otherwise noted
.
C
Symbol
Parameter
FQP15P12
FQPF15P12
Unit
V
V
I
Drain-Source Voltage
-120
DSS
– Continuous (T
= 25°C)
Drain Current
-15
-10.6
-60
-15 *
-10.6 *
-60 *
A
D
C
– Continuous (T
= 100°C)
A
C
I
(Note 1)
Drain Current
– Pulsed
A
DM
V
E
I
Gate-Source Voltage
±
30
1157
-15
V
GSS
AS
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Single Pulsed Avalanche Energy
Avalanche Current
mJ
A
AR
E
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
10
mJ
V/ns
W
AR
dv/dt
-5.0
P
Power Dissipation (T
= 25°C)
100
41
D
C
– Derate above 25°C
0.67
0.27
W/°C
°C
T , T
Operating and Storage
T
e
mperature Range
Maximum Lead Temperature for Soldering,
1/8
”
from Case for 5 Seconds
-55 to +175
300
J
STG
T
°C
L
* Drain current limited by maximum junction temperature.
Thermal Characteristics
Symbol
Parameter
FQP15P12
FQPF15P12
Unit
°C
/
W
°C
/
W
°C
/
W
R
R
R
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink Typ.
Thermal Resistance, Junction-to-Ambient
1.5
40
3.66
—
θ
JC
θ
JS
62.5
62.5
θ
JA
©2003 Fairchild Semiconductor Corporation
FQP15P12 / FQPF15P12 Rev. C
2
1
Electrical Characteristics
T =
25°C unless otherwise noted
C
Symbol
Parameter
Test Conditions
Min
T
y
p
Max
Unit
Off Characteristics
BV
V
= 0
V
, I
=
2
50
µ
A
GS D
-120
—
Drain-Source Breakdown Voltage
—
—
—
V
DSS
∆
BV
Breakdown Voltage
T
e
mperature
Coefficient
DSS
I
= -250
µ
A, Referenced to 25°C
-0.13
V/°C
D
/
I
∆
T
J
V
V
V
V
= -120
V
, V
= 0 V
—
—
—
—
—
—
—
—
-1
µ
A
µ
A
nA
nA
DSS
DS
GS
Zero Gate Voltage Drain Current
= -96
V
, T
=
1
50°C
-10
DS
GS
GS
C
I
I
= -30
V
, V
= 0 V
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
-100
100
GSSF
DS
= 30
V
, V
= 0 V
GSSR
DS
On Characteristics
V
V
V
V
= V
, I
= -250
µ
A
Gate Threshold Voltage
-2.0
—
—
-4.0
0.2
—
V
Ω
S
GS(th)
DS
GS
DS
GS
D
R
Static Drain-Source
On-Resistance
DS(on)
= -10
V
, I
=
–
7.5 A
0.17
9.5
D
g
= -40 V, I
= -7.5 A
Forward Transconductance
—
FS
D
Dynamic Characteristics
C
C
C
Input Capacitance
—
—
—
850
310
110
1100
400
140
pF
pF
pF
iss
V
= -25
V
, V
= 0 V,
GS
DS
Output Capacitance
oss
rss
f = 1.0 MHz
Reverse Transfer Capacitance
Switching Characteristics
t
t
t
t
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
T
o
tal Gate Charge
Gate-Source Charge
Gate-Drain Charge
—
—
—
—
—
—
—
15
100
80
40
210
170
170
38
ns
ns
d(on)
V
= -60
V
, I
=
–
15 A,
DD
D
r
R
= 25
Ω
G
ns
d(off)
f
(Note 4)
80
ns
Q
Q
Q
29
nC
nC
nC
g
V
V
= -96
V
, I
=
–
15 A,
DS
D
5.1
15
—
= -10 V
gs
gd
GS
(Note 4)
—
Drain-Source Diode Characteristics and Maximum Ratings
I
Maximum Continuous Drain-Source Diode Forward Current
—
—
—
—
—
—
—
-15
-60
-4.0
—
A
A
S
I
Maximum Pulsed Drain-Source Diode Forward Current
SM
V
t
V
V
= 0
V
, I
=
–
15 A
Drain-Source Diode Forward Voltage
Reverse Recovery Time
—
V
SD
GS
S
= 0
V
, I
=
–
15 A,
126
0.61
ns
µ
C
rr
GS
S
dI /
dt = 100 A/
µ
s
Q
Reverse Recovery Charge
—
F
rr
Notes:
1. Repetitive
r
ating :
p
ulse width limited by maximum junction temperature
.
2. L = 6.0mH, I
= -15A, V
= -50V, R
= 25
Ω,
s
tarting T =
25°C
.
AS
DD
G
J
3. I
≤
-15A, di/dt
≤
300A/
µ
s, V
≤
BV
s
tarting T =
25°C
.
SD
DD
DSS,
J
4. Essentially independent of operating temperature
.
©2003 Fairchild Semiconductor Corporation
FQP15P12 / FQPF15P12 Rev. C
2
2
Typical Characteristics
10
2
10
1
10
0
10
2
V
G
S
Top :
-15.0 V
-10.0 V
-8.0 V
-7.0 V
-6.0 V
-5.5 V
-5.0 V
10
1
10
0
10
-1
o
175 C
Bottom :
-4.5 V
o
25 C
o
-55 C
※
Notes :
※
Notes :
μ
1. V
D
S
= -40V
1. 250
s Pulse Test
μ
2. 250
s Pulse Test
℃
2. T
C
= 25
-1
10
-1
10
10
0
10
1
2
4
6
8
10
-V
DS
, Drain-Source Voltage [V]
-V
G
S
,
G
ate-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
1
10
V
GS
= -10V
℃
175
℃
25
0
10
V
GS
= -20V
※
Notes :
1. V
G
S
=
0
V
※
℃
Note : T = 25
μ
2. 250
s Pulse Test
J
-1
10
0
20
40
60
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
-I
D
, Drain Current [A]
-V
SD
, Source-Drain voltage [V]
Figure 3. On-Resistance Variation
vs
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
12
10
8
2200
2000
1800
1600
1400
1200
1000
800
C
iss
=
C
gs
+
C
gd
(C
ds
= shorted)
oss
=
C
ds
+
C
gd
rss
=
C
gd
C
oss
C
V
DS
= -30V
V
DS
= -60V
C
C
iss
V
DS
= -96V
※
Notes ;
1. V
G
S
= 0 V
2. f = 1 MHz
6
C
rss
4
600
400
2
200
※
Note : I
D
= -15A
0
10
0
-1
10
0
10
1
0
10
20
30
40
Q
G
,
T
otal Gate Charge [nC]
-V
DS
, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
©2003 Fairchild Semiconductor Corporation
FQP15P12 / FQPF15P12 Rev. C
2
3
Typical Characteristics
(Continued)
3.0
2.5
2.0
1.5
1.0
0.5
0.0
1.2
1.1
1.0
※
Notes :
0.9
0.8
1. V
G
S
= 0 V
2. I
D
= -250
※
Notes :
μ
A
1. V
G
S
= -10 V
2. I
D
= -7.5 A
-100
-50
0
50
100
150
200
-100
-50
0
50
100
150
200
T
J
, Junction Temperature [
o
C
]
T
J
, Junction Temperature [
o
C
]
Figure 7. Breakdown Voltage Variation
vs Temperature
Figure 8. On-Resistance Variation
vs Temperature
Operation in This Area
Operation in This Area
is Limited by R
DS(on)
2
10
10
2
is Limited by R
D
S(on)
100
µ
s
100
µ
s
1
m
s
1 ms
10 ms
1
10
10
1
10 ms
DC
DC
0
10
10
0
※
※
Notes :
1. T
C
= 25
o
Notes :
1. T
C
= 25
o
2. T
J
= 175
o
C
C
C
2. T
= 175
o
C
J
3. Single Pulse
3. Single Pulse
-1
-1
10
10
10
0
10
1
10
2
10
0
1
10
2
10
-V
D
S
, Drain-Source Voltage [V]
-V
D
S
, Drain-Source Voltage [V]
Figure 9-1. Maximum Safe Operating Area
for FQP15P12
Figure 9-2. Maximum Safe Operating Area
for FQPF15P12
20
15
10
5
0
25
50
75
100
125
150
175
℃
T
C
, Case Temperature [
]
Figure 10. Maximum Drain Current
vs Case Temperature
©2003 Fairchild Semiconductor Corporation
FQP15P12 / FQPF15P12 Rev. C
2
4
Typical Characteristics
(Continued)
1 0
0
D = 0
.
5
0
.
2
0
.
1
※
N o
t
e s
:
℃
/W M
a x.
1 .
Z
θ
(
t)
=
1
.
5
J C
2 .
D u
t
y
F a c to r,
D = t
1
/
t
2
3 .
T
J
M
–
T
C
= P
D M
* Z
θ
(
t)
J C
1 0
–
1
0
.
0 5
0
.
0 2
0
.
0 1
P
DM
t
1
s in g le
p u ls e
t
2
1 0
–
2
1 0
–
5
1 0
–
4
1 0
–
3
1 0
–
2
1 0
–
1
1 0
0
1 0
1
t
1
, S
q u a
r
e
W a
v e
P u ls e
D u ra tio n
[s e c ]
Figure 11-1. Transient Thermal Response Curve for FQP15P12
D
=
0.5
1 0
0
0.2
※
N
o
tes
:
℃
/W M
ax.
2. D
uty F
actor, D
=t
1
/t
2
1. Z
θ
(
t)
=
3.66
JC
0.1
3. T
JM
–
T
C
=
P
D M
* Z
θ
(
t)
JC
0.05
0.02
0.01
1 0
-1
P
DM
single pulse
t
1
t
2
1 0
-2
1 0
-5
1 0
-4
1 0
-3
1 0
-2
1 0
-1
1 0
0
1 0
1
t
1
, S
q
u
are
W ave
P u
l
s
e
D uration
[sec]
Figure 11-2. Transient Thermal Response Curve for FQPF15P12
©2003 Fairchild Semiconductor Corporation
FQP15P12 / FQPF15P12 Rev. C
2
5
V
GS
Same Type
as DUT
50K
Ω
Q
g
12V
200nF
300nF
V
DS
V
GS
Q
gs
Q
gd
DUT
V
GS
Charge
Figure 12. Gate Charge Test Circuit & Waveform
R
L
t
on
t
off
V
DS
t
d(on)
t
r
t
d(off)
t
f
V
DD
V
GS
V
GS
R
G
10%
DUT
V
GS
90%
Figure 13. Resistive Switching Test Circuit & Waveforms
BV
DSS
——————–
BV
DSS
– V
DD
L
1
2
2
—-
E
AS
=
L
I
AS
V
DS
I
D
t
p
Time
V
DD
V
DS
(t)
R
G
V
DD
I
D
(t)
V
GS
DUT
I
AS
t
p
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
©2003 Fairchild Semiconductor Corporation
FQP15P12 / FQPF15P12 Rev. C
2
6
+
V
DS
_
DUT
I
SD
L
Driver
R
G
Compliment of DUT
(N-Channel)
V
DD
V
GS
• dv/dt controlled by
R
G
• I
SD
controlled by pulse period
Gate Pulse Width
————————–
Gate Pulse Period
V
GS
D =
10V
( Driver )
Body Diode Reverse Current
I
RM
I
SD
( DUT )
di/dt
FM
, Body Diode Forward Current
V
SD
I
V
DS
( DUT )
Body Diode
V
DD
Forward Voltage Drop
Body Diode Recovery dv/dt
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
©2003 Fairchild Semiconductor Corporation
FQP15P12 / FQPF15P12 Rev. C
2
7
SUPPLIER “B” PACKAGE
SHAPE
ꢀꢁꢂꢂ
3.50
10.67
9.65
SUPPLIER “A” PACKAGE
SHAPE
E
3.40
2.50
16.30
13.90
IF PRESENT, SEE NOTE “D”
E
16.51
15.42
9.40
8.13
E
1
2
3
4.10
2.70
[2.46]
C
14.04
12.70
2.13
2.06
FRONT VIEWS
H
4.70
4.00
1.62
1.42
1.62
1.10
2.67
2.40
“A1”
8.65
7.59
1.00
0.55
SEE NOTE “F”
ꢃ
ꢄ
ꢃ
ꢄ
6.69
6.06
OPTIONAL
CHAMFER
E
14.30
11.50
NOTE “I”
BOTTOM VIEW
NOTES:
A) REFERENCE
JEDEC, TO-220, VARIATION AB
B) ALL
DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS
COMMON TO ALL PACKAGE
SUPPLIERS EXCEPT WHERE NOTED [
].
D) LOCATION
OF MOLDED FEATURE MAY VARY
(LOWER LEFT CORNER, LOWER CENTER
AND CENTER OF THE PACKAGE)
3
2
1
E DOES
NOT COMPLY JEDEC STANDARD VALUE.
F) “A1” DIMENSIONS AS BELOW:
SINGLE GAUGE = 0.51 – 0.61
DUAL GAUGE
= 1.10 – 1.45
G) DRAWING
FILE NAME: TO220B03REV9
H
PRESENCE IS SUPPLIER DEPENDENT
I) SUPPLIER
DEPENDENT MOLD LOCKING HOLES
IN HEATSINK.
0.60
0.36
2.85
2.10
BACK VIEW
SIDE VIEW
10.36
9.96
2.66
2.42
B
A
B
3.28
3.08
7.00
3.40
3.20
0.70
SEE NOTE “F”
SEE NOTE “F”
6.88
6.48
1 X
4
5°
16.07
15.67
B
16.00
15.60
B
(3.23)
3
1
1.47
1.24
2.96
2.56
2.14
0.90
0.70
0.50
10.05
9.45
M
A
30°
0.45
0.25
0.60
0.45
B
2.54
2.54
4.90
4.50
B
NOTES:
A. EXCEPT WHERE NOTED CONFORMS TO
EIAJ SC91A.
B
DOES NOT COMPLY EIAJ STD. VALUE.
C. ALL DIMENSIONS ARE IN MILLIMETERS.
D. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR PROTRUSIONS.
E. DIMENSION AND TOLERANCE AS PER ASME
Y14.5-1994.
F. OPTION 1 – WITH SUPPORT PIN HOLE.
OPTION 2 – NO SUPPORT PIN HOLE.
G. DRAWING FILE NAME: TO220M03REV5
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. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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