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January 2012
TM
Motion-SPM
FSB50550AB
Smart Power Module (SPM
)
®
Features
Applications
•
•
500V R
DS(on)
=1.4
W(
max
)
3-phase FRFET inverter including
high voltage integrated circuit (HVIC)
• Three-phase
inverter driver for small power ac motor drives
General Description
3 divided negative dc-link terminals for inverter current sens-
ing applications
FSB50550AB is a tiny smart power module (SPM
®
) based on
FRFET technology as a compact inverter solution for small
power motor drive applications such as fan motors and water
suppliers. It is composed of 6 fast-recovery MOSFET (FRFET),
and 3 half-bridge HVICs for FRFET gate driving. FSB50550AB
provides low electromagnetic interference (EMI) characteristics
with optimized switching speed. Moreover, since it employs
FRFET as a power switch, it has much better ruggedness and
larger safe operation area (SOA) than that of an IGBT-based
power module or one-chip solution. The package is optimized
for the thermal performance and compactness for the use in the
built-in motor application and any other application where the
assembly space is concerned. FSB50550AB is the best
solution for the compact inverter providing the energy efficiency,
compactness, and low electromagnetic interference.
•
•
•
•
•
•
•
HVIC for gate driving and undervoltage protection
3/5V CMOS/TTL compatible, active-high interface
Optimized for low electromagnetic interference
Isolation voltage rating of 1500Vrms for 1min.
HVIC temperature sensing
Embedded bootstrap diode in the package
RoHS compliant
©2011 Fairchild Semiconductor Corporation
FSB50550AB Rev. A
1
Absolute Maximum Ratings
Inverter Part
(Each FRFET Unless Otherwise Specified)
Symbol
Parameter
Conditions
Rating
Units
DC Link Input Voltage,
V
PN
500
V
Drain-source Voltage of each FRFET
Each FRFET Drain Current, Continuous
Each FRFET Drain Current, Continuous
Each FRFET Drain Current, Peak
Each FRFET Drain Current, Rms
Maximum Power Dissipation
*I
D25
*I
D80
*I
DP
T
C
= 25°C
T
C
= 80°C
2.0
1.5
5
A
A
T
C
= 25°C, PW < 100
m
s
A
*I
DRMS
*P
D
T
C
= 80°C, F
PWM
< 20KHz
T
C
= 25°C, For Each FRFET
1.1
14.5
A
rms
W
Control Part
(Each HVIC Unless Otherwise Specified)
Symbol
V
CC
Parameter
Conditions
Rating
Units
Control Supply Voltage
Applied between V
CC
and COM
Applied between V
B
and V
S
Applied between IN and COM
20
20
V
V
V
V
BS
High-side Bias
Voltage
Input Signal Voltage
V
IN
-0.3 ~ V
CC
+0.3
Bootstrap Diode Part
(Each Bootstrap diode Unless Otherwise Specified)
Symbol
Parameter
Conditions
Rating
Units
V
RRMB
Maixmum Repetitive Reverse Voltage
V
A
A
500
0.5
* I
FB
Forward Current
T
C
= 25°C
* I
FPB
Forward Current (Peak)
T
C
= 25°C, Under 1ms Pulse Width
1.5
Thermal Resistance
Symbol
Parameter
Conditions
Rating
Units
Each FRFET under inverter operat-
ing condition (Note 1)
Junction to Case Thermal Resistance
°C/W
R
q
JC
8.6
Total System
Symbol
Parameter
Conditions
Rating
-40 ~ 150
-40 ~ 125
Units
°C
T
J
Operating Junction Temperature
Storage Temperature
T
STG
°C
60Hz, Sinusoidal, 1 minute, Con-
nection pins to heatsink
V
ISO
Isolation Voltage
1500
V
rms
Note:
1. For the measurement point of case temperature T
, please refer to Figure 4.
C
2. Marking
“ * “ is
calculation value or design factor.
2
FSB50550AB Rev. A
Pin descriptions
Pin Number
Pin Name
Pin Description
1
2
COM
V
B(U)
V
CC(U)
IN
(UH)
IN
(UL)
N.C
IC Common Supply Ground
Bias Voltage for U Phase High Side FRFET Driving
Bias Voltage for U Phase IC and Low Side FRFET Driving
Signal Input for U Phase High-side
3
4
5
Signal Input for U Phase Low-side
6
N.C
7
V
B(V)
V
CC(V)
IN
(VH)
IN
(VL)
N.C
Bias Voltage for V Phase High Side FRFET Driving
Bias Voltage for V Phase IC and Low Side FRFET Driving
Signal Input for V Phase High-side
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
Signal Input for V Phase Low-side
N.C
V
B(W)
V
CC(W)
IN
(WH)
IN
(WL)
V
ts
Bias Voltage for W Phase High Side FRFET Driving
Bias Voltage for W Phase IC and Low Side FRFET Driving
Signal Input for W Phase High-side
Signal Input for W Phase Low-side
Output for HVIC temperature sensing
P
Positive DC–Link Input
U, V
S(U)
N
U
Output for U Phase & Bias Voltage Ground for High Side FRFET Driving
Negative DC–Link Input for U Phase
N
V
Negative DC–Link Input for V Phase
V, V
S(V)
N
W
Output for
V Phase & Bias Voltage Ground for High Side FRFET Driving
Negative DC–Link Input for W Phase
W, V
S(W)
Output for
W Phase & Bias Voltage Ground for High Side FRFET Driving
(1) COM
(2) V
B(U)
(3) V
CC(U)
(4) IN
(UH)
(5) IN
(UL)
(17) P
VCC
HIN
VB
HO
VS
LO
(18) U, V
S(U)
LIN
COM
(6) N.C
(19)
N
U
(20) N
V
(7) V
B(V)
(8) V
CC(V)
(9) IN
(VH)
(10) IN
(VL)
VCC
HIN
VB
HO
VS
LO
(21) V, V
S(V)
LIN
COM
(11) N.C
(12) V
B(W)
(13)
V
CC(W)
(14) IN
(WH)
(15) IN
(WL)
VCC
HIN
VB
HO
VS
LO
(22)
N
W
(23) W, V
S(W)
LIN
COM
Vts
(16)
Vts
Note:
®
Source terminal of each low-side MOSFET is not connected to supply ground or bias voltage ground inside SPM
. External connections should be made as indicated in Figure 3
Figure 1. Pin Configuration and Internal Block Diagram (Bottom View)
3
FSB50550AB Rev. A
Electrical Characteristics
(T
J
= 25°C, V
CC
=V
BS
=15V Unless Otherwise Specified)
Inverter Part
(Each FRFET Unless Otherwise Specified)
Symbol
Parameter
Conditions
Min Typ Max Units
Drain-Source Breakdown
Voltage
BV
DSS
V
IN
= 0V, I
D
= 1mA (Note 1)
500
–
–
–
V
mA
W
Zero Gate Voltage
Drain Current
I
DSS
R
DS(on)
V
SD
V
IN
= 0V, V
DS
= 500V
–
–
–
1
Static Drain-Source
On-Resistance
V
CC
= V
BS
= 15
V
,
V
IN
= 5
V
,
I
D
= 1.2A
V
CC
= V
BS
= 15
V
,
V
IN
= 0
V
,
I
D
= -1.2A
1.0
–
1.4
1.2
Drain-Source Diode
Forward Voltage
V
t
ON
t
OFF
t
rr
–
–
–
–
–
800
500
140
90
–
–
–
–
–
ns
ns
ns
m
J
m
J
V
PN
= 300
V
, V
CC
= V
BS
= 15
V
, I
D
= 1.2A
V
IN
= 0V
«
5
V
,
I
nductive load L=3mH
High- and low-side FRFET switching
(Note 2)
Switching Times
E
ON
E
OFF
10
V
PN
= 400
V
,
V
CC
= V
BS
= 15
V
, I
D
= I
D
P
, V
DS
=BV
DSS
T
J
= 150°C
High- and low-side FRFET switching (Note 3)
,
Reverse-bias Safe Oper-
ating Area
RBSOA
Full Square
Control Part
(Each HVIC Unless Otherwise Specified)
Symbol
Parameter
Conditions
Min Typ Max Units
I
QCC
Quiescent V
CC
Current
V
CC
=15V, V
IN
=0V Applied
between V
CC
and COM
–
–
200
m
A
Applied between V
B(U)
-U,
V
BS
=15
V
,
V
IN
=0V
I
QBS
Quiescent V
BS
Current
–
–
100
m
A
V
B(V)
–
V
, V
B(W)
-W
UV
CCD
UV
CCR
UV
BSD
UV
BSR
V
CC
Undervoltage Protection Detection Level
V
CC
Undervoltage Protection Reset Level
V
BS
Undervoltage Protection Detection Level
V
BS
Undervoltage Protection Reset Level
7.4
8.0
7.4
8.0
8.0
8.9
8.0
8.9
9.4
9.8
9.4
9.8
V
V
V
V
Low-side Undervoltage
Protection (Figure 8)
High-side Undervoltage
Protection (Figure 9)
HVIC Temperature sens-
ing voltage output
V
ts
mV
V
CC
=15V, T
HVIC
=25°C(Note 4)
600
790
980
V
IH
V
IL
ON Threshold Voltage
OFF Threshold Voltage
Logic High Level
Applied between IN and COM
Logic Low Level
2.9
–
–
–
–
V
V
0.8
Bootstrap Diode Part
(Each Bootstrap diode Unless Otherwise Specified)
Symbol
V
FB
Parameter
Forward Voltage
Conditions
Min Typ Max Units
I
F
= 0.1A, T
C
= 25°C(Note 5)
I
F
= 0.1A, T
C
= 25°C
–
–
2.5
80
–
–
V
t
rrB
Reverse Recovery Time
ns
Note:
®
1. BV
is the absolute maximum voltage rating between drain and source terminal of each FRFET inside SPM
. V
should be sufficiently less than this value considering the
PN
DSS
effect of the stray inductance so that V
should not exceed BV
in any case.
DS
DSS
2.
t
and t
include the propagation delay time of the internal drive IC. Listed values are measured at the laboratory test condition, and they can be different according to the
OFF
ON
field applcations due to the effect of different printed circuit boards and wirings. Please see Figure 6 for the switching time definition with the switching test circuit of Figure 7.
3. The
peak current and voltage of each FRFET during the switching operation should be included in the safe operating area (SOA). Please see Figure 7 for the RBSOA test cir-
cuit that is same as the switching test circuit.
4. V
is only for sensing temperature of module and cannot shutdown MOSFETs automatically.
ts
5. Built
in bootstrap diode includes around 1
5
Ω
resistance characteristic. Please refer to Figure 2.
4
FSB50550AB Rev. A
Recommended Operating Condition
Value
Symbol
Parameter
Conditions
Units
Min.
–
Typ. Max.
V
PN
V
CC
V
BS
Supply Voltage
Applied between P and N
300
15
15
–
400
16.5
16.5
V
CC
V
V
V
V
V
Control Supply Voltage
High-side Bias Voltage
Applied between V
CC
and COM
Applied between V
B
and V
S
13.5
13.5
3.0
0
V
IN(ON)
Input ON Threshold Voltage
V
IN(OFF)
Input OFF Threshold Voltage
Applied between IN and COM
–
0.6
Blanking Time for Preventing
Arm-short
t
dead
V
CC
=V
BS
=13.5 ~ 16.5
V
, T
J
£
150°C
T
J
£
150°C
1.0
–
–
–
–
m
s
f
PWM
PWM Switching Frequency
15
kHz
Package Marking & Ordering Information
Device Marking
Device
Package
Reel Size
Packing Type
Quantity
FSB50550AB
FSB50550AB
SPM23DD-21L
–
–
15
Built in Bootstrap Diode V
F
-I
F
Characteristic
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
V
F
[V]
Tc=25°C
Figure 2. Built in Bootstrap Diode Characteristics(typ.)
5
FSB50550AB Rev. A
These values depend on PWM
control algorithm
15V
Line
C
* Example
circuit : W phase
1
V
DC
P
V
HIN
0
LIN
0
Output
Note
VCC
HIN
LIN
VB
HO
VS
LO
Z
Both FRFET Off
Low side FRFET On
High side FRFET On
Shoot through
Inverter
Output
R
5
0
1
0
V
DC
1
0
C
3
C
5
COM
Vts
1
1
Forbidden
Z
R
3
N
Open Open
Same as (0,0)
C
4
One Leg Diagram of SPM
C
2
10
m
F
*
Example of bootstrap para
m
:
t
ers
C = C
2
=1
m
F ceramic capacitor
1
Note:
1. Parameters
for bootsrap circuit elements are dependent on PWM algorithm. For 15 kHz of switching frequency, typical example of parameters is shown above.
®
®
2. RC
coupling(R and
C )
and C
at each input of SPM
and Micom (indicated as dotted lines) may be used to prevent improper signal due to surge noise. Signal input of SPM
5
5
4
is compatible with standard CMOS or LSTTL outputs.
3. Bold
lines should be short and thick in PCB pattern to have small stray inductance of circuit, which results in the reduction of surge voltage. Bypass capacitors such as C , C
1
2
and C
should have good high-frequencycharacteristics to absorb high-frequency ripple current.
3
Figure 3. Recommended CPU Interface and Bootstrap Circuit with Parameters
Note:
®
®
Attach the thermocouple on top of the heatsink-side of SPM
(between SPM
and heatsink if applied) to get the correct temperature measurement.
Figure 4. Case Temperature Measurement
3.5
3.0
2.5
2.0
1.5
1.0
0.5
20
40
60
80
100
120
140
160
T
HVIC
[deg]
Figure 5. Temperature profile of V
ts
(typ.)
6
FSB50550AB Rev. A
V
V
IN
IN
I
rr
120% of I
D
100% of I
D
V
DS
I
D
10% of I
D
I
D
V
DS
t
ON
t
rr
t
OFF
(a) Turn-on
(b) Turn-off
Figure 6. Switching Time Definition
C
BS
V
CC
I
D
VCC
HIN
LIN
VB
HO
VS
LO
L
V
DC
+
V
DS
–
COM
Vts
One-leg Diagram of SPM
Figure 7. Switching and RBSOA(Single-pulse) Test Circuit (Low-side)
Input Signal
UV Protection
RESET
DETECTION
RESET
Status
UV
CCR
Low-side Supply, V
CC
UV
CCD
MOSFET Current
Figure 8. Undervoltage Protection (Low-side)
Input Signal
UV Protection
Status
RESET
DETECTION
RESET
UV
BSR
High-side Supply, V
BS
UV
BSD
MOSFET Current
Figure 9. Undervoltage Protection (High-side)
7
FSB50550AB Rev. A
C
1
(
1
)
C
OM
(
2
)
V
B(U)
(17
)
P
(
3
)
V
C
C
(
U)
VCC
HIN
VB
HO
VS
LO
R
5
(
4
)
I
N
(U
H
)
(1
8
)U,
V
S(U)
(
5
)
I
N
(UL)
V
DC
C
3
LIN
C
5
C
2
COM
(
6
)
N
.C
(
7
)
V
B(V)
(
8
)
V
C
C
(
V)
(
1
9
)
N
U
(
2
0
)
N
V
VCC
HIN
VB
HO
VS
LO
(
9
)
I
N
(V
H
)
(2
1
)V,
V
S(V)
(
1
0
)
I
N
(VL)
LIN
M
COM
(11)
N.C
(
1
2
)
V
B(
W
)
(
1
3
)
V
C
C
(
W
)
(22
)
N
W
VCC
HIN
LIN
VB
HO
VS
LO
(
1
4
)
I
N
(W
H
)
(23
)
W,
V
S(W)
(
1
5
)
I
N
(W
L
)
COM
V
TS
(1
6
)
V
TS
C
4
R
4
For current sensing and protection
15- V
Supply
C
6
R
3
Note:
1. About pin position, refer to Figure 2.
®
2. RC coupling(R
and C , R
and C
) and C
at each input of SPM
and Micom are useful to prevent improper input signal caused by surge noise.
5
5
4
6
4
3. The voltage drop across R
affects the low side switching performance and the bootstrap characteristics since it is placed between COM and the source terminal of the low side
3
MOSFE
T
. For this reason, the voltage drop across R
should be less than 1V in the steady-state.
3
4. Ground wires and output terminals, should be thick and short in order to avoid surge voltage and malfunction of HVIC.
®
5. All the filter capacitors shoud be connected close to SPM
, and they should have good characteristics for rejecting high-frequency ripple current.
Figure 10. Example of Application Circuit
8
FSB50550AB Rev. A
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
intended to be an exhaustive list of all such trademarks.
Build it Now™
CorePLUS™
CorePOWER™
CROSSVOLT
™
CTL™
FRFET
®
Programmable Active Droop™
QFET
®
QS™
Quiet Series™
RapidConfigure™
Global Power Resource
SM
Green FPS™
Green FPS™ e-Series™
GTO™
TinyBoost™
TinyBuck™
TinyLogic
®
TINYOPTO™
TinyPower™
TinyPWM™
TinyWire™
Current Transfer Logic™
IntelliMAX™
ISOPLANAR™
MegaBuck™
MICROCOUPLER™
MicroFET™
MicroPak™
MillerDrive™
MotionMax™
EcoSPARK
®
™
EfficentMax™
Saving our world, 1mW /W /kW at a time™
EZSWITCH™ *
SmartMax™
SMART START™
SPM
®
™
TriFault Detect™
m
SerDes™
STEALTH™
SuperFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SupreMOS™
SyncFET™
®
®
Fairchild
®
Motion-SPM™
Fairchild Semiconductor
®
FACT Quiet Series™
FACT
®
UHC
®
Ultra FRFET™
UniFET™
VCX™
VisualMax™
XS™
OPTOLOGIC
®
OPTOPLANAR
®
®
FAST
®
FastvCore™
PDP SPM™
Power-SPM™
PowerTrench
®
PowerXS™
FlashWriter
®
FPS™
*
The Power Franchise
®
F-PFS™
* EZSWITCH™ and FlashWriter
®
are trademarks of System General Corporation, used under license by Fairchild Semiconductor.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY
PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NO
R
T
HE RIGHTS OF OTHERS.
THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY
THEREIN, WHICH COVERS THESE PRODUCTS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life
support devices or systems are devices or systems which, (a) are
intended for surgical implant into the body or (b) support or sustain life,
and (c) whose failure to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably
expected to result in a significant injury of the user.
2. A
critical component in any component of a life support, device, or
system whose failure to perform can be reasonably expected to cause
the failure of the life support device or system, or to affect its safety or
effectiveness.
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Datasheet contains the design specifications for product development. Specifications
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Advance Information
Formative / In Design
Datasheet contains preliminary data; supplementary data will be published at a later
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First Production
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make changes at any time without notice to improve the design.
No Identification Needed
Obsolete
Full Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Not In Production
Rev. I38
10
FSB50550AB Rev. A
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