onsemi-IRFU120ATU
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IRFR/U120A
Advanced Power MOSFET
FEATURES
BV
DSS
= 100
V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
Lower Input Capacitance
W
R
DS(on)
= 0.2
I
D
= 8.4
A
Improved Gate Charge
Extended Safe Operating Area
D-PAK
I-PAK
m
Lower Leakage Current : 10
A (Max.)
@ V
DS
= 100V
W
Lower R
DS(ON)
: 0.155
(Typ.)
2
1
1
2
3
3
1. Gate
2. Drain
3. Source
Absolute Maximum Ratings
Symbol
Characteristic
Drain-to-Source Voltage
Value
100
8.4
Units
V
DSS
V
O
Continuous Drain Current (T
C
=25
C
)
I
D
A
O
Continuous Drain Current (T
C
=100
C
)
5.3
1
I
DM
V
GS
E
AS
I
AR
Drain Current-Pulsed
34
A
V
O
+
_
Gate-to-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
2
0
2
141
8.4
3.2
6.5
2.5
32
mJ
A
O
1
O
E
AR
dv/dt
1
Repetitive Avalanche Energy
mJ
V/ns
W
O
3
Peak Diode Recovery dv/dt
O
O
*
Total Power Dissipation (T =25
)
)
C
A
O
P
D
Total Power Dissipation (T =25
C
W
C
O
Linear Derating Factor
0.26
W/
C
Operating Junction and
Storage Temperature Range
T
J
, T
STG
– 55
to +150
300
O
C
Maximum Lead Temp. for Soldering
Purposes, 1/8”
from case for 5-seconds
T
L
Thermal Resistance
Symbol
Characteristic
Typ.
Max.
Units
R
q
Junction-to-Case
—
—
—
3.9
50
JC
O
R
q
*
Junction-to-Ambient
Junction-to-Ambient
/W
C
JA
R
q
JA
110
*
When mounted on the minimum pad size recommended
(PCB Mount).
Rev. B
©1999 Fairchild Semiconductor Corporation
N-CHANNEL
POWER MOSFET
IRFR/U120A
O
Electrical Characteristics
(T
C
=25
C
unless otherwise specified)
C
Symbol
BV
DSS
Characteristic
Min. Typ. Max.
Units
Test Condition
m
V
GS
=0V,I
D
=250 A
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coeff.
Gate Threshold Voltage
V
V/
V
100 —
—
O
m
D
BV
/
D
T
J
V
GS(th)
I
D
=250 A
See Fig 7
C
— 0.12
—
m
V
DS
=5V,I
D
=250 A
2.0
—
—
—
4.0
V
GS
=20V
GS
=-20V
V
DS
=100V
DS
=80V,T
C
=125
Gate-Source Leakage
, Forward
Gate-Source Leakage
, Reverse
100
I
GSS
nA
V
—
— -100
—
—
—
10
I
DSS
Drain-to-Source Leakage Current
m
A
O
C
V
—
100
Static Drain-Source
On-State Resistance
Forward Transconductance
Input Capacitance
4
R
DS(on)
W
W
V
GS
=10V,I
D
=4.2A
V
DS
=40V,I
D
=4.2A
—
—
O
0.2
g
fs
C
iss
C
oss
C
rss
t
d(on)
t
r
4
—
—
—
—
—
—
—
—
—
—
—
6.29 —
370 480
O
V
GS
=0V,V
DS
=25V,f =1MHz
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
110
45
40
40
90
70
22
—
95
38
14
14
36
28
16
2.7
7.8
pF
See Fig 5
V
DD
=50V,I
D
=9.2A,
W
R
G
=18
ns
t
d(off)
t
f
Turn-Off Delay Time
Fall Time
4
See Fig 13
5
O
O
Q
g
Total Gate Charge
Gate-Source Charge
Gate-Drain(“ Miller” ) Charge
V
DS
=80V,V
GS
=10V,
Q
gs
Q
gd
nC
I
D
=9.2A
4
O
5
O
—
See Fig 6 & Fig 12
Source-Drain Diode Ratings and Characteristics
Symbol
Characteristic
Continuous Source Current
Pulsed-Source Current
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Min. Typ. Max.
Units
Test Condition
I
S
I
SM
V
SD
t
rr
—
—
—
—
—
—
8.4
34
1.5
—
Integral reverse pn-diode
A
1
in the MOSFET
O
O
4
O
V
C
—
T
J
=25 ,I
S
=8.4A,V
GS
=0V
O
ns
C
T
J
=25 ,I
F
=9.2A
98
m
4
Q
rr
C
m
di
F
/dt=100A/ s
— 0.34 —
O
Notes ;
Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
1
O
L=3mH, I
AS
=8.4A, V
DD
=25V, R
G
=27
W
, Starting T
J
=25
o
C
2
O
I
SD
_
9
.2
A, di/dt
3
00A/ s,
V
DD
_
BV ,
Starting T
=25
o
3
_
<
m
C
<
<
O
DSS
J
_
<
4
Pulse Test : Pulse Width = 250
m
s, Duty Cycle
2%
O
Essentially Independent of Operating Temperature
5
O
N-CHANNEL
POWER MOSFET
IRFR/U120A
Fig 1.
Output Characteristics
Fig 2.
Transfer Characteristics
V
GS
Top :
1 5 V
1 0 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
1
10
1
10
Bottom : 4.5
V
150
o
C
0
10
0
25
o
C
10
@
N
otes :
1. V
= 0 V
GS
@
N
otes :
1. 250
s Pulse Test
2. V
= 40 V
DS
3. 250
s Pulse Test
m
–
5
5
o
C
m
2. T
C
=
2
5
o
C
-1
10
-1
0
1
2
4
6
8
10
10
10
10
V
G
S
,
G
ate-Source Voltage
[V]
V
D
S
,
D
rain-Source Voltage
[V]
Fig 3.
On-Resistance vs. Drain Current
Fig 4.
Source-Drain Diode Forward Voltage
0.4
1
10
V
=
1
0 V
0.3
0.2
0.1
0.0
GS
0
10
V
=
2
0 V
GS
@
N
otes :
1. V
= 0 V
o
150
C
GS
o
o
@
N
ote : T
= 25
J
C
2. 250
s Pulse Test
m
25
C
-1
10
0
10
20
30
40
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
I ,
D
rain Current [A]
V
S
D
,
S
ource-Drain Voltage
[V]
D
Fig 5.
Capacitance vs. Drain-Source Voltage
Fig 6.
Gate Charge vs. Gate-Source Voltage
600
400
200
0
C
iss
=
C
gs
+
C
gd
(
C
ds
=
s
horted )
V
DS
=
2
0 V
DS
=
5
0 V
DS
=
8
0 V
C
oss
=
C
ds
+ C
gd
C
iss
10
C
rss
= C
gd
V
V
C
oss
5
@
N
otes :
1. V
GS
= 0 V
C
rss
2. f = 1 MHz
@
N
otes : I
D
=
9
.2 A
15 20
0
0
1
0
5
10
10
10
Q ,
T
otal Gate Charge [nC]
V
D
S
,
D
rain-Source Voltage [V]
G
N-CHANNEL
POWER MOSFET
IRFR/U120A
Fig 7.
Breakdown Voltage vs. Temperature
Fig 8.
On-Resistance vs. Temperature
1.2
3.0
2.5
2.0
1.5
1.0
0.5
0.0
1.1
1.0
0.9
@
N
otes :
1. V
GS
=
1
0 V
2. I
D
=
4
.6 A
@
N
otes :
1. V
GS
= 0 V
2. I = 250
A
m
D
0.8
-75
-50
-25
0
25
50
75
100
125
150
175
-75
-50
-25
0
25
50
75
100
125
150
175
T ,
J
unction Temperature [
o
C
]
T ,
J
unction Temperature [
o
C
]
J
J
Fig 9.
Max. Safe Operating Area
Fig 10.
Max. Drain Current vs. Case Temperature
10
2
Operation in This Area
is Limited by
R
DS(on)
10
8
6
4
2
0
10
s
m
100
s
m
1
10
1
m
s
10 ms
DC
0
10
@
N
otes :
1. T = 2
5
o
C
C
2. T = 15
0
o
C
J
3. Single Pulse
-1
10
0
1
2
25
50
75
100
125
150
10
10
10
T ,
C
ase Temperature [
o
C
]
V
DS
,
D
rain-Source Voltage
[V]
c
Fig 11.
Thermal Response
D=0.5
0.2
10
0
@
Notes :
1. Z
q
J
C
(t)=3.9
o
C/W Max.
0.1
2. Duty Factor, D=
t
/
t
2
1
0.05
3. T
J
M
-T
C
=P
D
M
*Z
q
J
C
(t)
P
DM
0.02
0.01
10
–
1
single pulse
t
1
t
2
10
–
5
10
–
4
10
–
3
10
–
2
10
–
1
10
0
10
1
t
1
, Square Wave Pulse Duration
[sec]
N-CHANNEL
POWER MOSFET
IRFR/U120A
Fig 12.
Gate Charge Test Circuit
& Waveform
“ Current Regulator ”
V
GS
Same Type
as DUT
W
50K
Q
g
12V
200nF
10V
300nF
V
DS
Q
gs
Q
gd
V
GS
DUT
R
2
3mA
R
1
Charge
Current Sampling (
I
G
) Current
Sampling (
I
D
)
Resistor Resistor
Fig 13.
Resistive Switching Test Circuit
& Waveforms
R
L
V
out
V
in
V
out
90%
V
DD
( 0.5 rated V
DS
)
R
G
DUT
10%
V
in
10V
t
d(on)
t
r
t
d(off)
t
f
t
on
t
off
Fig 14.
Unclamped Inductive Switching Test Circuit
& Waveforms
BV
DSS
1
2
2
L
L
I
D
—-
——————–
E
AS
=
L
L
I
AS
BV
DSS
— V
DD
V
DS
BV
DSS
I
AS
Vary t
p
to obtain
required peak I
D
R
G
I
D
(t)
V
DD
C
DUT
V
DS
(t)
V
DD
10V
t
p
t
p
Time
N-CHANNEL
POWER MOSFET
IRFR/U120A
Fig 15.
Peak Diode Recovery dv/dt Test Circuit
& Waveforms
+
DUT
V
DS
—
I
S
L
Driver
V
GS
Same Type
as DUT
R
G
V
DD
V
GS
• dv/dt controlled by “R
G
”
• I
S
controlled by Duty Factor “D”
Gate Pulse Width
————————–
V
GS
D =
Gate Pulse Period
10V
( Driver )
I
FM
, Body Diode Forward Current
I
S
di/dt
( DUT )
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
f
V
DS
( DUT )
V
DD
Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
UHC™
VCX™
CROSSVOLT™
E
2
CMOS
TM
FACT™
FACT Quiet Series™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
FAST
®
FASTr™
GTO™
HiSeC™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILIT
Y
,
F
UNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
SEARCH |
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|
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IRFR120A
Related Links
100V N-Channel A-FET / Substitute of
IRFR120
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Contents
Features
|
Product status/pricing/packaging
Support
Features
representatives
●
●
●
●
●
●
Avalanche Rugged Technology
Rugged Gate Oxide Technology
Lower Input Capacitance
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 10µA (MAX.)
Quality and reliability
This page
Print version
Design tools
@ V
= 100V
DS
●
Lower R
: 0.155
Ω
(Typ.)
DS(ON)
back to top
Product status/pricing/packaging
Product
IRFR120ATM
IRFR120ATF
Product status
Pricing*
Package type
$0.51 TO-252(DPAK)
$0.51 TO-252(DPAK)
Leads
Packing method
TAPE REEL
Full Production
Full Production
2
2
TAPE REEL
* 1,000 piece Budgetary Pricing
back to top
Support
|
Company
|
Contact us
|
Site index
|
Privacy policy
© Copyright 2002 Fairchild Semiconductor
SEARCH |
Parametric
|
Cross Reference
sp
GO
Home
>>
Find products
>>
IRFU120A
Related Links
100V N-Channel A-FET / Substitute of
IRFU110
search
Contents
Features
|
Product status/pricing/packaging
Support
Features
representatives
●
●
●
●
●
●
Avalanche Rugged Technology
Rugged Gate Oxide Technology
Lower Input Capacitance
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 10µA (MAX.)
Quality and reliability
This page
Print version
Design tools
@ V
= 100V
DS
●
Lower R
: 0.155
Ω
(Typ.)
DS(ON)
back to top
Product status/pricing/packaging
Product
Product status
Full Production
Pricing*
Package type
Leads
Packing method
IRFU120ATU
$0.406 TO-251(IPAK)
3
RAIL
* 1,000 piece Budgetary Pricing
back to top
Support
|
Company
|
Contact us
|
Site index
|
Privacy policy
© Copyright 2002 Fairchild Semiconductor
