onsemi-IRLM110ATF

Part #onsemi-IRLM110ATF
Download 
onsemi-IRLM110ATF
IRLM110A  
Advanced Power MOSFET  
FEATURES  
BV

DSS

= 100
 
V  
R

DS(on)

= 0.44
 
Ω
 
I

D

= 1.5
 
A  
ν
ν
ν
ν
ν
ν
ν
Avalanche Rugged Technology  
Rugged Gate Oxide Technology  
Lower Input Capacitance  
Improved Gate Charge  
Extended Safe Operating Area  
Lower Leakage Current : 10
 
µ
A (Max.)
 
@ V

DS

= 100V  
Lower R

DS(ON)

: 0.336
 
Ω
(Typ.)  
SOT-223  
2
1
3
1. Gate
 
2. Drain
 
3. Source  
Absolute Maximum Ratings  
Symbol  
Characteristic  
Value  
100  
1.5  
Units  
V

DSS  

Drain-to-Source Voltage  
V
Continuous Drain Current (T

C

=25

o

C)  
Continuous Drain Current (T

C

=70

o

C)  
Drain Current-Pulsed  
I

D  

A
1.18  
12  
I

DM  

V

GS  

E

AS  

I

AR  

(1)  
A
V
Gate-to-Source Voltage  
±
20  
60  
Single Pulsed Avalanche Energy  
Avalanche Current  
(2)  
(1)  
(1)  
(3)  
mJ  
A
1.5  
E

AR  

dv/dt  
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
Total Power Dissipation (T

C

=25

o

C) *  
Linear Derating Factor
 
*  
0.22  
6.5  
mJ  
V/ns  
W
2.2  
P

D  

T

J

, T

STG  

T

L  

0.018  
W/

o

C  
Operating Junction and  
– 55
 
to +150  
300  
Storage Temperature Range  
Maximum Lead Temp. for Soldering  

o

C  
Purposes, 1/8” from case for 5-seconds  
Thermal Resistance  
Symbol  
Characteristic  
Typ.  
—  
Max.  
Units  

o

C/W  
R

θ
JA  

Junction-to-Ambient *  
56.8  
*
When mounted on the minimum pad size recommended
 
(PCB Mount).  
Rev. A  

N-CHANNEL  
POWER MOSFET  
IRLM110A  
Electrical Characteristics
(T

C

=25

o

C unless
 
otherwise specified)  
Symbol  
BV

DSS  

Characteristic  
Min. Typ. Max.
 
Units  
Test Condition  
V

GS

=0V,I

D

=250
µ
A  
Drain-Source Breakdown Voltage  
Breakdown Voltage Temp. Coeff.  
Gate Threshold Voltage  
V
V/

o

C  
V
100 —  
—  
∆
BV/
∆
T

J  

V

GS(th)  

I

D

=250
µ
A  
See Fig 7  
— 0.09 —  
V
V
V

DS

=5V,I

D

=250
µ
A  
1.0  
—  
—  
2.0  
100  

GS

=20V  
Gate-Source Leakage
 
, Forward  
Gate-Source Leakage
 
, Reverse  
—  
—  
—  
—  
I

GSS  

nA  

GS

=-20V  
— -100  
V

DS

=100V  
V

DS

=80V,T

C

=125

o

C  
(6)  
—  
—  
1
I

DSS  

Drain-to-Source Leakage Current  
µ
A  
100  
Static Drain-Source  
On-State Resistance  
Forward Transconductance  
Input Capacitance  
R

DS(on)  

V

GS

=5V,I

D

=0.75A  
V

DS

=40V,I

D

=0.75A  
(4)  
(4)  
—  
—  
Ω
0.44  
—  
g

fs  

C

iss  

C

oss  

C

rss  

t

d(on)  

t

r  

—  
—  
—  
—  
—  
—  
—  
—  
—  
—  
—  
2.0  
S
180 235  
V

GS

=0V,V

DS

=25V,f =1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Turn-On Delay Time  
Rise Time  
65  
25  
25  
30  
45  
25  
8
50  
20  
8
pF  
See Fig 5  
V

DD

=50V,I

D

=5.6A,  
10  
17  
8
R

G

=12
Ω  
ns  
t

d(off)  

t

f  

Turn-Off Delay Time  
Fall Time  
See Fig 13  
(4)(5)  
Q

g  

Total Gate Charge  
Gate-Source Charge  
Gate-Drain (“Miller”)
 
Charge  
5.5  
0.9  
3.5  
V

DS

=80V,V

GS

=5V,  
I

D

=5.6A  
Q

gs  

Q

gd  

nC  
—  
—  
See Fig 6 & Fig 12
 
(4)(5)  
Source-Drain Diode Ratings and Characteristics  
Symbol  
I

S  

Characteristic  
Continuous Source Current  
Pulsed-Source Current  
Diode Forward Voltage  
Reverse Recovery Time  
Reverse Recovery Charge  
Min. Typ. Max.
 
Units  
Test Condition  
Integral reverse pn-diode  
in the MOSFET  
T

J

=25

o

C,I

S

=2.3A,V

GS

=0V  
T

J

=25

o

C,I

F

=9.2A  
—  
—  
—  
—  
—  
—  
1.5  
12  
1.5  
—  
A
I

SM  

(1)  
(4)  
V

SD  

t

rr  

V
—  
ns  
µ
C  
85  
Q

rr  

— 0.23 —  
di

F

/dt=100A/
µ
s  
(4)  
Notes ;  
①
Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature  
②
L=40mH, I

AS

=1.5A, V

DD

=25V, R

G

=27
Ω
, Starting T

J

=25

o

C  
③
I

SD

< 5.6A, di/dt < 250A/
μ
s, V

DD

< BV

DSS

, Starting T

J

=25

o

C  
④
Pulse Test : Pulse Width = 250
µ
s, Duty Cycle < 2%  
⑤
Essentially Independent of Operating Temperature  

N-CHANNEL  
POWER MOSFET  
IRLM110A  
Fig 1.
 
Output Characteristics  
Fig 2.
 
Transfer Characteristics  
2
V
GS  
10  
Top :  
7.
0
V  
6.
0
V  
5.
5
V  
5.
0
V  
4.
5
V  
4.
0
V  
3.
5
V  
2
10  
175

o

C  
1
Bottom :
 
3.
0
V  
10  
1
10  
25

o

C  
@
N
otes :  
1. V
 
= 0 V  
GS  
@
N
otes :  
–
5
5

o

C  
2. V
 
= 40 V  
1. 250
 
s Pulse Test  
µ
DS  
0
2. T
 
= 25

o

C  
10  
3. 250
 
s Pulse Test  
µ
C
0
10  
-1  
0
1
0
2
4
6
8
10  
10  
10  
10  
V

G
S

,
G
ate-Source Voltage
 
[V]  
V

D
S

,
D
rain-Source Voltage
 
[V]  
Fig 3.
 
On-Resistance vs. Drain Current  
Fig 4.
 
Source-Drain Diode Forward Voltage  
0.08  
2
10  
V =
 
5 V  
GS  
0.06  
0.04  
0.02  
0.00  
1
10  
V =
 
1
0 V  
GS  
@
N
ote
s
:  
17
5

o

C  
1. V
 
= 0 V  
GS  
@
N
ot
e
: T =
2
5

o

C  
2
5

o

C  
2. 250
 
s
P
uls
e
T
est  
J
µ
0
10  
0
30  
60  
90  
120  
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4  
I ,
D
rain Current [A]  
V

S
D

,
S
ource-Drain Voltage
 
[V]  
D
Fig 5.
 
Capacitance vs. Drain-Source Voltage  
Fig 6.
 
Gate Charge vs. Gate-Source Voltage  
2500  
2000  
1500  
1000  
500  
C
=
C
 
+C (C
 
=
s
horte
d
)  
iss gs gd  
ds  
C
=
C
 
+C  
oss ds gd  
6
C
=
C  
V =
 
2
0 V  
rss gd  
DS  
C

i
ss  

C

o
ss  

C

r
ss  

V =
 
5
0 V  
DS  
V =
 
8
0 V  
DS  
4
2
0
@
N
ote
s
:  
1. V
 
= 0 V  
GS  
2.
f
= 1
M
Hz  
@
N
ote
s
:I =
 
2
8 A  
D
0

0  

10  
1
0
8
16  
24  
32  
40  
10  
Q ,
T
otal Gate Charge [nC]  
V

DS

,
D
rain-Source Voltage [V]  
G

N-CHANNEL  
POWER MOSFET  
IRLM110A  
Fig 7.
 
Breakdown Voltage vs. Temperature  
Fig 8.
 
On-Resistance vs. Temperature  
1.2  
1.1  
1.0  
0.9  
0.8  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
@
N
otes :  
1. V

GS

= 5 V  
@
N
otes :  
1. V

GS

= 0 V  
2. I
 
= 14 A  
D
2. I
 
= 250  
A
µ
D
-75 -50 -25  
0
25  
50  
75 100 125 150 175 200  
-75 -50 -25  
0
25  
50  
75 100 125 150 175 200  
o
o
T ,
J
unction Temperature
[
C
]  
T ,
J
unction Temperature
[
C
]  
J
J
Fig 9.
 
Max. Safe Operating Area  
Fig 10.
 
Max. Drain Current vs. Case Temperature  
30  
Operation in This Area  
is Limited by R

DS(on)  

2
24  
18  
12  
6
10  
100  
s
µ
1
m
s  
10 ms  
1
10  
DC  
@
N
otes :  
0
1. T
 
= 25

o

C  
10  
C
2. T
 
= 175

o

C  
J
3. Single Pulse  
-1  
0
10  
0
1
2
25  
50  
75  
100  
125  
150  
175  
10  
10  
10  
o
T ,
C
ase Temperature
[
C
]  
V

D
S

,
D
rain-Source Voltage
 
[V]  
c
Fig 11.
 
Thermal Response  
10

0  

10

–
1  

10

–
2  

D=0.5  
0.2  
@ Notes :  
1. Z

J
C

(t)=1.24

o

C/W Max.  
θ
2. Duty Factor, D=t

1

/t

2  

0.1  
3. T

J
M

-T

C

=P

D
M

*Z

J
C

(t)  
θ
0.05  
P

DM  

0.02  
0.01  
t

1  

t

2  

single pulse  
10

–
5  

10

–
4  

10

–
3  

10

–
2  

10

–
1  

10

0  

10

1  

t

1

, Square Wave Pulse Duration
 
[sec]  

N-CHANNEL  
POWER MOSFET  
IRLM110A  
Fig 12.
 
Gate Charge Test Circuit
 
& Waveform  
* Current Regulator ”  
V

GS  

Same Type  
as DUT  
50K
Ω
 
Q

g  

12V  
200nF  
10V  
300nF  
V

DS  

Q

gs  

Q

gd  

V

GS  

DUT  
R

2  

3mA  
R

1  

Charge  
Current Sampling (I

G

) Current
 
Sampling (I

D

)  
Resistor  
Resistor  
Fig 13.
 
Resistive Switching Test Circuit
 
& Waveforms  
R

L  

V

out  

V

in  

V

out  

90%  
V

DD  

( 0.5 rated V

DS  

)
R

G  

DUT  
10%  
V

in  

10V  
t

d(on)  

t

r  

t

d(off)  

t

f  

t

on  

t

off  

Fig 14.
 
Unclamped Inductive Switching Test Circuit
 
& Waveforms  
BV

DSS  

——————–  
BV

DSS

— V

DD  

1
2
2
L

L  

I

D  

—-  
E

AS  

=
L

L

I

AS  

V

DS  

BV

DSS  

I

AS  

Vary t

p

to obtain  
required peak I

D  

R

G  

I

D

(t)  
C
V

DD  

DUT  
V

DD  

V

DS

(t)  
5V  
t

p  

t

p  

Time  

N-CHANNEL  
POWER MOSFET  
IRLM110A  
Fig 15.
 
Peak Diode Recovery dv/dt Test Circuit
 
& Waveforms  
+
DUT  
V

DS  

—  
I

S  

L
Driver  
V

GS  

Same Type  
as DUT  
R

G  

V

DD  

V

GS  

• dv/dt controlled by
"
R

G

"  
• I

S

controlled by Duty Factor
"
D
"  
Gate Pulse Width  
————————–  
V

GS  

D =  
Gate Pulse Period  
10V  
( Driver )  
I

FM

, Body Diode Forward Current  
I

S  

di/dt  
( DUT )  
I

RM  

Body Diode Reverse Current  
Body Diode Recovery dv/dt  
V

f  

V

DS  

( DUT )  
V

DD  

Body Diode  
Forward Voltage Drop  

TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is  
not intended to be an exhaustive list of all such trademarks.  
â
SMART START™  
STAR*POWER™  
Stealth™  
VCX™  
FAST  
ACEx™  
Bottomless™  
CoolFET™  
OPTOLOGIC™  
OPTOPLANAR™  
PACMAN™  
FASTr™  
FRFET™  
SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
SyncFET™  
GlobalOptoisolator™  
GTO™  
HiSeC™  
ISOPLANAR™  
LittleFET™  
MicroFET™  
MicroPak™  
MICROWIRE™  
CROSSVOL
T
™  
DenseTrench™  
DOME™  
POP™  
Power247™  
PowerTrenc
h

â  

QFET™  
EcoSPARK™  
E

2

CMOS

TM  

TinyLogic™  
QS™  
EnSigna

TM  

TruTranslation™  
UHC™  
QT Optoelectronics™  
Quiet Series™  
SILEN
T
S
WITCHE
R

â  

FACT™  
FACT Quiet Series™  
UltraFE
T

â  

STAR*POWER is used under license  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER  
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILIT
Y
,
F
UNCTION OR DESIGN. FAIRCHILD  
DOES NOT ASSUME ANY LIABILIT
Y
A
RISING OUT OF THE APPLICATION OR USE O
F
A
NY PRODUCT  
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT  
RIGHTS, NOR THE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICE
S
O
R
S
YSTEM
S
W
ITHOU
T
T
H
E
E
XPRES
S
W
RITTE
N
A
PPROVA
L
O
F
F
AIRCHIL
D
S
EMICONDUCTO
R
C
ORPORATION.  
As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant into  
the body, or (b) support or sustain life, or (c) whose  
failure to perform when properly used in accordance  
with instructions for use provided in the labeling, can be  
reasonably expected to result in significant injury to the  
user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or  
In Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
Rev. H4  

SEARCH |
Parametric
|
Cross Reference  
sp  
GO  
space  
Product Folders and  
Applica  
sp
a
s
pa  
Home
>>
Find products
>>  
sp
a
s
pa  
IRLM110A  
100V N-Channel Logic Level A-FET  
Contents  
Features
|
Product status/pricing/packaging  
Features  
●
●
●
●
●
●
Avalanche Rugged Technology  
Rugged Gate Oxide Technology  
Lower Input Capacitance  
Improved Gate Charge  
Extended Safe Operating Area  
Lower Leakage Current : 10 µA (Max.)  
This page
Print version  
Design tools  
@ V
 
= 100V  
DS  
●
Lower R
 
: 0.336
Ω
(Typ.)  
DS  
back to top  
Product status/pricing/packaging  
Product  
Product status  
Full Production  
Pricing*  
$0.311  
Package type  
Leads  
Packing method  
company  
IRLM110ATF  
SOT-223  
3
TAPE REEL  
* 1,000 piece Budgetary Pricing  
back to top  
Support
|
Company
|
Contact us
|
Site index
|
Privacy policy  
© Copyright 2002 Fairchild Semiconductor