onsemi-MGSF3442XT1

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onsemi-MGSF3442XT1
MGSF3442XT1  
Preliminary Information  
Low R

DS(on)

Small-Signal  
MOSFE
T
s
S
ingle N-Channel  
Field Effect Transistors  
These miniature surface mount MOSFETs utilize the High Cell  
Density, HDTMOS process. Low r  
assures minimal power loss  
DS(on)  
and conserves energy, making this device ideal for use in small power  
management circuitry. Typical applications are dc
−
dc converters,  
power management in portable and battery
−
powered products such as  
computers, printers, PCMCIA cards, cellular and cordless telephones.  
N
−
CHANNEL  
ENHANCEMENT
−
MODE  
MOSFET  
•
Low R  
Provides Higher Efficiency and Extends Battery Life  
•
Miniature TSOP 6 Surface Mount Package Saves Board Space  
R

DS(on)

= 58 m
Ω
(TYP)  
DS(on)  
D
D
S
MAXIMUM RATINGS
(T =
 
25
°
C unless otherwise noted)  
CASE 318G
−
02, Style 1  
J
TSOP 6 PLASTIC  
D
Rating  
Symbol Value Unit  
D
G
Drain
−
to
−
Source Voltage  
V
20  
Vdc  
Vdc  
A
DSS  
Gate
−
to
−
Source Voltage
−
Continuous  
V
8.0  
GS  
1 2 5 6  
DRAIN  
Drain Current
−
Continuous @ T
 
= 25
°
C  
Drain Current
−
Pulsed Drain Current (t  
10
μ
s)  
I
D
1.7  
20  
A
≤
I
p
DM  
T
o
tal Power Dissipation @ T
 
= 25
°
C  
P
400  
mW  
A
D
3
Operating and Storage
T
e
mperature Range  
T , T  
J
−
55 to  
150  
°
C  
stg  
GATE  
SOURCE  
4
Thermal Resistance
−
Junction
−
to
−
Ambient  
R
300  
260  
°
C/W  
°
C  
θ
JA  
Maximum Lead
T
e
mperature for Soldering  
Purposes, for 10 seconds  
T
L
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
ORDERING INFORMATION  
Device  
Reel Size  
Tape Width  
Quantity  
3000  
MGSF3442XT1  
MGSF3442XT3  
7
″  
8 mm embossed tape  
8 mm embossed tape  
13
″  
10,000  
This document contains information on a product under development. ON Semiconductor  
reserves the right to change or discontinue this product without notice.  
©
Semiconductor Components Industries, LLC, 2013  
1
Publication Order Number:  
May, 2013
−
Rev. 2  
MGSF3442XT1/D  

MGSF3442XT1  
ELECTRICAL CHARACTERISTICS
(T =
 
25
°
C unless otherwise noted)  
A
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Drain
−
to
−
Source Breakdown Voltage  
V
Vdc  
(BR)DSS  
(V =
 
0 Vdc, I
 
= 10
μ
A)  
20  
−
−
GS  
D
Zero Gate Voltage Drain Current  
(V =
 
20 Vdc, V
 
= 0 Vdc)  
I
μ
Adc  
DSS  
−
−
−
−
1.0  
5.0  
DS  
GS  
(V =
 
20 Vdc, V
 
= 0 Vdc, T
 
= 70
°
C)  
DS  
GS  
J
Gate
−
Body Leakage Current (V  
=
8.0 Vdc, V
 
= 0)  
I
−
−
100  
nAdc  
GS  
DS  
GSS  
(1)  
ON CHARACTERISTICS  
Gate Threshold Voltage  
V
GS(th)  
Vdc  
(V =
 
V ,
 
I =
 
250
μ
Adc)  
0.6  
−
−
DS  
GS  
D
Static Drain
−
to
−
Source On
−
Resistance  
(V =
 
4.5 Vdc, I
 
= 1.7 A)  
r
Ohms  
DS(on)  
−
−
0.058  
0.072  
0.070  
0.095  
GS  
D
(V =
 
2.5 Vdc, I
 
= 1.3 A)  
GS  
D
DYNAMIC CHARACTERISTICS  
Input Capacitance  
(V =
 
5.0 V)  
C
−
−
−
90  
50  
10  
−
−
−
pF  
ns  
DS  
iss  
Output Capacitance  
Transfer Capacitance  
(V =
 
5.0 V)  
DS  
C
oss  
(V =
 
5.0 V)  
DG  
C
rss  
(2)  
SWITCHING CHARACTERISTICS  
Turn
−
On Delay Time  
t
−
−
−
−
−
8.0  
24  
36  
10  
−
20  
40  
60  
20  
−
d(on)  
Rise Time  
t
r
(V =
 
10 Vdc, I
 
= 1.0 A,  
DD  
D
V
= 10
V
, R
 
=
1
0
Ω
)  
GEN  
L
Turn
−
Off Delay Time  
Fall Time  
t
d(off)  
t
f
Gate Charge  
Q
nC  
T
SOURCE
−
DRAIN DIODE CHARACTERISTICS  
Continuous Current  
I
−
−
−
−
−
−
1.0  
5.0  
1.2  
A
A
V
S
Pulsed Current  
I
SM  
(2)  
Forward Voltage  
V
SD  
(1) Pulse
 
T
e
st: Pulse Width
≤
300
μ
s, Duty Cycle
≤
2%.  
(2) Switching
 
characteristics are independent of operating junction temperature.  
2

MGSF3442XT1  
INFORMATION FOR USING THE TSOP
−
6 SURFACE MOUNT PACKAGE  
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS  
Surface mount board layout is a critical portion of the total  
design. The footprint for the semiconductor packages must  
be the correct size to insure proper solder connection  
interface between the board and the package. With the  
correct pad geometry, the packages will self align when  
subjected to a solder reflow process.  
0.094  
2.4  
0.037  
0.95  
0.074  
1.9  
0.037  
0.95  
0.028  
0.7  
0.039  
1.0  
inches  
mm  
TSOP
−
6  
TSOP
−
6 POWER DISSIPATION  
The power dissipation of the TSOP
−
6 is a function of the  
drain pad size. This can vary from the minimum pad size for  
soldering to a pad size given for maximum power  
dissipation. Power dissipation for a surface mount device is  
determined by T

J(max)

, the maximum rated junction  
temperature of the die, R

θ

JA

, the thermal resistance from  
the device junction to ambient, and the operating  
temperature, T

A

. Using the values provided on the data  
sheet for the TSOP
−
6 package, P

D

can be calculated as  
follows:  
SOLDERING PRECAUTIONS  
The melting temperature of solder is higher than the rated  
temperature of the device. When the entire device is heated  
to a high temperature, failure to complete soldering within a  
short time could result in device failure. Therefore, the  
following items should always be observed in order to  
minimize the thermal stress to which the devices are  
subjected.  
•
Always preheat the device.  
•
The delta temperature between the preheat and  
T

J(max)

−
T

A  

soldering should be 100
°
C or less.*  
P

D

=  
R

θ  

JA  
•
When preheating and soldering, the temperature of the  
leads and the case must not exceed the maximum  
temperature ratings as shown on the data sheet. When  
using infrared heating with the reflow soldering method,  
the difference shall be a maximum of 10
°
C.  
The values for the equation are found in the maximum  
ratings table on the data sheet. Substituting these values  
into the equation for an ambient temperature T

A

of 25
°
C,  
one can calculate the power dissipation of the device which  
in this case is 400 milliwatts.  
•
The soldering temperature and time shall not exceed  
260
°
C for more than 10 seconds.  
150
°
C
−
25
°
C  
300
°
C/W  
•
When shifting from preheating to soldering, the  
maximum temperature gradient shall be 5
°
C or less.  
•
After soldering has been completed, the device should  
be allowed to cool naturally for at least three minutes.  
Gradual cooling should be used as the use of forced  
cooling will increase the temperature gradient and  
result in latent failure due to mechanical stress.  
•
Mechanical stress or shock should not be applied  
during cooling.  
P

D

=  
= 400 milliwatts  
The 300
°
C/W for the TSOP
−
6 package assumes the use  
of the recommended footprint on a glass epoxy printed  
circuit board to achieve a power dissipation of 400  
milliwatts. There are other alternatives to achieving higher  
power dissipation from the TSOP
−
6 package. Another  
alternative would be to use a ceramic substrate or an  
aluminum core board such as Thermal Clad
™
. Using a  
board material such as Thermal Clad, an aluminum core  
board, the power dissipation can be doubled using the  
same footprint.  
* Soldering
 
a device without preheating can cause  
excessive thermal shock and stress which can result in  
damage to the device.  
3

MGSF3442XT1  
PACKAGE DIMENSIONS  
TSOP
−
6  
CASE 318G
−
02  
ISSUE V  
NOTES:  
D
1. DIMENSIONING
 
AND TOLERANCING PER ASME Y14.5M, 1994.  
2. CONTROLLING
 
DIMENSION: MILLIMETERS.  
H
3. MAXIMUM
 
LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM  
LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.  
4. DIMENSIONS
 
D AND E1 DO NOT INCLUDE MOLD FLASH,  
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR  
GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D  
AND E1 ARE DETERMINED AT DATUM H.  
6
1
5
4
L2  
GAUGE  
PLANE  
E1  
E
5. PIN
 
ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.  
2
3
L
MILLIMETERS  
SEATING  
M
C
NOTE 5  
DIM  
A
A1  
b
c
D
E
E1  
e
MIN  
0.90  
0.01  
0.25  
0.10  
2.90  
2.50  
1.30  
0.85  
0.20  
NOM  
1.00  
MAX  
1.10  
0.10  
0.50  
0.26  
3.10  
3.00  
1.70  
1.05  
0.60  
PLANE  
b
DETAIL Z  
e
0.06  
0.38  
0.18  
3.00  
c
2.75  
A
0.05  
1.50  
0.95  
L
0.40  
A1  
L2  
M
0.25 BSC  
−
DETAIL Z  
0
°  
1
0
°  
STYLE 1:  
PIN 1.
 
DRAIN  
2. DRAIN  
3. GATE  
4. SOURCE  
5. DRAIN  
6. DRAIN  
RECOMMENDED  
SOLDERING FOOTPRINT*  
6X  
0.60  
6X  
0.95  
3.20  
0.95  
PITCH  
DIMENSIONS: MILLIMETERS  
*For additional information on our Pb
−
Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.  
Thermal Clad is a trademark of the Bergquist Company.  
ON Semiconductor
and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).
 
SCILLC owns the rights to a number of patents, trademarks,  
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at

. SCILLC  
reserves the right to make changes without further notice to any products herein.
 
SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any  
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without  
limitation special, consequential or incidental damages.
 
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications  
and actual performance may vary over time.
 
All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
 
SCILLC  
does not convey any license under its patent rights nor the rights of others.
 
SCILLC products are not designed, intended, or authorized for use as components in systems intended for  
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where  
personal injury or death may occur.
 
Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and  
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,  
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture  
of the part.
 
SCILLC is an Equal Opportunity/Affirmative Action Employer.
 
This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
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T
:  
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−
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−
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o
ll Free  
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−
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−
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1050  
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.
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ll Free USA/Canada  
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−
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−
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For additional information, please contact your local  
Sales Representative  
MGSF3442XT1/D