onsemi-MJD128T4G

MJD128T4G (PNP)  

Complementary Darlington  

Power

T

r

ansistor  

DPAK For Surface Mount Applications  

Designed for general purpose amplifier and low speed switching  

applications.  

Features  

•

Monolithic Construction With Built−in Base−Emitter Shunt Resistors  

•

High DC Current Gain: h

 

= 2500 (Typ) @ I

 

= 4.0 Adc  

SILICON  

POWER TRANSISTOR  

8 AMPERES  

FE  

C

•

Epoxy Meets UL 94 V−0 @ 0.125 in.  

•

ESD Ratings:  

120 VOLTS, 20 WATTS  

♦

Human Body Model, 3B > 8000 V  

♦

Machine Model, C > 400 V  

•

NJV Prefix for Automotive and Other Applications Requiring  

Unique Site and Control Change Requirements; AEC−Q101  

Qualified and PPAP Capable  

DPAK  

CASE 369C  

STYLE 1  

•

These are Pb−Free Devices*  

MAXIMUM RATINGS  

Rating  

Collector−Emitter Voltage  

Collector−Base Voltage  

Emitter−Base Voltage  

Symbol  

Value  

120  

120  

5

Unit  

Vdc  

Vdc  

Vdc  

Adc  

MARKING DIAGRAM  

V

CEO  

Base  

Collector  

Emitter  

1

3

V

CB  

EB  

AYWW  

J128G  

4

2

V

Collector Current  

Continuous  

Peak  

I

C

8

16  

A

Y

= Assembly Location  

=

Y

e

ar  

WW =

 

Work Week  

J128 =

 

Device Code  

Base Current  

I

B

120  

mAdc  

T

o

tal Power Dissipation  

P

D

W

W/

°

C  

G

= Pb−Free Package  

@ T

 

= 25

°

C  

20  

0.16  

C

Derate above 25

°

C  

T

o

tal Power Dissipation*  

P

D

W

W/

°

C  

ORDERING INFORMATION  

@ T

 

= 25

°

C  

1.75  

0.014  

A

Derate above 25

°

C  

†

Device  

Package  

Shipping  

Operating and Storage Junction  

T

e

mperature Range  

T , T  

−

6

5 to  

+

1

50  

°

C  

J

stg  

MJD128T4G  

DPAK  

(Pb−Free)  

2,500/

T

a

pe & Reel  

Stresses exceeding those listed in the Maximum Ratings table may damage the  

device. If any of these limits are exceeded, device functionality should not be  

assumed, damage may occur and reliability may be affected.  

NJVMJD128T4G  

DPAK  

(Pb−Free)  

2,500/

T

a

pe & Reel  

†For information on tape and reel specifications,  

including part orientation and tape sizes, please  

refer to our

T

a

pe and Reel Packaging Specifications  

Brochure, BRD8011/D.  

THERMAL CHARACTERISTICS  

Characteristic  

Symbol  

Max  

Unit  

°

C/W  

°

C/W  

Thermal Resistance,

 

Junction−to−Case  

R

6.25  

q

JC  

JA  

Thermal Resistance,  

R

q

71.4  

1. These

 

ratings are applicable when surface mounted on the minimum pad  

sizes recommended.  

*For additional information on our Pb−Free strategy and soldering details, please  

download the ON Semiconductor Soldering and Mounting

T

e

chniques  

Reference Manual, SOLDERRM/D.  

©

Semiconductor Components Industries, LLC, 2016  

1

Publication Order Number:  

January, 2016 − Rev. 6  

MJD128/D  

MJD128T4G (PNP)  

ELECTRICAL CHARACTERISTICS

(T =

 

25

°

C unless otherwise noted)  

C

Characteristic  

Symbol  

Min  

Max  

Unit  

OFF CHARACTERISTICS  

Collector−Emitter Sustaining Voltage  

V

Vdc  

mA  

CEO(sus)  

(I =

 

30 mAdc, I

 

= 0)  

120  

−

−

5

C

B

Collector Cutoff Current  

(V =

 

120 Vdc, I

 

= 0)  

I

I

CEO  

CBO  

CE  

B

Collector Cutoff Current  

(V =

 

100 Vdc, I

 

= 0)  

m

Adc  

mAdc  

−

10  

2

CB  

E

Emitter Cutoff Current  

(V =

 

5 Vdc, I

 

= 0)  

I

EBO  

−

BE  

C

ON CHARACTERISTICS  

DC Current Gain  

h

FE  

−

(I =

 

4 Adc, V

 

= 4 Vdc)  

C

CE  

1000  

100  

12,000  

−

(I =

 

8 Adc, V

 

= 4 Vdc)  

C

CE  

Collector−Emitter Saturation Voltage  

(I =

 

4 Adc, I

 

= 16 mAdc)  

V

V

Vdc  

CE(sat)  

BE(sat)  

C

B

−

−

2

4

(I =

 

8 Adc, I

 

= 80 mAdc)  

C

B

Base−Emitter Saturation Voltage (1)  

(I =

 

8 Adc, I

 

= 80 mAdc)  

Vdc  

Vdc  

−

−

4.5  

2.8  

C

B

Base−Emitter On Voltage  

(I =

 

4 Adc, V

 

= 4 Vdc)  

V

BE(on)  

C

CE  

DYNAMIC CHARACTERISTICS  

Current−Gain−Bandwidth Product  

|h |  

MHz  

pF  

−

fe  

(I =

 

3 Adc, V

 

= 4 Vdc, f = 1 MHz)  

4

−

−

300  

−

C

CE  

Output Capacitance  

(V =

 

10 Vdc, I

 

= 0, f = 0.1 MHz)  

C

ob  

fe  

CB  

E

Small−Signal Current Gain  

(I =

 

3 Adc, V

 

= 4 Vdc, f = 1 kHz)  

h

300  

C

CE  

2. Pulse

 

T

e

st: Pulse Width

v

300

m

s, Duty Cycle

v

2%.  

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  

performance may not be indicated by the Electrical Characteristics if operated under different conditions.  

T

A

T

C

2.5 25  

2

20  

T

C

1.5 15  

T

A

1

0.5  

0

10  

5

SURFACE  

MOUNT  

0

25  

50  

75  

100  

125  

150  

T, TEMPERATURE (

°

C)  

Figure 1. Power Derating  

2

MJD128T4G (PNP)  

TYPICAL ELECTRICAL CHARACTERISTICS  

3

20,000  

V

CE  

= 4 V  

T =

 

25

°

C  

J

10,000  

7000  

2.6  

2.2  

1.8  

I =

 

2 A  

C

4 A  

6 A  

5000  

T =

 

150

°

C  

J

3000  

2000  

25

°

C  

1000  

700  

500  

-ꢀ55

°

C  

1.4  

1

300  

200  

0.3  

0.5 0.7  

1

2

3

5

7

10  

20 30  

0.1  

0.2 0.3  

0.5 0.7  

1

2

3

5

7

10  

I ,

 

COLLECTOR CURRENT (AMP)  

C

I ,

 

BASE CURRENT (mA)  

B

Figure 2. DC Current Gain  

Figure 3. Collector Saturation Region  

3

2.5  

2

+ꢀ5  

+ꢀ4  

+ꢀ3  

+ꢀ2  

+ꢀ1  

0

*I /I

 

≤

h  

C B  

FE/3  

T =

 

25

°

C  

J

25

°

C to 150

°

C  

-ꢀ1  

1.5  

V

BE  

@ V

 

= 4 V  

CE  

q

for V  

CE(sat)  

VC  

-ꢀ2  

-ꢀ3  

-ꢀ55

°

C to 25

°

C  

25

°

C to 150

°

C  

V

@ I

 

/I =

 

250  

C B  

BE(sat)  

1

q

for V  

BE  

-ꢀ55

°

C to 25

°

C  

VB  

-ꢀ4  

-ꢀ5  

V

@ I

 

/I =

 

250  

C B  

CE(sat)  

0.5  

0.1  

0.2 0.3  

0.5 0.7  

1

2

3

5

7

10  

0.1  

0.2 0.3  

0.5  

1

2

3

5

7

10  

I ,

 

COLLECTOR CURRENT (AMP)  

C

I ,

 

COLLECTOR CURRENT (AMP)  

C

Figure 4. “On” Voltages  

Figure 5. Temperature Coefficients  

5

10  

10,000  

5000  

REVERSE  

FORWARD  

4

10  

10  

10  

10  

3000  

2000  

V

CE  

= 30 V  

3

1000  

500  

T =

 

25

°

C  

C

2

1

300  

200  

V

CE  

I =

 

3 Adc  

= 4 Vdc  

T =

 

150

°

C  

J

C

100  

100

°

C  

25

°

C  

50  

30  

20  

PNP  

NPN  

0

10  

-1  

10  

10  

+ꢀ0.6 +ꢀ0.4 +ꢀ0.2  

0

-ꢀ0.2 -ꢀ0.4 -ꢀ0.6 -ꢀ0.8

 

-ꢀ1 -ꢀ1.2

 

-ꢀ1.4  

1

2

5

10  

20  

50 100

 

200  

500 1000  

f, FREQUENCY (kHz)  

V

BE  

, BASE−EMITTER VOLTAGE (VOLTS)  

Figure 6. Collector Cut−Off Region  

Figure 7. Small−Signal Current Gain  

3

MJD128T4G (PNP)  

300  

200  

T =

 

25

°

C  

J

C

ob  

100  

70  

C

5

ib  

50  

30  

0.1 0.2  

0.5  

1

2

10  

20  

50 100  

V ,

 

REVERSE VOLTAGE (VOLTS)  

R

Figure 8. Capacitance  

5

t

s

R &

 

R VARIED

 

TO OBTAIN DESIRED CURRENT LEVELS  

V

CC  

-ꢀ30 V  

B

C

ꢃD ,

 

MUST BE FAST RECOVERY TYPE, e.g.:  

3

2

1

ꢃꢃ1N5825 USED ABOVE I

 

≈

100 mA  

B

ꢃꢃMSD6100 USED BELOW I

 

≈

100 mA  

B

R

t

f

C

SCOPE  

1

TUT  

0.7  

0.5  

V

2

R

B

APPROX  

+ꢀ8 V  

0.3  

0.2  

≈

8 k

 

≈

120  

D

51  

1

0

t

r

V

= 30 V  

I /I

 

= 250  

V

1

CC  

APPROX  

-12 V  

C B  

+ 4 V  

0.1  

0.07  

0.05  

I

= I  

B1 B2  

25

m

s  

t @

 

V  

d

= 0 V  

BE(off)  

T =

 

25

°

C  

J

FOR t

 

AND t , D

 

IS DISCONNECTED  

1

d

AND V

 

= 0  

r

t , t

 

≤

10 ns  

r

f

DUTY CYCLE = 1%  

2

0.1  

0.3  

0.5 0.7  

1

2

3

5

7

10  

0.2  

FOR NPN TEST CIRCUIT REVERSE ALL POLARITIES.  

I ,

 

COLLECTOR CURRENT (AMP)  

C

Figure 9. Switching Times Test Circuit  

Figure 10. Switching Times  

1

0.7  

0.5  

D = 0.5  

0.2  

0.3  

0.2  

0.1  

0.05  

P

(pk)  

R

R

= r(t) R  

q

JC  

= 6.25

°

C/W  

q

q

JC(t)  

0.1  

0.07  

0.05  

JC  

D CURVES APPLY FOR POWER  

0.01  

PULSE TRAIN SHOWN  

t

1

READ TIME AT t  

t

1

2

0.03  

0.02  

SINGLE PULSE  

0.02 0.03

 

0.05  

T

J(pk)  

− T

 

= P  

q

C

(pk) JC(t)  

DUTY CYCLE, D = t

 

/t  

1 2  

0.01  

0.01  

0.1  

0.2 0.3

 

0.5  

1

2

3

5

10  

20 30  

50  

100  

200 300

 

500  

1000  

t, TIME OR PULSE WIDTH (ms)  

Figure 11. Thermal Response  

4

MJD128T4G (PNP)  

20  

15  

10  

There are two limitations on the power handling ability of  

a transistor: average junction temperature and second  

breakdown. Safe operating area curves indicate I

 

− V  

500ꢂ

m

s  

100ꢂ

m

s  

C

CE  

5

limits of the transistor that must be observed for reliable  

operation; i.e., the transistor must not be subjected to greater  

dissipation than the curves indicate.  

3

2

1ꢂms  

T =

 

150

°

C  

J

1

variable depending on conditions. Second breakdown pulse  

limits are valid for duty cycles to 10% provided T  

= 150

°

C; T

 

is  

5ꢂms  

J(pk)  

C

0.5  

0.3  

0.2  

BONDING WIRE LIMIT  

THERMAL LIMIT  

J(pk)  

T =

 

25

°

C (SINGLE PULSE)  

dc  

< 150

°

C. T  

may be calculated from the data in  

0.1  

C

SECOND BREAKDOWN LIMIT  

CURVES APPLY BELOW RATED V  

J(pk)  

Figure

. At high case temperatures, thermal limitations  

will reduce the power that can be handled to values less than  

the limitations imposed by second breakdown.  

0.05  

0.03  

0.02  

CEO  

1

2

3

5

7

10  

20 30  

50  

100 120 200  

V

CE  

, COLLECTOR-EMITTER VOLTAGE (VOLTS)  

Figure 12. Maximum Forward Bias  

Safe Operating REA  

COLLECTOR  

BASE  

≈

8 k  

≈

120  

EMITTER  

Figure 13. Darlington Schematic  

5

MECHANICAL CASE OUTLINE  

PACKAGE DIMENSIONS  

DPAK (SINGLE GAUGE)  

CASE 369C  

4

ISSUE F  

2

1

DATE 21 JUL 2015  

3

SCALE 1:1  

NOTES:  

1. DIMENSIONING AND TOLERANCING PER ASME  

Y14.5M, 1994.  

2. CONTROLLING DIMENSION: INCHES.  

3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-  

MENSIONS b3, L3 and Z.  

A

D

E

C

A

b3  

B

4. DIMENSIONS D AND E DO NOT INCLUDE MOLD  

FLASH, PROTRUSIONS, OR BURRS. MOLD  

FLASH, PROTRUSIONS, OR GATE BURRS SHALL  

NOT EXCEED 0.006 INCHES PER SIDE.  

5. DIMENSIONS D AND E ARE DETERMINED AT THE  

OUTERMOST EXTREMES OF THE PLASTIC BOD

Y

.  

6. DATUMS A AND B ARE DETERMINED AT DATUM  

PLANE H.  

c2  

4

2

L3  

Z

DETAIL A  

H

1

3

7. OPTIONAL MOLD FEATURE.  

INCHES  

DIM MIN

 

MAX  

0.086 0.094  

A1

0.000 0.005  

0.025 0.035  

b2

0.028 0.045  

b3

0.180 0.215  

MILLIMETERS  

L4  

NOTE 7  

MIN  

2.18  

0.00  

0.63  

0.72  

4.57  

0.46  

0.46  

5.97  

6.35  

MAX  

2.38  

0.13  

0.89  

1.14  

5.46  

0.61  

0.61  

6.22  

6.73  

c

b2  

e

BOTTOM VIEW  

A

SIDE VIEW  

b

b

M

0.005 (0.13)  

C

TOP VIEW  

c

0.018 0.024  

c2

0.018 0.024  

Z

Z

D

E

e

0.235 0.245  

0.250 0.265  

0.090 BSC  

H

2.29 BSC  

9.40 10.41  

1.40 1.78  

2.90 REF  

0.51 BSC  

0.89 1.27  

GAUGE  

PLANE  

SEATING  

PLANE  

H

L

L1  

L2  

0.370 0.410  

0.055 0.070  

0.114 REF  

L2  

C

0.020 BSC  

L3

0.035 0.050  

L

BOTTOM VIEW  

A1  

L4  

Z

−−−

0.040  

0.155

−−−  

−−−  

3.93  

1.01  

−−−  

L1  

ALTERNATE  

CONSTRUCTIONS  

DETAIL A  

ROTATED 9

0

5

CW  

GENERIC  

MARKING DIAGRAM*  

STYLE 1:  

PIN 1.

 

BASE  

STYLE 2:  

PIN 1.

 

GATE  

2. DRAIN  

STYLE 3:  

STYLE 4:  

STYLE 5:  

PIN 1.

 

GATE  

PIN 1.

 

ANODE  

2. CATHODE  

3. ANODE  

PIN 1.

 

CATHODE  

2. ANODE  

2. COLLECTOR  

2. ANODE  

3. CATHODE  

4. ANODE  

3. EMITTER  

3. SOURCE  

4. DRAIN  

3. GATE  

4. ANODE  

XXXXXXG  

ALYWW  

AYWW  

XXX  

4. COLLECTOR  

4. CATHODE  

STYLE 6:  

PIN 1.

 

MT1  

2. MT2  

STYLE 7:  

STYLE 8:  

STYLE 9:  

PIN 1.

 

ANODE  

2. CATHODE  

STYLE 10:  

PIN 1.

 

CATHODE  

2. ANODE  

XXXXXG  

PIN 1.

 

GATE  

PIN 1.

 

N/C  

2. COLLECTOR  

2. CATHODE  

3. GATE  

4. MT2  

3. EMITTER  

3. ANODE  

3. RESISTOR

 

ADJUST  

4. CATHODE  

3. CATHODE  

4. ANODE  

4. COLLECTOR  

4. CATHODE  

IC  

Discrete  

SOLDERING FOOTPRINT*  

XXXXXX =

 

Device Code  

A

L

Y

WW  

G

= Assembly Location  

= Wafer Lot  

=

Y

e

ar  

= Work Week  

= Pb

−

Free Package  

6.20  

0.244  

3.00  

0.118  

2.58  

0.102  

*This information is generic. Please refer  

to device data sheet for actual part  

marking.  

5.80  

0.228  

1.60  

0.063  

6.17  

0.243  

mm  

inches  

ǒ

Ǔ

SCALE 3:1  

*For additional information on our Pb

−

Free strategy and soldering  

details, please download the ON Semiconductor Soldering and  

Mounting

T

e

chniques Reference Manual, SOLDERRM/D.  

Electronic versions are uncontrolled except when accessed directly from the Document Repository.  

Printed versions

 

are uncontrolled

 

except when stamped

 

“CONTROLLED COPY” in red.  

DOCUMENT NUMBER:  

DESCRIPTION:  

98AON10527D  

DPAK (SINGLE GAUGE)  

PAGE 1 OF 1  

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