onsemi-MJD210T4

Part #onsemi-MJD210T4
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onsemi-MJD210T4
Complementary Plastic  
Power
T
r
ansistors  
NPN/PNP Silicon DPAK For Surface  
Mount Applications  
MJD200 (NPN),  
MJD210 (PNP)  
Designed for low voltage, low
−
power, high
−
gain audio  
amplifier applications.  
SILICON  
POWER TRANSISTORS  
5 AMPERES  
25 VOLTS, 12.5 WATTS  
Features  
•
High DC Current Gain  
•
Lead Formed for Surface Mount Applications in Plastic Sleeves  
(No Suffix)  
•
Low Collector
−
Emitter Saturation
V
o
ltage  
•
High Current
−
Gain
−
Bandwidth Product  
•
Annular Construction for Low Leakage  
•
Epoxy Meets UL 94 V
−
0 @ 0.125 in  
•
NJV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AEC
−
Q101  
Qualified and PPAP Capable  
PNP  
NPN  
COLLECTOR  
2,4  
COLLECTOR  
2,4  
1
1
BASE  
BASE  
•
These Devices are Pb
−
Free and are RoHS Compliant  
3
3
EMITTER  
EMITTER  
MAXIMUM RATINGS  
Rating  
Collector
−
Base Voltage  
Collector
−
Emitter Voltage  
Emitter
−
Base Voltage  
Collector Current
−
Continuous  
Collector Current
−
Peak  
Base Current  
Symbol  
Max  
40  
Unit  
Vdc  
Vdc  
Vdc  
Adc  
Adc  
Adc  
4
V
CB  
1
2
V
CEO  
25  
3
V
EB  
8.0  
5.0  
10  
DPAK  
I
C
CASE 369C  
STYLE 1  
I
CM  
I
B
1.0  
MARKING DIAGRAM  
T
o
tal Power Dissipation  
P
D
D
12.5  
0.1  
W
W/
°
C  
@ T
 
= 25
°
C  
C
Derate above 25
°
C  
AYWW  
J2x0G  
P
1.4  
0.011  
W
W/
°
C  
@ T
 
= 25
°
C  
A
Derate above 25
°
C  
A
Y
= Assembly Location  
=
Y
e
ar  
Operating and Storage Junction  
T
e
mperature Range  
T , T  
−
65 to
+
1
50  
°
C  
J
stg  
WW =
 
Work Week  
x = 1 or 0  
ESD
−
Human Body Model  
ESD
−
Machine Model  
HBM  
MM  
3B  
C
V
V
G
= Pb
−
Free Package  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
1. These
 
ratings are applicable when surface mounted on the minimum pad  
sizes recommended.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Max  
Unit  
Thermal Resistance, Junction
−
to
−
Case  
R
10  
°
C/W  
q
JC  
Thermal Resistance, Junction
−
to
−

R
89.3  
°
C/W  
q
JA  
2. These
 
ratings are applicable when surface mounted on the minimum pad sizes recommended.  
©
Semiconductor Components Industries, LLC, 2013  
1
Publication Order Number:  
October, 2019
−
Rev. 14  
MJD200/D  
 

MJD200 (NPN), MJD210 (PNP)  
ELECTRICAL CHARACTERISTICS
(T =
 
25
°
C unless otherwise noted)  
C
Characteristic  
Symbol  
Min  
Max  
Unit  
OFF CHARACTERISTICS  
Collector
−
Emitter Sustaining Vo

V
Vdc  
CEO(sus)  
(I =
 
10 mAdc, I
 
= 0)  
25  
−
C
B
Collector Cutoff Current  
(V =
 
40 Vdc, I
 
= 0)  
I
CBO  
−
−
100  
100  
nAdc  
m
Adc  
CB  
E
(V =
 
40 Vdc, I
 
= 0, T
 
= 125
°
C)  
CB  
E
J
Emitter Cutoff Current  
(V =
 
8 Vdc, I
 
= 0)  
I
nAdc  
EBO  
−
100  
BE  
C
ON CHARACTERISTICS  
h
FE  
−
(I =
 
500 mAdc, V
 
= 1 Vdc)  
C
C
CE  
70  
45  
10  
−
180  
−
(I =
 
2 Adc, V
 
= 1 Vdc)  
CE  
(I =
 
5 Adc, V
 
= 2 Vdc)  
C
CE  
Collector
−
Emitter Saturation V

(I =
 
500 mAdc, I
 
= 50 mAdc)  
V
V
Vdc  
CE(sat)  
C
B
−
−
−
0.3  
0.75  
1.8  
(I =
 
2 Adc, I
 
= 200 mAdc)  
C
C
B
B
(I =
 
5 Adc, I
 
= 1 Adc)  
Base
−
Emitter Saturation V

(I =
 
5 Adc, I
 
= 1 Adc)  
Vdc  
Vdc  
BE(sat)  
−
−
2.5  
1.6  
C
B
Base
−
Emitter On Vo

(I =
 
2 Adc, V
 
= 1 Vdc)  
V
BE(on)  
C
CE  
DYNAMIC CHARACTERISTICS  
f
MHz  
pF  
T
(I =
 
100 mAdc, V
 
= 10 Vdc, f  
65  
−
C
CE  
test  
Output Capacitance  
C
ob  
(V =
 
10 Vdc, I
 
= 0, f = 0.1 MHz)  
CB  
E
MJD200  
−
−
80  
120  
MJD210, NJVMJD210T4G  
3. Pulse
 
T
e
st: Pulse Width = 300
m
s, Duty Cycle
[
2%.  
4. f =
 
⎪
h
⎪•
f  
.
T
fe  
test  
T
A
T
C
2.5 25  
V
CC  
+ꢀ30 V  
2
20  
25
m
s  
R
+11 V  
0
C
SCOPE  
R
1.5 15  
B
-ꢀ9 V  
t , t
 
≤
10 ns  
DUTY CYCLE = 1%  
D
T (SURFACE
 
MOUNT)  
A
1
51  
1
0.5  
0
10  
5
r
f
T
C
-ꢀ4 V  
R and
 
R VARIED
 
TO OBTAIN DESIRED CURRENT LEVELS  
B
C
D MUST
 
BE FAST RECOVERY TYPE, e.g.:  
1
0
FOR PNP TEST CIRCUI
T
,  
REVERSE ALL POLARITIES  
ꢁ1N5825 USED ABOVE I
 
≈
100 mA  
ꢁMSD6100 USED BELOW I
 
≈
100 mA  
B
25  
50  
75  
100  
125  
150  
B
T, TEMPERATURE (
°
C)  
Figure 1. Power Derating  
Figure 2. Switching Time Test Circuit  
2
 

MJD200 (NPN), MJD210 (PNP)  
1K  
10K  
5K  
t
d
V
CC  
I /I
 
= 10  
= 30 V  
500  
t
s
300  
200  
3K  
2K  
C B  
I =
 
I  
B1 B2  
T =
 
25
°
C  
J
100  
50  
1K  
500  
300  
200  
100  
50  
30  
20  
t
r
V
CC  
I /I
 
= 10  
= 30 V  
C
B
10  
5
T =
 
25
°
C  
J
3
2
30  
20  
MJD200  
MJD210  
MJD200  
MJD210  
t
f
1
0.01  
10  
0.01  
0.03 0.05
 
0.1  
0.2 0.3
 
0.5  
1
2
3
5
10  
0.03 0.05
 
0.1  
0.02  
0.2 0.3
 
0.5  
1
2
3
5
10  
0.02  
I ,
 
COLLECTOR CURRENT (A)  
C
I ,
 
COLLECTOR CURRENT (A)  
C
Figure 3. Turn
−
On Time  
Figure 4. Turn
−
Off Time  
3

MJD200 (NPN), MJD210 (PNP)  
NPN  
PNP  
MJD200  
MJD210  
400  
200  
400  
T =
 
150
°
C  
J
25
°
C  
T =
 
150
°
C  
J
200  
25
°
C  
-ꢀ55
°
C  
100  
80  
100  
80  
-ꢀ55
°
C  
60  
40  
60  
40  
V
V
= 1 V  
= 2 V  
V
V
= 1 V  
= 2 V  
CE  
CE  
CE  
CE  
20  
20  
0.05 0.07
 
0.1  
0.2 0.3  
0.5 0.7  
1
2
3
5
0.05 0.07 0.1  
0.2 0.3  
0.5 0.7  
1
2
3
5
I ,
 
COLLECTOR CURRENT (A)  
C
I ,
 
COLLECTOR CURRENT (A)  
C
Figure 5. DC Current Gain  
2
1.6  
1.2  
0.8  
0.4  
0
2
T =
 
25
°
C  
T =
 
25
°
C  
J
J
1.6  
1.2  
0.8  
V
@ I
 
/I =
 
10  
B
V
@ I
 
/I =
 
10  
BE(sat) C
 
B  
BE(sat)  
C
V
BE  
@ V
 
= 1 V  
CE  
V
BE  
@ V
 
= 1 V  
CE  
0.4  
0
V
@ I
 
/I =
 
10  
C B  
CE(sat)  
V
@ I
 
/I =
 
10  
B
CE(sat)  
C
0.05 0.07
 
0.1  
0.2 0.3  
0.5 0.7  
1
2
3
5
0.05 0.07
 
0.1  
0.2 0.3  
0.5 0.7  
1
2
3
5
I ,
 
COLLECTOR CURRENT (A)  
C
I ,
 
COLLECTOR CURRENT (A)  
C
Figure 6. “On” Voltage  
+ꢀ2.5  
+ꢀ2.5  
+ꢀ2  
+ꢀ2  
+ꢀ1.5  
+ꢀ1  
*APPLIES FOR I
 
/I
≤
h  
C B
 
FE/3  
*APPLIES FOR I
 
/I
≤
h  
FE/3  
C
B
+ꢀ1.5  
+ꢀ1  
25
°
C to 150
°
C  
-ꢀ55
°
C to 25
°
C  
+ꢀ0.5  
0
+ꢀ0.5  
25
°
C to 150
°
C  
q
for V  
CE(sat)  
*
q
for V  
VC  
VC  
CE(sat)  
0
-ꢀ55
°
C to 25
°
C  
25
°
C to 150
°
C  
-ꢀ0.5  
-ꢀ1  
-ꢀ0.5  
25
°
C to 150
°
C  
-ꢀ1  
q
for V  
BE  
-ꢀ55
°
C to 25
°
C  
VB  
-ꢀ1.5  
-ꢀ2  
-ꢀ1.5  
q
for V  
BE  
VB  
-ꢀ55
°
C to 25
°
C  
-ꢀ2  
-ꢀ2.5  
-ꢀ2.5  
0.05 0.07
 
0.1  
0.2 0.3  
0.5 0.7  
1
2
3
5
0.05 0.07
 
0.1  
0.2 0.3  
0.5 0.7  
1
2
3
5
I ,
 
COLLECTOR CURRENT (A)  
C
I ,
 
COLLECTOR CURRENT (A)  
C
Figure 7. Temperature Coefficients  
4

MJD200 (NPN), MJD210 (PNP)  
1
0.7  
0.5  
D = 0.5  
0.2  
0.1  
0.3  
0.2  
P
(pk)  
R
R
(t) = r(t)
q  
JC  
q
q
JC  
JC  
= 10
°
C/W MAX  
0.05  
0.1  
D CURVES APPLY FOR POWER  
PULSE TRAIN SHOWN  
READ TIME AT t  
0.07  
0.05  
t
1
0.02  
t
2
1
0.01  
T
– T
 
= P
 
q  
C (pk)
 
JC  
(t)  
J(pk)  
0.03  
0.02  
DUTY CYCLE, D = t
 
/t  
1
2
0 (SINGLE PULSE)  
0.01  
0.02  
0.05  
0.1  
0.2  
0.5  
1
2
5
10  
20  
50  
100  
200  
t, TIME (ms)  
Figure 8. Thermal Response  
10  
There are two limitations on the power handling ability of  
a transistor: average junction temperature and second  
5ꢂms  
5
3
2
breakdown. Safe operating area curves indicate I
 
−
V  
C
CE  
T =
 
150
°
C  
J
100ꢂ
m
s  
500ꢂ
m
s  
1ꢂms  
dc  
limits of the transistor that must be observed for reliable  
operation; i.e., the transistor must not be subjected to greater  
dissipation than the curves indicate.  
1
The data of Figure

= 150
°
C; T
 
is  
J(pk)  
C
BONDING WIRE LIMITED  
THERMALLY LIMITED @ T
 
= 25
°
C  
ꢁ(SINGLE PULSE)  
variable depending on conditions. Second breakdown pulse  
limits are valid for duty cycles to 10% provided T  
0.1  
C
J(pk)  
≤
150
°
C. T  
may be calculated from the data in Figure 8.  
J(pk)  
SECOND BREAKDOWN LIMITED  
ꢁCURVES APPLY BELOW  
ꢁRATED V  
At high case temperatures, thermal limitations will reduce  
the power that can be handled to values less than the  
limitations imposed by second breakdown.  
CEO  
0.01  
0.3  
1
2
3
5
7
10  
20 30  
V
CE  
, COLLECTOR
−
EMITTER VOLTAGE (V)  
Figure 9. Active Region Safe Operating Area  
200  
T =
 
25
°
C  
J
C
ib  
100  
70  
50  
C
ob  
MJD200 (NPN)  
MJD210 (PNP)  
30  
20  
0.4 0.6  
1
2
4
6
10  
20  
40  
V ,
 
REVERSE VOLTAGE (V)  
R
Figure 10. Capacitance  
5
 

MJD200 (NPN), MJD210 (PNP)  
ORDERING INFORMATION  
†
Device  
Package Type  
Shipping  
MJD200G  
DPAK  
75 Units / Rail  
1,800 /
T
a
pe & Reel  
2,500 /
T
a
pe & Reel  
75 Units / Rail  
(Pb
−
Free)  
MJD200RLG  
MJD200T4G  
MJD210G  
DPAK  
(Pb
−
Free)  
DPAK  
(Pb
−
Free)  
DPAK  
(Pb
−
Free)  
MJD210RLG  
MJD210T4G  
NJVMJD210T4G*  
DPAK  
1,800 /
T
a
pe & Reel  
2,500 /
T
a
pe & Reel  
2,500 /
T
a
pe & Reel  
(Pb
−
Free)  
DPAK  
(Pb
−
Free)  
DPAK  
(Pb
−
Free)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging  
Specifications Brochure, BRD8011/D.  
*NJV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC
−
Q101 Qualified and PPAP  
Capable  
6

MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
4
DPAK (SINGLE GAUGE)  
CASE 369C  
ISSUE G  
2
1
DATE 31 MAY 2023  
3
SCALE 1:1  
GENERIC  
MARKING DIAGRAM*  
XXXXXXG  
ALYWW  
AYWW  
XXX  
XXXXXG  
IC  
Discrete  
XXXXXX =
 
Device Code  
A
= Assembly Location  
L
= Wafer Lot  
STYLE 1:  
STYLE 2:  
PIN 1.
 
GATE  
2. DRAIN  
STYLE 3:  
STYLE 4:  
STYLE 5:  
Y
WW  
G
=
Y
e
ar  
= Work Week  
= Pb
−
Free Package  
PIN 1.
 
BASE  
PIN 1.
 
ANODE  
2. CATHODE  
3. ANODE  
PIN 1.
 
CATHODE  
2. ANODE  
3. GATE  
PIN 1.
 
GATE  
2. ANODE  
3. CATHODE  
4. ANODE  
2. COLLECTOR  
3. EMITTER  
3. SOURCE  
4. DRAIN  
4. COLLECTOR  
4. CATHODE  
4. ANODE  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
Pb
−
Free indicator, “G” or microdot “
G
”, may  
or may not be present. Some products may  
not follow the Generic Marking.  
STYLE 6:  
PIN 1.
 
MT1  
2. MT2  
STYLE 7:  
PIN 1.
 
GATE  
STYLE 8:  
PIN 1.
 
N/C  
STYLE 9:  
PIN 1.
 
ANODE  
2. CATHODE  
STYLE 10:  
PIN 1.
 
CATHODE  
2. ANODE  
2. COLLECTOR  
2. CATHODE  
3. GATE  
4. MT2  
3. EMITTER  
4. COLLECTOR  
3. ANODE  
4. CATHODE  
3. RESISTOR
 
ADJUST  
4. CATHODE  
3. CATHODE  
4. ANODE  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions
 
are uncontrolled
 
except when stamped
 
“CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON10527D  
DPAK (SINGLE GAUGE)  
PAGE 1 OF 1  
onsemi
and  
are trademarks of Semiconductor Components Industries, LLC dba
onsemi
or its subsidiaries in the United States and/or other countries.
onsemi
reserves  
the right to make changes without further notice to any products herein.
onsemi
makes no warranty, representation or guarantee regarding the suitability of its products for any particular  
purpose, nor does
onsemi
assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation  
special, consequential or incidental damages.
onsemi
does not convey any license under its patent rights nor the rights of others.  
©
Semiconductor Components Industries, LLC, 2018  

onsemi
,  
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “
onsemi
” or its affiliates  
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.
onsemi
reserves the right to make changes at any time to any  
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−
is” and
onsemi
makes no warranty, representation or guarantee regarding the accuracy of the  
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onsemi
assume any liability arising out of the application or use  
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provided by
onsemi
. “Typical” parameters which may be provided in
onsemi
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vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
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