onsemi-MJD41CT4G
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MJD41Cꢀ(NPN),
MJD42Cꢀ(PNP)
Complementary Power
Transistors
DPAK for Surface Mount Applications
Designed for general purpose amplifier and low speed switching
applications.
SILICON
POWER TRANSISTORS
6 AMPERES
Features
•
Lead Formed for Surface Mount Applications in Plastic Sleeves
(No Suffix)
100 VOLTS, 20 WATTS
•
Straight Lead
V
e
rsion in Plastic Sleeves (“1” Suffix)
•
Electrically Similar to Popular TIP41 and TIP42 Series
•
Epoxy Meets UL 94 V−0 @ 0.125 in
•
NJV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
COMPLEMENTARY
COLLECTOR
2, 4
COLLECTOR
2, 4
1
1
•
These Devices are Pb−Free and are RoHS Compliant
BASE
BASE
MAXIMUM RATINGS
3
3
EMITTER
EMITTER
Rating
Collector−Emitter Voltage
Collector−Base Voltage
Emitter−Base Voltage
Collector Current − Continuous
Collector Current − Peak
Base Current
Symbol
Max
100
100
5
Unit
Vdc
Vdc
Vdc
Adc
Adc
Adc
V
CEO
4
V
CB
V
EB
4
I
C
6
1
2
3
1
2
I
10
2
CM
3
I
B
DPAK
IPAK
CASE 369C
STYLE 1
CASE 369D
STYLE 1
T
o
tal Power Dissipation
P
P
W
W/
°
C
D
20
0.16
@ T
= 25
°
C
C
Derate above 25
°
C
MARKING DIAGRAMS
W
W/
°
C
°
C
D
1.75
0.014
@ T
= 25
°
C
A
Derate above 25
°
C
Operating and Storage Junction
T
e
mperature Range
T , T
J
−65 to +150
AYWW
J4xCG
AYWW
J4xCG
stg
ESD − Human Body Model
ESD − Machine Model
HBM
MM
3B
C
V
V
DPAK
IPAK
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. These
ratings are applicable when surface mounted on the minimum pad
sizes recommended.
A
Y
= Assembly Location
=
Y
e
ar
WW =
Work Week
J4xC =
Device Code
x = 1 or 2
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
©
Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
August, 2013 − Rev. 12
MJD41C/D
MJD41C (NPN), MJD42C (PNP)
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
6.25
71.4
Unit
°
C/W
°
C/W
Thermal Resistance, Junction−to−Case
R
R
q
JC
JA
q
2. These
ratings are applicable when surface mounted on the minimum pad sizes recommended.
ELECTRICAL CHARACTERISTICS
(T =
25
_
C unless otherwise noted)
C
Characteristic
Symbol
Min
Max
Unit
OFF CHARACTERISTICS
V
Vdc
m
Adc
m
Adc
mAdc
CEO(sus)
100
−
−
(I =
30 mAdc, I
= 0)
C
B
I
Collector Cutoff Current
(V =
60 Vdc, I
= 0)
CEO
50
10
0.5
CE
B
I
Collector Cutoff Current
(V =
100 Vdc, V
= 0)
CES
−
CE
EB
I
Emitter Cutoff Current
(V =
5 Vdc, I
= 0)
EBO
−
BE
C
h
FE
−
DC Current Gain
(I =
0.3 Adc, V
= 4 Vdc)
30
15
−
75
C
CE
(I =
3 Adc, V
= 4 Vdc)
C
CE
V
Vdc
Vdc
Collector−Emitter Saturation Voltage
(I =
6 Adc, I
= 600 mAdc)
CE(sat)
−
−
1.5
2
C
B
V
Base−Emitter On Voltage
(I =
6 Adc, V
= 4 Vdc)
BE(on)
C
CE
DYNAMIC CHARACTERISTICS
f
MHz
−
T
3
−
−
(I =
500 mAdc, V
= 10 Vdc, f
= 1 MHz)
test
C
CE
h
Small−Signal Current Gain
(I =
0.5 Adc, V
= 10 Vdc, f = 1 kHz)
fe
20
C
CE
3. Pulse
T
e
st: Pulse Width
≤
300
m
s, Duty Cycle
≤
2%.
4. f =
⎪
h
⎪•
f
.
test
T
fe
2
MJD41C (NPN), MJD42C (PNP)
TYPICAL CHARACTERISTICS
T
T
C
V
CC
+ꢀ30 V
A
2.5 25
R
C
2
20
25
m
s
SCOPE
+11 V
R
B
0
1.5 15
T
C
D
1
51
-ꢀ9 V
T SURFACE
MOUNT
A
1
10
t , t
≤
10 ns
r
f
DUTY CYCLE = 1%
-ꢀ4 V
0.5
0
5
0
R and
R VARIED
TO OBTAIN DESIRED CURRENT LEVELS
B
C
ꢃD MUST
BE FAST RECOVERY TYPE, e.g.:
1
ꢃꢃMSB5300 USED ABOVE I
≈
100 mA
B
ꢃꢃMSD6100 USED BELOW I
≈
100 mA
B
REVERSE ALL POLARITIES FOR PN
P
.
25
50
75
100
125
150
T, TEMPERATURE (
°
C)
Figure 1. Power Derating
Figure 2. Switching Time Test Circuit
2
1
500
T =
25
°
C
J
300
200
V
CE
= 2 V
V
CC
I /I
= 10
= 30 V
T =
150
°
C
J
C B
0.7
0.5
100
70
25
°
C
0.3
0.2
t
r
50
30
20
0.1
-ꢀ55
°
C
0.07
t @
V
d
≈
5 V
BE(off)
0.05
10
7
0.03
0.02
5
0.06
0.2 0.3
0.4 0.6
1
2
4
6
0.06
0.2
0.4 0.6
1
2
4
6
0.1
0.1
I ,
COLLECTOR CURRENT (AMP)
C
I ,
COLLECTOR CURRENT (AMP)
C
Figure 3. DC Current Gain
Figure 4. Turn−On Time
5
2
1.6
1.2
0.8
0.4
0
T =
25
°
C
J
T =
25
°
C
3
2
J
V
CC
I /I
= 10
= 30 V
C B
t
s
I =
I
B1 B2
1
0.7
0.5
V
@ I
/I =
10
C B
CE(sat)
0.3
0.2
V
BE
@ V
= 4 V
CE
t
f
0.1
0.07
0.05
V
@ I
/I =
10
C B
BE(sat)
0.06
0.2 0.3
0.4 0.6
1
2
3
4
6
0.06
0.2
0.4 0.6
1
2
4
6
0.1
0.1
I ,
COLLECTOR CURRENT (AMP)
C
I ,
COLLECTOR CURRENT (AMP)
C
Figure 5. “On” Voltages
Figure 6. Turn−Off Time
3
MJD41C (NPN), MJD42C (PNP)
2
300
T =
25
°
C
J
T =
25
°
C
J
200
1.6
I =
1 A
C
2.5 A
5 A
C
C
ib
1.2
0.8
0.4
0
100
70
ob
50
30
0.5
1
2
3
5
10
20 30
50
10
20 30
50
100
200 300
500
1000
V ,
REVERSE VOLTAGE (VOLTS)
R
I ,
BASE CURRENT (mA)
B
Figure 8. Capacitance
Figure 7. Collector Saturation Region
1
0.7
D = 0.5
0.5
0.3
0.2
0.2
P
(pk)
R
R
= r(t) R
q
JC
q
q
JC(t)
0.1
= 6.25
°
C/W MAX
JC
0.1
0.07
0.05
0.05
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
t
1
0.02
t
2
1
T
– T
= P
q
C (pk)
JC(t)
J(pk)
0.03
0.02
DUTY CYCLE, D = t
/t
0.01
1 2
SINGLE PULSE
0.01
0.01
0.02 0.03
0.05
0.1
0.2 0.3
0.5
1
2
3
5
10
20 30
50
100
200 300
500
1000
t, TIME (ms)
Figure 9. Thermal Response
10
5
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
100ꢂ
m
s
500ꢂ
m
s
3
2
breakdown. Safe operating area curves indicate I
− V
C
CE
1ꢂms
dc
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
5ꢂms
1
0.5
0.3
WIRE BOND LIMIT
THERMAL LIMIT
The data of Figure 10 is
based on T
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided
= 150
_
C; T
is
J(pk)
C
SECOND BREAKDOWN LIMIT
CURVES APPLY BELOW RATED V
CEO
0.1
0.05
0.03
T
v
150
_
C. T
may be calculated from the data in
J(pk)
J(pk)
T =
25
°
C SINGLE PULSE
T =
150
°
C
J
C
Figure 9.
At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the
limitations imposed by second breakdown.
MJD41C, 42C
0.01
1
2
3
5
7
10
20 30
50 70
100
V
CE
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 10. Maximum Forward Bias
Safe Operating Area
4
MJD41C (NPN), MJD42C (PNP)
ORDERING INFORMATION
Device
†
Package Type
Package
Shipping
MJD41CRLG
DPAK
(Pb−Free)
369C
1,800 /
T
a
pe & Reel
2,500 /
T
a
pe & Reel
2,500 /
T
a
pe & Reel
75 Units / Rail
MJD41CT4G
DPAK
(Pb−Free)
369C
369C
369C
369D
369C
369C
369C
369C
NJVMJD41CT4G*
MJD42CG
DPAK
(Pb−Free)
DPAK
(Pb−Free)
MJD42C1G
IPAK
(Pb−Free)
75 Units / Rail
MJD42CRLG
NJVMJD42CRLG*
MJD42CT4G
DPAK
(Pb−Free)
1,800 /
T
a
pe & Reel
1,800 /
T
a
pe & Reel
2,500 /
T
a
pe & Reel
2,500 /
T
a
pe & Reel
DPAK
(Pb−Free)
DPAK
(Pb−Free)
NJVMJD42CT4G*
DPAK
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
*NJV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP
Capable
5
MJD41C (NPN), MJD42C (PNP)
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C
ISSUE D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BOD
Y
.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
C
A
D
A
E
c2
b3
B
4
2
L3
L4
Z
H
DETAIL A
1
3
INCHES
DIM MIN
MAX
0.086 0.094
A1
0.000 0.005
0.025 0.035
MILLIMETERS
MIN
2.18
0.00
0.63
0.76
4.57
0.46
0.46
5.97
6.35
MAX
2.38
0.13
0.89
1.14
5.46
0.61
0.61
6.22
6.73
A
b2
c
b
b
b2
0.030 0.045
b3
0.180 0.215
M
0.005 (0.13)
C
H
e
c
0.018 0.024
c2
0.018 0.024
GAUGE
SEATING
PLANE
L2
PLANE
C
D
E
e
0.235 0.245
0.250 0.265
0.090 BSC
2.29 BSC
9.40 10.41
1.40 1.78
2.74 REF
0.51 BSC
0.89 1.27
H
L
L1
L2
0.370 0.410
0.055 0.070
0.108 REF
L
A1
L1
0.020 BSC
DETAIL A
ROTATED 9
0
5
CW
L3
0.035 0.050
L4
Z
−−− 0.040
0.155 −−−
−−−
3.93
1.01
−−−
STYLE 1:
PIN 1.
BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
SOLDERING FOOTPRINT*
6.20
0.244
3.00
0.118
2.58
0.102
5.80
0.228
1.60
0.063
6.17
0.243
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
6
MJD41C (NPN), MJD42C (PNP)
PACKAGE DIMENSIONS
IPAK
CASE 369D
ISSUE C
C
B
R
NOTES:
1. DIMENSIONING
AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING
DIMENSION: INCH.
V
S
E
INCHES
DIM MIN
MAX
MILLIMETERS
4
2
MIN
5.97
6.35
2.19
0.69
0.46
0.94
MAX
6.35
6.73
2.38
0.88
0.58
1.14
Z
A
B
C
D
E
F
G
H
J
K
R
S
V
Z
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
A
K
1
3
−T−
SEATING
PLANE
2.29 BSC
0.87
0.46
8.89
4.45
0.63
0.89
3.93
1.01
0.58
9.65
5.45
1.01
1.27
−−−
J
F
H
0.155
−−−
D
3 PL
STYLE 1:
PIN 1.
BASE
G
M
T
0.13 (0.005)
2. COLLECTOR
3. EMITTER
4. COLLECTOR
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).
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limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time.
All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
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does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for
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:
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o
ll Free
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MJD41C/D
