onsemi-MJD42C1G
| Part # | onsemi-MJD42C1G |
Download  | onsemi-MJD42C1G |
MJD41Cꢀ(NPN),
MJD42Cꢀ(PNP)
Complementary Power
Transistors
DPAK for Surface Mount Applications
Designed for general purpose amplifier and low speed switching
applications.
SILICON
POWER TRANSISTORS
6 AMPERES
Features
•
Lead Formed for Surface Mount Applications in Plastic Sleeves
(No Suffix)
100 VOLTS, 20 WATTS
•
Straight Lead
V
e
rsion in Plastic Sleeves (“1” Suffix)
•
Electrically Similar to Popular TIP41 and TIP42 Series
•
Epoxy Meets UL 94 V−0 @ 0.125 in
•
NJV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
COMPLEMENTARY
COLLECTOR
2, 4
COLLECTOR
2, 4
1
1
•
These Devices are Pb−Free and are RoHS Compliant
BASE
BASE
MAXIMUM RATINGS
3
3
EMITTER
EMITTER
Rating
Collector−Emitter Voltage
Collector−Base Voltage
Emitter−Base Voltage
Collector Current − Continuous
Collector Current − Peak
Base Current
Symbol
Max
100
100
5
Unit
Vdc
Vdc
Vdc
Adc
Adc
Adc
V
CEO
4
V
CB
EB
V
4
I
C
6
1
2
3
1
2
I
10
2
CM
3
I
B
DPAK
IPAK
CASE 369C
STYLE 1
CASE 369D
STYLE 1
T
o
tal Power Dissipation
P
P
W
W/
°
C
D
20
0.16
@ T
= 25
°
C
C
Derate above 25
°
C
MARKING DIAGRAMS
W
W/
°
C
°
C
D
1.75
0.014
@ T
= 25
°
C
A
Derate above 25
°
C
Operating and Storage Junction
T
e
mperature Range
T , T
J
−65 to +150
AYWW
J4xCG
AYWW
J4xCG
stg
ESD − Human Body Model
ESD − Machine Model
HBM
MM
3B
C
V
V
DPAK
IPAK
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. These
ratings are applicable when surface mounted on the minimum pad
sizes recommended.
A
Y
= Assembly Location
=
Y
e
ar
WW =
Work Week
J4xC =
Device Code
x = 1 or 2
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
©
Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
July, 2016 − Rev. 13
MJD41C/D
MJD41C (NPN), MJD42C (PNP)
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
6.25
71.4
Unit
°
C/W
°
C/W
Thermal Resistance, Junction−to−Case
R
R
q
JC
JA
q
2. These
ratings are applicable when surface mounted on the minimum pad sizes recommended.
ELECTRICAL CHARACTERISTICS
(T =
25
_
C unless otherwise noted)
C
Characteristic
Symbol
Min
Max
Unit
OFF CHARACTERISTICS
V
Vdc
m
Adc
m
Adc
mAdc
CEO(sus)
100
−
−
(I =
30 mAdc, I
= 0)
C
B
I
Collector Cutoff Current
(V =
60 Vdc, I
= 0)
CEO
50
10
0.5
CE
B
I
Collector Cutoff Current
(V =
100 Vdc, V
= 0)
CES
−
CE
EB
I
Emitter Cutoff Current
(V =
5 Vdc, I
= 0)
EBO
−
BE
C
h
FE
−
DC Current Gain
(I =
0.3 Adc, V
= 4 Vdc)
30
15
−
75
C
CE
(I =
3 Adc, V
= 4 Vdc)
C
CE
V
Vdc
Vdc
Collector−Emitter Saturation Voltage
(I =
6 Adc, I
= 600 mAdc)
CE(sat)
−
−
1.5
2
C
B
V
Base−Emitter On Voltage
(I =
6 Adc, V
= 4 Vdc)
BE(on)
C
CE
DYNAMIC CHARACTERISTICS
f
MHz
−
T
3
−
−
(I =
500 mAdc, V
= 10 Vdc, f
= 1 MHz)
test
C
CE
h
Small−Signal Current Gain
(I =
0.5 Adc, V
= 10 Vdc, f = 1 kHz)
fe
20
C
CE
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse
T
e
st: Pulse Width
≤
300
m
s, Duty Cycle
≤
2%.
4. f =
⎪
h
⎪•
f .
test
T
fe
2
MJD41C (NPN), MJD42C (PNP)
TYPICAL CHARACTERISTICS
T
T
C
V
CC
+ꢀ30 V
A
2.5 25
R
C
2
20
25
m
s
SCOPE
+11 V
R
B
0
1.5 15
T
C
D
1
51
-ꢀ9 V
T SURFACE
MOUNT
A
1
10
t , t
≤
10 ns
r
f
DUTY CYCLE = 1%
-ꢀ4 V
0.5
0
5
0
R and
R VARIED
TO OBTAIN DESIRED CURRENT LEVELS
ꢃD MUST
BE FAST RECOVERY TYPE, e.g.:
B
C
1
ꢃꢃMSB5300 USED ABOVE I
≈
100 mA
B
ꢃꢃMSD6100 USED BELOW I
≈
100 mA
B
REVERSE ALL POLARITIES FOR PN
P
.
25
50
75
100
125
150
T, TEMPERATURE (
°
C)
Figure 1. Power Derating
Figure 2. Switching Time Test Circuit
2
1
500
T =
25
°
C
J
300
200
V
CE
= 2 V
V
CC
I /I
= 10
= 30 V
T =
150
°
C
J
C B
0.7
0.5
100
70
25
°
C
0.3
0.2
t
r
50
30
20
0.1
-ꢀ55
°
C
0.07
t @
V
d
≈
5 V
BE(off)
0.05
10
7
0.03
0.02
5
0.06
0.2 0.3
0.4 0.6
1
2
4
6
0.06
0.2
0.4 0.6
1
2
4
6
0.1
0.1
I ,
COLLECTOR CURRENT (AMP)
C
I ,
COLLECTOR CURRENT (AMP)
C
Figure 3. DC Current Gain
Figure 4. Turn−On Time
1.4
1.4
I /I
= 10
V
CE
= 4 V
C
B
1.2
1.0
1.2
1.0
0.8
0.6
0.4
−55
°
C
−55
°
C
−40
°
C
25
°
C
0.8
0.6
0.4
−40
°
C
25
°
C
80
°
C
80
°
C
T =
150
°
C
A
T =
150
°
C
A
0.2
0
0.2
0
0.01
0.1
1
10
0.01
0.1
1
10
I ,
COLLECTOR CURRENT (A)
C
I ,
COLLECTOR CURRENT (A)
C
Figure 5. Base Emitter Voltage vs. Collector
Current
Figure 6. Base Emitter Saturation Voltage vs.
Collector Current
3
MJD41C (NPN), MJD42C (PNP)
TYPICAL CHARACTERISTICS
5
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
T =
150
°
C
A
T =
25
°
C
J
I /I
= 10
3
C
B
V
CC
I /I
= 10
= 30 V
80
°
C
2
C B
t
s
I =
I
B1 B2
25
°
C
1
0.7
0.5
0.3
0.2
t
f
0.1
−40
°
C
and −55
°
C
0.1
0
0.07
0.05
0.06
0.2
0.4 0.6
1
2
4
6
0.01
0.1
1
10
0.1
I ,
COLLECTOR CURRENT (AMP)
C
I ,
COLLECTOR CURRENT (A)
C
Figure 7. Collector Emitter Saturation Voltage
vs. Collector Current
Figure 8. Turn−Off Time
2
300
T =
25
°
C
J
T =
25
°
C
J
200
1.6
1.2
0.8
0.4
0
I
C
= 1 A
2.5 A
5 A
C
C
ib
100
70
ob
50
30
0.5
1
2
3
5
10
20 30
50
10
20 30
50
100
200 300
500
1000
V ,
REVERSE VOLTAGE (VOLTS)
R
I ,
BASE CURRENT (mA)
B
Figure 10. Capacitance
Figure 9. Collector Saturation Region
1
0.7
D = 0.5
0.2
0.5
0.3
0.2
P
(pk)
R
R
= r(t) R
q
JC
q
q
JC(t)
0.1
= 6.25
°
C/W MAX
JC
0.1
0.07
0.05
0.05
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
t
1
0.02
t
2
1
T
– T
= P
q
C (pk)
JC(t)
J(pk)
0.03
0.02
DUTY CYCLE, D = t
/t
0.01
1 2
SINGLE PULSE
0.01
0.01
0.02 0.03
0.05
0.1
0.2 0.3
0.5
1
2
3
5
10
20 30
50
100
200 300
500
1000
t, TIME (ms)
Figure 11. Thermal Response
4
MJD41C (NPN), MJD42C (PNP)
10
5
3
2
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I
− V
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
100ꢂ
m
s
500ꢂ
m
s
C
CE
1ꢂms
dc
5ꢂms
1
0.5
0.3
WIRE BOND LIMIT
THERMAL LIMIT
SECOND BREAKDOWN LIMIT
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided
= 150
_
C; T
is
J(pk)
C
CURVES APPLY BELOW RATED V
CEO
0.1
0.05
0.03
T
v
150
_
C. T
may be calculated from the data in
J(pk)
J(pk)
T
= 25
°
C SINGLE PULSE
C
will reduce the power that can be handled to values less than
the limitations imposed by second breakdown.
T =
150
°
C
J
MJD41C, 42C
0.01
1
2
3
5
7
10
20 30
50 70
100
V
CE
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 12. Maximum Forward Bias
Safe Operating Area
ORDERING INFORMATION
Device
†
Package Type
Package
Shipping
MJD41CRLG
DPAK
(Pb−Free)
369C
1,800 /
T
a
pe & Reel
MJD41CT4G
DPAK
(Pb−Free)
369C
369C
369C
369D
369C
369C
369C
369C
2,500 /
T
a
pe & Reel
2,500 /
T
a
pe & Reel
75 Units / Rail
NJVMJD41CT4G*
MJD42CG
DPAK
(Pb−Free)
DPAK
(Pb−Free)
MJD42C1G
IPAK
(Pb−Free)
75 Units / Rail
MJD42CRLG
NJVMJD42CRLG*
MJD42CT4G
DPAK
(Pb−Free)
1,800 /
T
a
pe & Reel
1,800 /
T
a
pe & Reel
2,500 /
T
a
pe & Reel
2,500 /
T
a
pe & Reel
DPAK
(Pb−Free)
DPAK
(Pb−Free)
NJVMJD42CT4G*
DPAK
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
*NJV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP
Capable
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
IPAK
CASE 369D
−
01
ISSUE C
DATE 15 DEC 2010
C
B
NOTES:
SCALE 1:1
1. DIMENSIONING
AND TOLERANCING PER
ANSI Y14.5M, 1982.
V
E
R
2. CONTROLLING
DIMENSION: INCH.
INCHES
DIM MIN
MAX
MILLIMETERS
4
MIN
5.97
6.35
2.19
0.69
0.46
0.94
MAX
6.35
6.73
2.38
0.88
0.58
1.14
Z
A
B
C
D
E
F
G
H
J
K
R
S
V
Z
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
A
S
1
2
3
−
T
−
SEATING
PLANE
2.29 BSC
K
0.87
0.46
8.89
4.45
0.63
0.89
3.93
1.01
0.58
9.65
5.45
1.01
1.27
−−−
J
F
H
0.155
−−−
D
3 PL
G
M
T
0.13 (0.005)
MARKING
DIAGRAMS
STYLE 1:
PIN 1.
BASE
STYLE 2:
STYLE 3:
PIN 1.
ANODE
STYLE 4:
PIN 1.
CATHODE
2. ANODE
Integrated
Circuits
PIN 1.
GATE
2. DRAIN
3. SOURCE
4. DRAIN
2. COLLECTOR
3. EMITTER
4. COLLECTOR
2. CATHODE
3. ANODE
4. CATHODE
Discrete
3. GATE
4. ANODE
xxxxx
ALYWW
x
YWW
xxxxxxxx
STYLE 5:
PIN 1.
GATE
2. ANODE
STYLE 6:
PIN 1.
MT1
2. MT2
STYLE 7:
PIN 1.
GATE
2. COLLECTOR
3. CATHODE
4. ANODE
3. GATE
4. MT2
3. EMITTER
4. COLLECTOR
xxxxxxxxx =
Device Code
A
= Assembly Location
lL
Y
= Wafer Lot
=
Y
e
ar
WW
= Work Week
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON10528D
IPAK (DPAK INSERTION MOUNT)
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C
4
ISSUE F
2
1
DATE 21 JUL 2015
3
SCALE 1:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
A
D
E
C
A
b3
B
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BOD
Y
.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
c2
4
2
L3
Z
DETAIL A
H
1
3
7. OPTIONAL MOLD FEATURE.
INCHES
DIM MIN
MAX
0.086 0.094
A1
0.000 0.005
0.025 0.035
b2
0.028 0.045
b3
0.180 0.215
MILLIMETERS
L4
b2
e
NOTE 7
MIN
2.18
0.00
0.63
0.72
4.57
0.46
0.46
5.97
6.35
MAX
2.38
0.13
0.89
1.14
5.46
0.61
0.61
6.22
6.73
c
BOTTOM VIEW
A
SIDE VIEW
b
b
M
0.005 (0.13)
C
TOP VIEW
c
0.018 0.024
c2
0.018 0.024
Z
Z
D
E
e
0.235 0.245
0.250 0.265
0.090 BSC
H
2.29 BSC
9.40 10.41
1.40 1.78
2.90 REF
0.51 BSC
0.89 1.27
GAUGE
SEATING
PLANE
H
L
L1
L2
0.370 0.410
0.055 0.070
0.114 REF
L2
PLANE
C
0.020 BSC
L3
0.035 0.050
L
BOTTOM VIEW
A1
L4
Z
−−−
0.040
0.155
−−−
−−−
3.93
1.01
−−−
L1
ALTERNATE
CONSTRUCTIONS
DETAIL A
ROTATED 9
0
5
CW
GENERIC
MARKING DIAGRAM*
STYLE 1:
PIN 1.
BASE
STYLE 2:
PIN 1.
GATE
2. DRAIN
STYLE 3:
PIN 1.
ANODE
STYLE 4:
STYLE 5:
PIN 1.
GATE
PIN 1.
CATHODE
2. ANODE
2. COLLECTOR
2. CATHODE
3. ANODE
4. CATHODE
2. ANODE
3. CATHODE
4. ANODE
3. EMITTER
3. SOURCE
4. DRAIN
3. GATE
XXXXXXG
ALYWW
AYWW
XXX
4. COLLECTOR
4. ANODE
STYLE 6:
PIN 1.
MT1
2. MT2
STYLE 7:
STYLE 8:
PIN 1.
N/C
STYLE 9:
PIN 1.
ANODE
2. CATHODE
STYLE 10:
PIN 1.
CATHODE
2. ANODE
XXXXXG
PIN 1.
GATE
2. COLLECTOR
2. CATHODE
3. GATE
4. MT2
3. EMITTER
3. ANODE
4. CATHODE
3. RESISTOR
ADJUST
4. CATHODE
3. CATHODE
4. ANODE
4. COLLECTOR
IC
Discrete
SOLDERING FOOTPRINT*
XXXXXX =
Device Code
A
L
Y
WW
G
= Assembly Location
= Wafer Lot
=
Y
e
ar
= Work Week
= Pb
−
Free Package
6.20
0.244
3.00
0.118
2.58
0.102
5.80
0.228
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”, may
or may not be present. Some products may
not follow the Generic Marking.
1.60
0.063
6.17
0.243
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON10527D
DPAK (SINGLE GAUGE)
PAGE 1 OF 1
onsemi
and
are trademarks of Semiconductor Components Industries, LLC dba
onsemi
or its subsidiaries in the United States and/or other countries.
onsemi
reserves
the right to make changes without further notice to any products herein.
onsemi
makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does
onsemi
assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages.
onsemi
does not convey any license under its patent rights nor the rights of others.
©
Semiconductor Components Industries, LLC, 2018
onsemi
,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “
onsemi
” or its affiliates
and/or subsidiaries in the United States and/or other countries.
onsemi
owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of
onsemi
’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
.
onsemi
reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as
−
is” and
onsemi
makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does
onsemi
assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using
onsemi
products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by
onsemi
. “Typical” parameters which may be provided in
onsemi
data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
onsemi
does not convey any license
under any of its intellectual property rights nor the rights of others.
onsemi
products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use
onsemi
products for any such unintended or unauthorized application, Buyer shall indemnify and hold
onsemi
and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that
onsemi
was negligent regarding the design or manufacture of the part.
onsemi
is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMEN
T
:
TECHNICAL SUPPORT
North American Technical Support:
Voice Mail: 1 800
−
282
−
9855
T
o
ll Free USA/Canada
Phone: 011 421 33 790 2910
Europe, Middle East and Africa Technical Support:
Phone: 00421 33 790 2910
For additional information, please contact your local Sales Representative
◊
