onsemi-MJD50T4G
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MJD47, NJVMJD47T4G,
MJD50, NJVMJD50T4G
High Voltage Power
Transistors
DPAK for Surface Mount Applications
Designed for line operated audio output amplifier, switchmode supply
drivers and other switching applications.
NPN SILICON POWER
TRANSISTORS
Features
•
Lead Formed for Surface Mount Applications in Plastic Sleeves
(No Suffix)
1 AMPERE
250, 400 VOLTS, 15 WATTS
•
Electrically Similar to Popular TIP47, and TIP50
•
Epoxy Meets UL 94 V−0 @ 0.125 in
•
NJV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
COLLECTOR
2, 4
•
These Devices are Pb−Free and are RoHS Compliant
1
BASE
MAXIMUM RATINGS
Rating
Symbol
Max
Unit
3
Collector−Emitter Voltage
MJD47, NJVMJD47T4G
MJD50, NJVMJD50T4G
V
Vdc
EMITTER
CEO
250
400
4
Collector−Base Voltage
MJD47, NJVMJD47T4G
MJD50, NJVMJD50T4G
V
V
Vdc
CB
350
500
1
2
3
Emitter−Base Voltage
Collector Current − Continuous
Collector Current − Peak
Base Current
5
1
Vdc
Adc
Adc
Adc
EB
DPAK
CASE 369C
STYLE 1
I
C
I
2
CM
I
B
0.6
T
o
tal Power Dissipation
P
D
D
MARKING DIAGRAM
@ T
= 25
°
C
15
0.12
W
W/
°
C
C
Derate above 25
°
C
AYWW
JxxG
P
@ T
= 25
°
C
1.56
0.0125
W
W/
°
C
A
Derate above 25
°
C
Operating and Storage Junction
T
e
mperature Range
T , T
−65 to +150
°
C
J
stg
A
Y
= Assembly Location
=
Y
e
ar
ESD − Human Body Model
ESD − Machine Model
HBM
MM
3B
C
V
V
WW =
Work Week
Jxx =
Device Code
xx = 47 or 50
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. These
ratings are applicable when surface mounted on the minimum pad
sizes recommended.
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
©
Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
August, 2014 − Rev. 15
MJD47/D
MJD47, NJVMJD47T4G, MJD50, NJVMJD50T4G
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
8.33
80
Unit
°
C/W
°
C/W
°
C
Thermal Resistance Junction−to−Case
R
q
JC
q
JA
L
Lead
T
e
mperature for Soldering Purpose
R
T
260
2. These
ratings are applicable when surface mounted on the minimum pad sizes recommended.
ELECTRICAL CHARACTERISTICS
(T =
25
_
C unless otherwise noted)
C
Characteristic
Symbol
Min
Max
Unit
OFF CHARACTERISTICS
V
Vdc
CEO(sus)
(I =
30 mAdc, I
= 0)
MJD47, NJVMJD47T4G
MJD50, NJVMJD50T4G
C
B
250
400
−
−
Collector Cutoff Current
I
mAdc
mAdc
CEO
(V =
150 Vdc, I
= 0)
CE
B
MJD47, NJVMJD47T4G
(V =
300 Vdc, I
= 0)
−
−
0.2
0.2
CE
B
MJD50, NJVMJD50T4G
Collector Cutoff Current
I
CES
(V =
350 Vdc, V
= 0)
CE
BE
MJD47, NJVMJD47T4G
(V =
500 Vdc, V
= 0)
−
−
0.1
0.1
CE
BE
MJD50, NJVMJD50T4G
Emitter Cutoff Current
I
mAdc
−
EBO
(V =
5 Vdc, I
= 0)
−
1
BE
C
DC Current Gain
h
FE
(I =
0.3 Adc, V
= 10 Vdc)
C
CE
30
10
150
−
(I =
1 Adc, V
= 10 Vdc)
C
CE
Collector−Emitter Saturation Voltage
(I =
1 Adc, I
= 0.2 Adc)
V
Vdc
Vdc
CE(sat)
−
−
1
C
B
Base−Emitter On Voltage
(I =
1 Adc, V
= 10 Vdc)
V
BE(on)
1.5
C
CE
DYNAMIC CHARACTERISTICS
Current Gain − Bandwidth Product
f
MHz
−
T
(I =
0.2 Adc, V
= 10 Vdc, f = 2 MHz)
10
25
−
−
C
CE
Small−Signal Current Gain
(I =
0.2 Adc, V
= 10 Vdc, f = 1 kHz)
h
fe
C
CE
3. Pulse
T
e
st: Pulse Width
≤
300
m
s, Duty Cycle
≤
2%.
2
MJD47, NJVMJD47T4G, MJD50, NJVMJD50T4G
TYPICAL CHARACTERISTICS
T
A
T
C
V
CC
2.5 25
TURN-ON PULSE
APPROX
+11 V
R
C
SCOPE
V
in
2
20
R
B
V
in
0
51
V
EB(off)
1.5 15
t
1
T (SURFACE
MOUNT)
A
t
3
-ꢀ4 V
C
<< C
eb
jd
T
C
1
0.5
0
10
5
APPROX
+11 V
t
≤
7 ns
1
10 < t
< 500
m
s
2
t <
15 ns
V
in
3
DUTY CYCLE
≈
2%
APPROX -ꢀ9 V
0
t
2
25
50
75
100
125
150
R
and R
VARIED TO OBTAIN
C
DESIRED CURRENT LEVELS.
B
TURN-OFF PULSE
T, TEMPERATURE (
°
C)
Figure 1. Power Derating
Figure 2. Switching Time Equivalent Circuit
1.4
1.2
200
V
CE
= 10 V
100
T =
150
°
C
J
60
40
1
0.8
0.6
0.4
0.2
0
25
°
C
V
@ I
/I =
5
BE(sat) C
B
20
10
V
BE(on)
@ V
= 4 V
CE
-ꢀ55
°
C
T =
25
°
C
J
6
4
V
@ I
/I =
5
C B
CE(sat)
2
0.02
0.06 0.1
0.2
0.4 0.6
1
2
0.02
0.06
0.04
0.1
0.2
0.4 0.6
1
2
0.04
I ,
COLLECTOR CURRENT (AMPS)
C
I ,
COLLECTOR CURRENT (AMPS)
C
Figure 3. DC Current Gain
Figure 4. “On” Voltages
1
0.7
0.5
D = 0.5
0.3
0.2
0.2
0.1
0.05
P
(pk)
R
= r(t) R
q
JC
q
q
JC(t)
0.1
0.07
0.05
R
= 8.33
°
C/W MAX
JC
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
0.02
t
0.01
1
t
2
1
0.03
0.02
SINGLE PULSE
T
– T
= P
q
C (pk)
JC(t)
J(pk)
DUTY CYCLE, D = t
/t
1 2
0.01
0.01 0.02
0.03 0.05
0.1
0.2 0.3
0.5
1
2
3
5
10
20 30
50
100
200 300
500
1 k
t, TIME (ms)
Figure 5. Thermal Response
3
MJD47, NJVMJD47T4G, MJD50, NJVMJD50T4G
5
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I
− V
2
1
100ꢁ
m
s
1ꢁms
500ꢁ
m
s
C
CE
0.5
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
dc
T
≤
25
°
C
C
0.2
0.1
SECOND BREAKDOWN LIMIT
THERMAL LIMIT @ 25
°
C
WIRE BOND LIMIT
The data of Figure 6 is
based on T
variable depending on conditions. Second breakdown pulse
= 150
_
C; T
is
J(pk)
C
0.05
limits are valid for duty cycles to 10% provided T
J(pk)
MJD47
MJD50
0.02
0.01
CURVES APPLY BELOW
RATED V
≤
150
_
C.
T
may be calculated from the data in
J(pk)
CEO
Figure 5.
At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the
limitations imposed by second breakdown.
0.005
5
10
20
50
100
200 300
500
V
CE
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 6. Active Region Safe Operating Area
5
1
T =
25
°
C
J
t
s
0.5
V
CC
I /I
= 5
= 200 V
2
1
C B
t
r
0.2
0.1
T =
25
°
C
J
V
CC
I /I
= 5
= 200 V
t
0.5
d
C B
0.05
t
f
0.2
0.1
0.02
0.01
0.05
0.02
0.1
0.2
0.5
1
2
0.02
0.1
0.2
0.5
1
2
0.05
0.05
I ,
COLLECTOR CURRENT (AMPS)
C
I ,
COLLECTOR CURRENT (AMPS)
C
Figure 7. Turn−On Time
Figure 8. Turn-Off Time
4
MJD47, NJVMJD47T4G, MJD50, NJVMJD50T4G
ORDERING INFORMATION
†
Device
Package
Shipping
MJD47G
369C
(Pb−Free)
75 Units / Rail
MJD47T4G
369C
(Pb−Free)
2,500 /
T
a
pe & Reel
2,500 /
T
a
pe & Reel
75 Units / Rail
NJVMJD47T4G*
MJD50G
369C
(Pb−Free)
369C
(Pb−Free)
MJD50T4G
369C
(Pb−Free)
2,500 /
T
a
pe & Reel
2,500 /
T
a
pe & Reel
NJVMJD50T4G*
369C
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specification Brochure, BRD8011/D.
*NJV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP
Capable.
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C
4
ISSUE F
2
1
DATE 21 JUL 2015
3
SCALE 1:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
A
D
E
C
A
b3
B
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BOD
Y
.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
c2
4
2
L3
Z
DETAIL A
H
1
3
7. OPTIONAL MOLD FEATURE.
INCHES
DIM MIN
MAX
0.086 0.094
A1
0.000 0.005
0.025 0.035
b2
0.028 0.045
b3
0.180 0.215
MILLIMETERS
L4
b2
e
NOTE 7
MIN
2.18
0.00
0.63
0.72
4.57
0.46
0.46
5.97
6.35
MAX
2.38
0.13
0.89
1.14
5.46
0.61
0.61
6.22
6.73
c
BOTTOM VIEW
A
SIDE VIEW
b
b
M
0.005 (0.13)
C
TOP VIEW
c
0.018 0.024
c2
0.018 0.024
Z
Z
D
E
e
0.235 0.245
0.250 0.265
0.090 BSC
H
2.29 BSC
9.40 10.41
1.40 1.78
2.90 REF
0.51 BSC
0.89 1.27
GAUGE
SEATING
PLANE
H
L
L1
L2
0.370 0.410
0.055 0.070
0.114 REF
L2
PLANE
C
0.020 BSC
L3
0.035 0.050
L
BOTTOM VIEW
A1
L4
Z
−−−
0.040
0.155
−−−
−−−
3.93
1.01
−−−
L1
ALTERNATE
CONSTRUCTIONS
DETAIL A
ROTATED 9
0
5
CW
GENERIC
MARKING DIAGRAM*
STYLE 1:
PIN 1.
BASE
STYLE 2:
PIN 1.
GATE
2. DRAIN
STYLE 3:
PIN 1.
ANODE
STYLE 4:
STYLE 5:
PIN 1.
GATE
PIN 1.
CATHODE
2. ANODE
2. COLLECTOR
2. CATHODE
3. ANODE
4. CATHODE
2. ANODE
3. CATHODE
4. ANODE
3. EMITTER
3. SOURCE
4. DRAIN
3. GATE
XXXXXXG
ALYWW
AYWW
XXX
4. COLLECTOR
4. ANODE
STYLE 6:
PIN 1.
MT1
2. MT2
STYLE 7:
STYLE 8:
PIN 1.
N/C
STYLE 9:
PIN 1.
ANODE
2. CATHODE
STYLE 10:
PIN 1.
CATHODE
2. ANODE
XXXXXG
PIN 1.
GATE
2. COLLECTOR
2. CATHODE
3. GATE
4. MT2
3. EMITTER
3. ANODE
4. CATHODE
3. RESISTOR
ADJUST
4. CATHODE
3. CATHODE
4. ANODE
4. COLLECTOR
IC
Discrete
SOLDERING FOOTPRINT*
XXXXXX =
Device Code
A
L
Y
WW
G
= Assembly Location
= Wafer Lot
=
Y
e
ar
= Work Week
= Pb
−
Free Package
6.20
0.244
3.00
0.118
2.58
0.102
5.80
0.228
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”, may
or may not be present. Some products may
not follow the Generic Marking.
1.60
0.063
6.17
0.243
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON10527D
DPAK (SINGLE GAUGE)
PAGE 1 OF 1
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Semiconductor Components Industries, LLC, 2018
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onsemi
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PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMEN
T
:
TECHNICAL SUPPORT
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−
282
−
9855
T
o
ll Free USA/Canada
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