onsemi-MJD5731T4G

Part #onsemi-MJD5731T4G
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onsemi-MJD5731T4G
MJD5731  
High Voltage PNP Silicon  
Power
T
r
ansistors  
Designed for line operated audio output amplifier, SWITCHMODE  
power supply drivers and other switching applications.  
Features  
•
PNP Complements to the MJD47 thru MJD50 Series  
•
Epoxy Meets UL 94 V−0 @ 0.125 in  
SILICON  
POWER TRANSISTORS  
1.0 AMPERE  
•
These Devices are Pb−Free and are RoHS Compliant  
MAXIMUM RATINGS  
350 VOLTS, 15 WATTS  
Rating  
Collector−Emitter Voltage  
Emitter−Base Voltage  
Symbol  
Max  
350  
5
Unit  
Vdc  
Vdc  
Adc  
V
CEO  
COLLECTOR  
2, 4  
V
EB  
Collector Current − Continuous  
I
C
1.0  
Collector Current − Peak  
T
o
tal Power Dissipation  
I
3.0  
Adc  
CM  
1
BASE  
P
D
D
15  
0.12  
W
W/
°
C  
@ T
 
= 25
°
C  
C
Derate above 25
°
C  
3
EMITTER  
P
@ T
 
= 25
°
C  
1.56  
0.0125  
W
W/
°
C  
A
Derate above 25
°
C  
4
Unclamped Inductive Load Energy  
E
20  
mJ  
2
1
Operating and Storage Junction  
T
e
mperature Range  
T , T  
−55 to +150  
°
C  
J
stg  
3
DPAK  
CASE 369C  
STYLE 1  
ESD − Human Body Model  
ESD − Machine Model  
HBM  
MM  
3B  
C
V
V
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. These
 
ratings are applicable when surface mounted on the minimum pad  
sizes recommended.  
MARKING DIAGRAM  
AYWW  
J
5731G  
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Max  
8.33  
80  
Unit  
°
C/W  
°
C/W  
Thermal Resistance, Junction−to−Case  
R
q
JC  
JA  
A
Y
= Assembly Location  
=
Y
e
ar  
Thermal Resistance, Junction−to−Ambient  
R
q
WW  
J5731  
G
= Work Week  
= Device Code  
= Pb−Free Package  
Lead
T
e
mperature for Soldering  
T
260  
°
C  
L
2. These
 
ratings are applicable when surface mounted on the minimum pad  
sizes recommended.  
ORDERING INFORMATION  
†
Device  
MJD5731T4G  
Package  
Shipping  
DPAK  
2500/
T
a
pe & Reel  
(Pb−Free)  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our
T
a
pe and Reel Packaging Specifications  
Brochure, BRD8011/D.  
©
Semiconductor Components Industries, LLC, 2013  
1
Publication Order Number:  
August, 2013 − Rev. 5  
MJD5731/D  
 

MJD5731  
ELECTRICAL CHARACTERISTICS
(T =
 
25
°
C unless otherwise noted)  
C
Characteristic  
Symbol  
Min  
Max  
Unit  
OFF CHARACTERISTICS  
Collector−Emitter Sustaining V

V
Vdc  
CEO(sus)  
(I =
 
30 mAdc, I
 
= 0)  
350  
−
−
C
B
Collector Cutoff Current  
(V =
 
250 Vdc, I
 
= 0)  
I
mAdc  
mAdc  
mAdc  
CEO  
0.1  
0.01  
0.5  
CE  
B
Collector Cutoff Current  
(V =
 
350 Vdc, V
 
= 0)  
I
CES  
−
CE  
BE  
Emitter Cutoff Current  
(V =
 
5.0 Vdc, I
 
= 0)  
I
EBO  
−
BE  
C
ON CHARACTERISTICS

DC Current Gain  
h
FE  
−
(I =
 
0.3 Adc, V
 
= 10 Vdc)  
C
CE  
30  
10  
175  
−
(I =
 
1.0 Adc, V
 
= 10 Vdc)  
C
CE  
Collector−Emitter Saturation Voltage  
(I =
 
1.0 Adc, I
 
= 0.2 Adc)  
V
Vdc  
Vdc  
CE(sat)  
−
−
1.0  
1.5  
C
B
Base−Emitter On Voltage  
(I =
 
1.0 Adc, V
 
= 10 Vdc)  
V
BE(on)  
C
CE  
DYNAMIC CHARACTERISTICS  
Current Gain − Bandwidth Product  
f
MHz  
−
T
(I =
 
0.2 Adc, V
 
= 10 Vdc, f = 2.0 MHz)  
10  
25  
−
−
C
CE  
Small−Signal Current Gain  
(I =
 
0.2 Adc, V
 
= 10 Vdc, f = 1.0 kHz)  
h
fe  
C
CE  
3. Pulse
 
T
e
st: Pulse Width
≤
300
m
s, Duty Cycle
≤
2.0%.  
200  
1.4  
1.2  
V
CE  
= 10 V  
100  
T =
 
150
°
C  
J
25
°
C  
1
0.8  
0.6  
0.4  
0.2  
0
50  
T =
 
25
°
C  
J
30  
20  
-ꢀ55
°
C  
10  
-ꢀ55
°
C  
150
°
C  
5.0  
V
@ I
 
/I =
 
5.0  
C B  
CE(sat))  
3.0  
2.0  
0.02 0.03
 
0.05  
0.1  
0.2 0.3  
0.5  
1.0  
2.0  
0.02 0.03
 
0.05  
0.1  
0.2 0.3  
0.5  
1.0  
2.0  
I ,
 
COLLECTOR CURRENT (AMPS)  
C
I ,
 
COLLECTOR CURRENT (AMPS)  
C
Figure 1. DC Current Gain  
Figure 2. Collector−Emitter Saturation Voltage  
2
 

MJD5731  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
1.4  
1.2  
T =
 
– 55
°
C  
1
0.8  
0.6  
0.4  
0.2  
0
J
V
@ I
 
/I =
 
5.0  
C B  
BE(sat)  
V
@ I
 
/I =
 
5 V  
C B  
BE(sat)  
25
°
C  
V
BE(on)  
@ V
 
= 4 V  
CE  
150
°
C  
T =
 
25
°
C  
J
V
@ I
 
/I =
 
5 V  
C B  
CE(sat)  
0.02 0.03
 
0.05  
0.1  
0.2 0.3  
0.5  
1.0  
2.0  
0.02  
0.06  
0.1  
0.2  
0.4 0.6  
1
2
0.04  
I ,
 
COLLECTOR CURRENT (AMPS)  
C
I ,
 
COLLECTOR CURRENT (AMPS)  
C
Figure 3. Base−Emitter Voltage  
Figure 4. “On” Voltages  
10  
There are two limitations on the power handling ability of  
a transistor: average junction temperature and second  
5.0  
breakdown. Safe operating area curves indicate I
 
− V  
C
CE  
2.0  
1.0  
0.5  
100
m
s  
1.0ꢁms  
dc  
limits of the transistor that must be observed for reliable  
operation; i.e., the transistor must not be subjected to greater  
dissipation than the curves indicate.  
500
m
s  
T =
 
25
°
C  
C
variable depending on conditions. Second breakdown pulse  
limits are valid for duty cycles to 10% provided T  
= 150
°
C; T
 
is  
J(pk)  
C
0.2  
0.1  
BONDING WIRE LIMIT  
THERMAL LIMIT  
SECOND BREAKDOWN LIMIT  
J(pk)  
≤
150
°
C. T  
may be calculated from the data in

.  
0.05  
J(pk)  
At high case temperatures, thermal limitations will reduce  
the power that can be handled to values less than the  
limitations imposed by second breakdown.  
0.02  
0.01  
5.0  
10  
20 30  
50  
100  
200 300
 
500  
V
CE  
, COLLECTOR-EMITTER VOLTAGE (VOLTS)  
Figure 5. Forward Bias Safe Operating Area  
1
0.7  
0.5  
D = 0.5  
0.3  
0.2  
0.2  
0.1  
0.05  
P
(pk)  
R
R
= r(t) R  
q
JC  
q
q
JC(t)  
0.1  
0.07  
0.05  
= 8.33
°
C/W MAX  
JC  
D CURVES APPLY FOR POWER  
PULSE TRAIN SHOWN  
READ TIME AT t  
0.02  
t
0.01  
1
t
2
1
0.03  
0.02  
SINGLE PULSE  
T
– T
 
= P
 
q  
C (pk)
 
JC(t)  
J(pk)  
DUTY CYCLE, D = t
 
/t  
1 2  
0.01  
0.01 0.02
 
0.03 0.05  
0.1  
0.2 0.3  
0.5  
1
2
3
5
10  
20 30
 
50  
100  
200 300
 
500  
1 k  
t, TIME (ms)  
Figure 6. Thermal Response  
3
 

MJD5731  
TURN-ON PULSE  
t
1
V
BE(off)  
V
in  
0 V  
V
CC  
R
R
C
AP­  
PROX.  
-11 V  
SCOPE  
t
≤
7.0 ns  
1
100
≤
t <
 
500
m
s  
2
t <
 
15 ns  
B
3
V
in  
t
2
t
3
C
<< C  
eb  
51  
jd  
+ꢀ4.0 V  
APPROX. +ꢀ9.0 V  
DUTY CYCLE
≈
2.0%  
TURN-OFF PULSE  
Figure 7. Switching Time Equivalent Circuit  
5.0  
1.0  
0.5  
T =
 
25
°
C  
J
t
s
3.0  
2.0  
T =
 
25
°
C  
J
t
r
V
CC  
I /I
 
= 5.0  
= 200 V  
V
CC  
I /I
 
= 5.0  
= 200 V  
C B  
0.3  
0.2  
C B  
t
f
t
d
1.0  
0.5  
0.1  
0.3  
0.2  
0.05  
0.03  
0.02  
0.1  
0.01  
0.05  
0.02 0.03  
0.1  
0.2 0.3  
0.5  
1.0  
2.0  
0.02  
0.1  
0.2 0.3  
0.5  
1.0  
2.0  
0.05  
0.03 0.05  
I ,
 
COLLECTOR CURRENT (AMPS)  
C
I ,
 
COLLECTOR CURRENT (AMPS)  
C
Figure 8. Turn−On Resistive Switching Times  
Test Circuit  
Figure 9. Resistive Turn−Off Switching Times  
Voltage and Current Waveforms  
t
≈
3 ms  
(SEE NOTE 1)  
w
V
MONITOR  
CE  
0 V  
-ꢀ5 V  
INPUT  
VOLTAGE  
R
=
BB1  
TUT  
MJE171  
100 mH  
150
W  
100 ms  
50  
50  
+
–
V
= 20 V  
CC  
INPUT  
0.63 A  
I MONITOR  
C
COLLECTOR  
CURRENT  
R
=
BB2  
0 V  
100
W  
R =  
S
V
0
=
V
CER  
+
–
BB2  
V
BB1  
= 10 V  
0.1
W  
COLLECTOR  
VOLTAGE  
10 V  
V
CE(sat)  
Figure 10. Inductive Load Switching  
4

MJD5731  
PACKAGE DIMENSIONS  
DPAK  
CASE 369C  
ISSUE D  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ASME  
Y14.5M, 1994.  
2. CONTROLLING DIMENSION: INCHES.  
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-  
MENSIONS b3, L3 and Z.  
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD  
FLASH, PROTRUSIONS, OR BURRS. MOLD  
FLASH, PROTRUSIONS, OR GATE BURRS SHALL  
NOT EXCEED 0.006 INCHES PER SIDE.  
5. DIMENSIONS D AND E ARE DETERMINED AT THE  
OUTERMOST EXTREMES OF THE PLASTIC BOD
Y
.  
6. DATUMS A AND B ARE DETERMINED AT DATUM  
PLANE H.  
C
A
D
A
E
c2  
b3  
B
4
2
L3  
L4  
Z
H
DETAIL A  
1
3
INCHES  
DIM MIN
 
MAX  
0.086 0.094  
A1
0.000 0.005  
0.025 0.035  
MILLIMETERS  
MIN  
2.18  
0.00  
0.63  
0.76  
4.57  
0.46  
0.46  
5.97  
6.35  
MAX  
2.38  
0.13  
0.89  
1.14  
5.46  
0.61  
0.61  
6.22  
6.73  
A
b2  
c
b
b
b2
0.030 0.045  
b3
0.180 0.215  
M
0.005 (0.13)  
C
H
e
c
0.018 0.024  
c2
0.018 0.024  
GAUGE  
SEATING  
PLANE  
L2  
PLANE  
C
D
E
e
0.235 0.245  
0.250 0.265  
0.090 BSC  
2.29 BSC  
9.40 10.41  
1.40 1.78  
2.74 REF  
0.51 BSC  
0.89 1.27  
H
L
L1  
L2  
0.370 0.410  
0.055 0.070  
0.108 REF  
L
A1  
L1  
0.020 BSC  
DETAIL A  
ROTATED 9
0
5
CW  
L3
0.035 0.050  
L4  
Z
−−− 0.040  
0.155 −−−  
−−−  
3.93  
1.01  
−−−  
STYLE 1:  
PIN 1.
 
BASE  
2. COLLECTOR  
3. EMITTER  
4. COLLECTOR  
SOLDERING FOOTPRINT*  
6.20  
0.244  
3.0  
0.118  
2.58  
0.101  
5.80  
0.228  
6.172  
0.243  
1.6  
0.063  
mm  
inches  
ǒ
Ǔ
SCALE 3:1  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.  
ON Semiconductor
and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).
 
SCILLC owns the rights to a number of patents, trademarks,  
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at

. SCILLC  
reserves the right to make changes without further notice to any products herein.
 
SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any  
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without  
limitation special, consequential or incidental damages.
 
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications  
and actual performance may vary over time.
 
All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
 
SCILLC  
does not convey any license under its patent rights nor the rights of others.
 
SCILLC products are not designed, intended, or authorized for use as components in systems intended for  
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where  
personal injury or death may occur.
 
Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and  
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,  
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture  
of the part.
 
SCILLC is an Equal Opportunity/Affirmative Action Employer.
 
This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
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T
:  
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o
ll Free  
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.
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o
ll Free USA/Canada  
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MJD5731/D