onsemi-MJE18004G
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MJE18004, MJF18004
Switch-mode NPN Bipolar
Power
T
r
ansistor
For Switching Power Supply Applications
The MJE/MJF18004 have an applications specific state−of−the−art
die designed for use in 220 V line−operated switch−mode Power
supplies and electronic light ballasts.
Features
POWER TRANSISTOR
5.0 AMPERES
•
Improved Efficiency Due to Low Base Drive Requirements:
♦
High and Flat DC Current Gain h
♦
Fast Switching
FE
1000 VOLTS
35 and 75 WATTS
♦
No Coil Required in Base Circuit for Turn−Off (No Current Tail)
•
Full Characterization at 125
_
C
COLLECTOR
2,4
•
ON Semiconductor Six Sigma Philosophy Provides Tight and
Reproducible Parametric Distributions
•
Two Package Choices: Standard TO−220 or Isolated TO−220
•
MJF18004, Case 221D, is UL Recognized at 3500 V
: File
1
RMS
BASE
#E69369
•
These Devices are Pb−Free and are RoHS Compliant*
3
EMITTER
MAXIMUM RATINGS
Rating
Symbol
Value
450
1000
9.0
Unit
MARKING
DIAGRAMS
Collector−Emitter Sustaining Voltage
Collector−Base Breakdown Voltage
Emitter−Base Voltage
V
CEO
Vdc
Vdc
Vdc
Adc
Adc
Adc
Adc
V
V
V
CES
4
EBO
Collector Current
− Continuous
I
C
5.0
MJE18004G
AYWW
I
10
CM
Base Current
Base Current
− Continuous
I
B
2.0
TO−220AB
CASE 221A−09
STYLE 1
I
4.0
BM
1
2
T
e
st No. 1 Per Figure 22a
V
ISOL
MJF18004
4500
3
T
e
st No. 2 Per Figure 22b
T
e
st No. 3 Per Figure 22c
3500
1500
(for 1 sec, R.H. < 30%, T
= 25
_
C)
A
T
o
tal Device Dissipation @ T
= 25
_
C
P
D
W
W/
_
C
C
MJE18004
MJF18004
75
35
TO−220 FULLPACK
CASE 221D
MJF18004G
AYWW
Derate above 25
°
C
MJE18004
MJF18004
0.6
0.28
STYLE 2
UL RECOGNIZED
1
Operating and Storage
T
e
mperature
T , T
−65 to 150
_
C
2
J
stg
3
THERMAL CHARACTERISTICS
G
A
Y
= Pb−Free Package
= Assembly Location
=
Y
e
ar
Characteristics
Symbol
Max
Unit
Thermal Resistance, Junction−to−Case
R
_
C/W
q
JC
MJE18004
MJF18004
1.65
3.55
WW
= Work Week
Thermal Resistance, Junction−to−Ambient
R
62.5
260
_
C/W
_
C
q
JA
L
ORDERING INFORMATION
See detailed ordering and shipping information in the package
Maximum Lead
T
e
mperature for Soldering
Purposes 1/8
″
from Case for 5 Seconds
T
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Pulse
T
e
st: Pulse Width = 5 ms, Duty Cycle
≤
10%.
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
2. Proper
strike and creepage distance must be provided.
©
Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
January, 2015 − Rev. 12
MJE18004/D
MJE18004, MJF18004
ELECTRICAL CHARACTERISTICS
(T =
25
_
C unless otherwise specified)
C
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage (I
= 100 mA, L = 25 mH)
V
450
−
−
−
−
Vdc
m
Adc
m
Adc
C
CEO(sus)
Collector Cutoff Current (V
= Rated V
, I
= 0)
I
CEO
100
CE
CEO
CES
B
Collector Cutoff Current (V
= Rated V
, V
= 0)
EB
(T =
25
_
C)
C
I
−
−
−
−
−
−
100
500
100
CE
CES
(T =
125
_
C)
C
Collector Cutoff Current
(V =
800
V
, V
=
0
)
(T =
125
_
C)
C
CE
EB
Emitter Cutoff Current (V
= 9.0 Vdc, I
= 0)
I
−
−
100
m
Adc
EB
C
EBO
ON CHARACTERISTICS
Base−Emitter Saturation Voltage (I
= 1.0 Adc, I
= 0.1 Adc)
V
−
−
0.82
0.92
1.1
1.25
Vdc
Vdc
C
B
BE(sat)
Base−Emitter Saturation Voltage
(I =
2.0 Adc, I
= 0.4 Adc)
C
B
Collector−Emitter Saturation Voltage
V
CE(sat)
(I =
1.0 Adc, I
= 0.1 Adc)
0.5
0.6
0.45
0.8
C
B
−
−
−
−
−
0.25
0.29
0.3
0.36
0.5
(T =
125
_
C)
C
(I =
2.0 Adc, I
= 0.4 Adc)
C
B
(T =
125
_
C)
C
(I =
2.5 Adc, I
= 0.5 Adc)
0.75
C
B
DC Current Gain (I
= 1.0 Adc, V
= 2.5 Vdc)
h
FE
12
−
14
−
6.0
−
10
21
20
−
32
11
7.5
22
−
−
34
−
−
−
−
C
CE
(T =
125
_
C)
C
DC Current Gain
(I =
0.3 Adc, V
= 5.0 Vdc)
C
CE
(T =
125
_
C)
C
DC Current Gain
(I =
2.0 Adc, V
= 1.0 Vdc)
C
CE
(T =
125
_
C)
C
DC Current Gain
(I =
10 mAdc, V
= 5.0 Vdc)
−
C
CE
DYNAMIC CHARACTERISTICS
Current Gain Bandwidth (I
= 0.5 Adc, V
= 10 Vdc, f = 1.0 MHz)
f
−
−
−
13
50
−
MHz
pF
C
CE
T
Output Capacitance (V
= 10 Vdc, I
= 0, f = 1.0 MHz)
C
65
CB
E
ob
Input Capacitance (V
= 8.0 V)
C
800
1000
pF
EB
ib
CE(dsat)
Dynamic Saturation Voltage:
V
−
−
6.8
14
−
−
Vdc
1.0
m
s
3.0
m
s
1.0
m
s
3.0
m
s
(I =
1.0 Adc
(T =
125
°
C)
C
C
I
= 100 mAdc
Determined 1.0
m
s and
3.0
m
s respectively after
B1
−
−
2.4
5.6
−
−
V
CC
= 300 V)
(T =
125
°
C)
C
rising I
reaches 90% of
B1
final I
B1
−
−
11.3
15.5
−
−
(see Figure 18)
(I =
2.0 Adc
(T =
125
°
C)
C
C
I
= 400 mAdc
B1
−
−
1.3
6.1
−
−
V
CC
= 300 V)
(T =
125
°
C)
C
2
MJE18004, MJF18004
ELECTRICAL CHARACTERISTICS
— continued (T
= 25
_
C unless otherwise specified)
C
Characteristic
Symbol
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS: Resistive Load
(D.C.
v
10%, Pulse Width = 20
m
s)
Turn−On Time
Turn−Off Time
Turn−On Time
Turn−Off Time
Turn−On Time
Storage Time
Fall Time
(I =
1.0 Adc, I
= 0.1 Adc,
t
t
t
t
t
−
−
210
180
300
−
ns
m
s
ns
m
s
ns
m
s
ns
C
B1
on
off
on
off
on
I
= 0.5 Adc, V
= 300 V)
(T =
125
°
C)
B2
CC
C
−
−
1.0
1.3
1.7
−
(T =
125
°
C)
C
(I =
2.0 Adc, I
= 0.4 Adc,
−
−
75
90
110
−
C
B1
I
B1
= 1.0 Adc, V
= 300 V)
(T =
125
°
C)
C
CC
−
−
1.5
1.8
2.5
−
(T =
125
°
C)
C
(I =
2.5 Adc, I
= 0.5 Adc,
−
−
450
900
800
1400
C
B1
I
B2
= 0.5 Adc, V
= 250 V)
(T =
125
°
C)
C
CC
t
−
−
2.0
2.2
3.0
3.5
s
(T =
125
°
C)
C
t
f
−
−
275
500
400
800
(T =
125
°
C)
C
SWITCHING CHARACTERISTICS: Inductive Load
(V
= 300
V
, V
=
1
5
V
, L =
2
00
m
H)
CC
clamp
Fall Time
(I =
1.0 Adc, I
= 0.1 Adc,
t
fi
−
−
100
100
150
−
ns
m
s
ns
ns
m
s
ns
ns
m
s
ns
C
B1
I
B2
= 0.5 Adc)
(T =
125
°
C)
C
Storage Time
Crossover Time
Fall Time
t
si
−
−
1.1
1.4
1.7
−
(T =
125
°
C)
C
t
−
−
180
160
250
−
c
fi
(T =
125
°
C)
C
(I =
2.0 Adc, I
= 0.4 Adc,
t
−
−
90
150
175
−
C
B1
I
B2
= 1.0 Adc)
(T =
125
°
C)
C
Storage Time
Crossover Time
Fall Time
t
si
−
−
1.7
2.2
2.5
−
(T =
125
°
C)
C
t
−
−
180
250
300
−
c
fi
(T =
125
°
C)
C
(I =
2.5 Adc, I
= 0.5 Adc,
t
−
−
70
100
130
175
C
B1
I
B2
= 0.5 Adc,
(T =
125
°
C)
C
V
BE(off)
= −
ꢀ
5.0 Vdc)
Storage Time
Crossover Time
t
si
−
−
0.75
1.0
1.0
1.3
(T =
125
°
C)
C
t
c
−
−
250
250
350
500
(T =
125
°
C)
C
3
MJE18004, MJF18004
TYPICAL STATIC CHARACTERISTICS
100
100
10
1
V
CE
= 1 V
V
CE
= 5 V
T =
125
°
C
T =
125
°
C
J
J
T =
-ꢀ20
°
C
J
T =
-ꢀ20
°
C
J
T =
25
°
C
J
T =
25
°
C
J
10
1
0.01
0.01
0.10
1.00
10.00
0.10
1.00
10.00
I ,
COLLECTOR CURRENT (AMPS)
C
I ,
COLLECTOR CURRENT (AMPS)
C
Figure 1. DC Current Gain @ 1 Volt
Figure 2. DC Current Gain @ 5 Volts
2.0
1.5
1.0
10.00
1.00
T =
25
°
C
J
1.5 A
2 A
3 A
4 A
1 A
I /I
= 10
C B
0.10
0.01
0.5
0
I /I
= 5
C B
T =
25
°
C
T =
125
°
C
J
J
I =
0.5 A
C
0.01
0.10
1.00
10.00
0.01
0.10
COLLECTOR CURRENT (AMPS)
C,
1.00
10.00
I ,
BASE CURRENT (AMPS)
B
I
Figure 3. Collector Saturation Region
Figure 4. Collector−Emitter Saturation Voltage
1.1
1.0
10000
1000
100
T =
25
°
C
J
f = 1 MHz
C
C
ib
0.9
0.8
0.7
ob
T =
25
°
C
J
0.6
0.5
0.4
10
1
T =
125
°
C
J
I /I
= 10
C
B
I /I
= 5
C
B
0.01
0.10
1.00
10.00
1
10
100
I ,
COLLECTOR CURRENT (AMPS)
C
V
CE
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 5. Base−Emitter Saturation Region
Figure 6. Capacitance
4
MJE18004, MJF18004
TYPICAL SWITCHING CHARACTERISTICS
(I =
I /2
for all switching)
B2
C
1800
1600
1400
1200
1000
800
3000
2500
2000
1500
1000
I /I
= 5
B
C
I
= I
/2
B(off) C
= 300 V
I
= I
/2
B(off) C
= 300 V
T =
25
°
C
T =
125
°
C
J
J
T =
25
°
C
T =
125
°
C
J
V
J
CC
V
CC
PW = 20
m
s
PW = 20
m
s
I /I
= 5
B
C
I /I
= 10
C B
I /I
= 10
C B
600
400
500
0
200
0
0
1
2
3
4
5
0
1
2
3
4
5
I ,
COLLECTOR CURRENT (AMPS)
C
I ,
COLLECTOR CURRENT (AMPS)
C
Figure 7. Resistive Switching, t
on
Figure 8. Resistive Switching, t
off
3500
3000
2500
2000
1500
1000
3500
3000
2500
2000
1500
V =
300 V
Z
V =
300 V
Z
T =
25
°
C
T =
125
°
C
J
J
V
I
= 15 V
= I
/2
CC
V
CC
= 15 V
I /I
= 5
C B
B(off)
C
I =
I /2
B(off) C
L =
200
m
H
C
L =
200
m
H
C
I =
2 A
C
1000
500
T =
25
°
C
T =
125
°
C
J
I =
1 A
C
J
500
0
I /I
= 10
B
C
0
1
2
3
4
5
3
4
5
6
7
8
9
10 11 12
13 14 15
h ,
FORCED GAIN
FE
I COLLECTOR
CURRENT (AMPS)
C
Figure 9. Inductive Storage Time, t
si
Figure 10. Inductive Storage Time, t
si
(h
FE
)
300
250
200
150
100
250
200
150
100
T =
25
°
C
T =
125
°
C
J
J
t
fi
t
c
t
c
V =
300 V
Z
V =
300 V
Z
V
I
= 15 V
= I
/2
50
0
V
I
= 15 V
= I
/2
CC
CC
T =
25
°
C
T =
125
°
C
J
50
0
J
B(off)
C
B(off)
C
t
fi
L =
200
m
H
C
L =
200
m
H
C
0
1
2
3
4
5
0
1
2
3
4
5
I ,
COLLECTOR CURRENT (AMPS)
C
I ,
COLLECTOR CURRENT (AMPS)
C
Figure 11. Inductive Switching, t
c
and t
fi
, I
C
/I
B
= 5
Figure 12. Inductive Switching, t
c
and t
fi
, I
C
/I
B
= 10
5
MJE18004, MJF18004
TYPICAL SWITCHING CHARACTERISTICS
(I =
I /2
for all switching)
B2
C
160
150
140
130
120
110
300
250
200
150
100
50
V =
300 V
Z
V =
300 V
Z
T =
25
°
C
T =
125
°
C
J
J
V
I
= 15 V
= I
/2
V
I
= 15 V
= I
/2
CC
CC
I =
1 A
C
B(off)
C
B(off)
C
L =
200
m
H
C
L =
200
m
H
C
I =
2 A
C
100
90
I =
2 A
C
T =
25
°
C
J
80
T =
125
°
C
J
I =
1 A
C
70
3
4
5
6
7
8
9
10 11 12 13 14 15
3
4
5
6
7
8
9
10 11 12
13 14 15
h ,
FORCED GAIN
FE
h
FE
, FORCED GAIN
Figure 13. Inductive Fall Time
Figure 14. Inductive Crossover Time
GUARANTEED SAFE OPERATING AREA INFORMATION
100
6.0
T
≤
125
°
C
B
C
DC (MJE18004)
5ꢁms
I /I
≥
4
C
5.0
1ꢁms
50ꢁ
m
s 10ꢁ
m
s 1ꢁ
m
s
L =
500
m
H
C
10
1.0
4.0
Extended
SOA
3.0
2.0
DC (MJF18004)
0.1
-ꢀ5 V
1.0
0
V
=
-1.5 V
BE(off)
0 V
0.01
10
100
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
1000
400
500
600
V ,
COLLECTOR-EMITTER VOLTAGE (VOLTS)
CE
700
800
900
1000
1100
V
CE
Figure 15. Forward Bias Safe Operating Area
Figure 16. Reverse Bias Safe Operating Area
There are two limitations on the power handling ability of a tran-
sistor: average junction temperature and second breakdown. Safe
operating area curves indicate I
C
−V
CE
limits of the transistor that
must be observed for reliable operation; i.e., the transistor must not
be subjected to greater dissipation than the curves indicate. The data
power level. Second breakdown pulse limits are valid for duty cy-
cles to 10% but must be derated when T
C
≥
25
°
C. Second breakdown
limitations do not derate the same as thermal limitations. Allowable
atures, thermal limitations will reduce the power that can be handled
to values less the limitations imposed by second breakdown. For in-
ductive loads, high voltage and current must be sustained simultane-
ously during turn−off with the base−to−emitter junction reverse bi-
ased. The safe level is specified as a reverse−biased safe operating
that the device is never subjected to an avalanche mode.
1.0
SECOND
BREAKDOWN
DERATING
0.8
0.6
0.4
0.2
0
THERMAL
DERATING
20
40
60
80
100
120
140
160
T ,
CASE TEMPERATURE (
°
C)
C
Figure 17. Forward Bias Power Derating
6
MJE18004, MJF18004
10
5
4
V
CE
90% I
I
C
C
9
8
7
6
5
t
fi
3
dyn 1
m
s
t
si
2
dyn 3
m
s
1
t
c
10% I
C
V
10% V
CLAMP
0
CLAMP
-1
-2
-3
-4
-5
4
3
2
1
0
90% I
B
I
B
90% I
1
B
1
m
s
3
m
s
I
B
0
1
2
3
4
5
6
7
8
TIME
TIME
Figure 18. Dynamic Saturation Voltage Measurements
Figure 19. Inductive Switching Measurements
+15 V
I PEAK
C
100
m
F
1
m
F
MTP8P10
MUR105
MJE210
100
W
3 W
150
W
3 W
V
CE
PEAK
V
CE
MTP8P10
MPF930
R
R
B1
I 1
B
I
MPF930
+10 V
out
I
B
A
I 2
B
50
W
B2
V(BR)CEO(sus)
L = 10 mH
INDUCTIVE SWITCHING
L = 200
m
H
RB2 = 0
RBSOA
COMMON
MTP12N10
150
W
3 W
L = 500
m
H
RB2 = 0
RB2 =
∞
500
m
F
V
= 20 VOLTS
I (pk)
= 100 mA
V
CC
= 15 VOLTS
V
CC
= 15 VOLTS
CC
RB1 SELECTED FOR
DESIRED I
1
RB1 SELECTED
FOR DESIRED I
1
C
1
m
F
B
B
-V
off
Table 1. Inductive Load Switching Drive Circuit
7
MJE18004, MJF18004
TYPICAL THERMAL RESPONSE
1.00
D = 0.5
0.2
P
(pk)
R
R
(t) = r(t) R
q
JC
q
q
JC
JC
0.10
= 1.25
°
C/W MAX
0.1
D CURVES APPLY FOR
POWER PULSE TRAIN
SHOWN READ TIME AT t
t
1
0.05
0.02
1
t
2
T
– T
= P
C
R (t)
q
JC
J(pk)
(pk)
DUTY CYCLE, D = t
/t
1
2
SINGLE PULSE
0.10
0.01
0.01
1.00
10.00
100.00
1000
10000
100000
t, TIME (ms)
Figure 20. Typical Thermal Response (Z
q
JC(t)
) for MJE18004
1.00
D = 0.5
0.2
P
(pk)
R
R
(t) = r(t) R
q
JC
q
q
JC
JC
0.10
0.1
= 3.12
°
C/W MAX
D CURVES APPLY FOR
POWER PULSE TRAIN
SHOWN READ TIME AT t
0.05
0.02
t
1
1
t
2
T
– T
= P
C
R (t)
q
JC
J(pk)
(pk)
DUTY CYCLE, D = t
/t
1
SINGLE PULSE
2
0.01
0.01
0.10
1.00
10.00
100.00
1000
t, TIME (ms)
Figure 21. Typical Thermal Response for MJF18004
ORDERING INFORMATION
Device
Package
Shipping
MJE18004G
TO−220AB
(Pb−Free)
50 Units / Rail
MJF18004G
TO−220 (Fullpack)
(Pb−Free)
50 Units / Rail
8
MJE18004, MJF18004
TEST CONDITIONS FOR ISOLATION TESTS*
MOUNTED
FULLY ISOLATED
PACKAGE
MOUNTED
FULLY ISOLATED
PACKAGE
MOUNTED
FULLY ISOLATED
PACKAGE
CLIP
CLIP
0.099
″
MIN
0.099
″
MIN
LEADS
LEADS
LEADS
HEATSINK
HEATSINK
HEATSINK
0.110
″
MIN
Figure 22a. Screw or Clip Mounting
Position for Isolation Test Number 1
Figure 22b. Clip Mounting Position
for Isolation Test Number 2
Figure 22c. Screw Mounting Position
for Isolation Test Number 3
*Measurement made between leads and heatsink with all leads shorted together
MOUNTING INFORMATION**
4-40 SCREW
CLIP
PLAIN WASHER
HEATSINK
COMPRESSION WASHER
HEATSINK
NUT
Figure 23a. Screw−Mounted
Figure 23b. Clip−Mounted
Figure 23. Typical Mounting Techniques
for Isolated Package
Laboratory tests on a limited number of samples indicate, when using the screw and compression washer mounting technique, a
.
screw torque of 6 to 8 in
lbs is sufficient to provide maximum power dissipation capability.
The compression washer helps to maintain
a constant pressure on the package over time and during large temperature excursions.
Destructive laboratory tests show that using a hex head 4−40 screw, without washers, and applying a torque in excess of 20 in
lbs will
.
cause the plastic to crack around the mounting hole, resulting in a loss of isolation capability.
.
Additional tests on slotted 4−40 screws indicate that the screw slot fails between 15 to 20 in
lbs without adversely affecting the
package. However,
in order to positively ensure the package integrity of the fully isolated device, ON Semiconductor does not recom-
.
mend exceeding 10 in
lbs of mounting torque under any mounting conditions.
*
*
F
or more information about mounting power semiconductors see Application Note AN1040.
9
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO
−
220
CASE 221A
−
09
ISSUE AJ
DATE 05 NOV 2019
SCALE 1:1
STYLE 1:
PIN 1.
BASE
2. COLLECTOR
STYLE 2:
PIN 1.
BASE
2. EMITTER
STYLE 3:
STYLE 4:
PIN 1.
MAIN TERMINAL 1
PIN 1.
CATHODE
2. ANODE
3. GATE
2. MAIN
TERMINAL 2
3. GATE
3. EMITTER
3. COLLECTOR
4. EMITTER
4. COLLECTOR
4. ANODE
4. MAIN
TERMINAL 2
STYLE 5:
PIN 1.
GATE
STYLE 6:
PIN 1.
ANODE
STYLE 7:
STYLE 8:
PIN 1.
CATHODE
2. ANODE
PIN 1.
CATHODE
2. ANODE
2. DRAIN
3. SOURCE
4. DRAIN
2. CATHODE
3. ANODE
3. CATHODE
4. ANODE
3. EXTERNAL
TRIP/DELAY
4. ANODE
4. CATHODE
STYLE 9:
PIN 1.
GATE
STYLE 10:
PIN 1.
GATE
STYLE 11:
STYLE 12:
PIN 1.
DRAIN
2. SOURCE
3. GATE
PIN 1.
MAIN TERMINAL 1
2. MAIN
TERMINAL 2
3. GATE
2. COLLECTOR
3. EMITTER
2. SOURCE
3. DRAIN
4. COLLECTOR
4. SOURCE
4. SOURCE
4. NOT
CONNECTED
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42148B
TO
−
220
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO
−
220 FULLPAK
CASE 221D
−
03
ISSUE K
DATE 27 FEB 2009
NOTES:
1. DIMENSIONING
AND TOLERANCING PER ANSI
Y14.5M, 1982.
SEATING
−
T
−
PLANE
−
B
−
C
2. CONTROLLING
DIMENSION: INCH
3. 221D-01
THRU 221D-02 OBSOLETE, NEW
STANDARD 221D-03.
F
S
Q
INCHES
DIM MIN
MAX
MILLIMETERS
U
SCALE 1:1
MIN
15.67
9.96
4.50
0.60
2.95
MAX
16.12
10.63
4.90
A
B
C
D
F
0.617
0.392
0.177
0.024
0.116
0.635
0.419
0.193
0.039
0.129
A
1
2 3
1.00
3.28
H
G
H
J
0.100 BSC
2.54 BSC
−
Y
−
K
0.118
0.018
0.503
0.048
0.135
0.025
0.541
0.058
3.00
0.45
3.43
0.63
K
L
12.78
1.23
13.73
1.47
G
N
J
N
Q
R
S
U
0.200 BSC
5.08 BSC
R
0.122
0.099
0.092
0.239
0.138
0.117
0.113
0.271
3.10
2.51
2.34
6.06
3.50
2.96
2.87
6.88
L
D
3 PL
M
M
0.25 (0.010)
B
Y
MARKING
DIAGRAMS
STYLE 1:
PIN 1.
GATE
2. DRAIN
STYLE 2:
PIN 1.
BASE
STYLE 3:
PIN 1.
ANODE
2. COLLECTOR
3. EMITTER
2. CATHODE
3. ANODE
3. SOURCE
AYWW
xxxxxxG
AKA
STYLE 4:
STYLE 5:
STYLE 6:
PIN 1.
MT 1
2. MT
2
xxxxxxG
AYWW
PIN 1.
CATHODE
2. ANODE
3. CATHODE
PIN 1.
CATHODE
2. ANODE
3. GATE
3. GATE
Bipolar
Rectifier
A
Y
WW
= Assembly Location
=
Y
e
ar
= Work Week
xxxxxx =
Specific Device Code
G
= Pb
−
Free Package
= Assembly Location
=
Y
e
ar
A
Y
xxxxxx =
Device Code
G
AKA
= Pb
−
Free Package
= Polarity Designator
WW
= Work Week
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42514B
TO
−
220 FULLPAK
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
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