onsemi-MJE340G

Part #onsemi-MJE340G
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onsemi-MJE340G
MJE340G  
Plastic Medium-Power  
NPN Silicon
T
r
ansistor  
This device is useful for high
−
voltage general purpose applications.  
Features  
•
Suitable for Transformerless, Line
−
Operated Equipment  
•
High Power Dissipation Rating for High Reliability  
•
These Devices are Pb
−
Free and are RoHS Compliant*  
•
Complementary to MJE350  
0.5 AMPERE  
POWER TRANSISTOR  
NPN SILICON  
MAXIMUM RATINGS  
300 VOLTS, 20 WATTS  
Rating  
Collector
−
Emitter Voltage  
Emitter
−
Base Voltage  
Symbol  
Value  
300  
3.0  
Unit  
Vdc  
V
CEO  
SCHEMATIC  
V
EB  
Vdc  
COLLECTOR  
2, 4  
Collector Current
−
Continuous  
I
500  
mAdc  
C
T
o
tal Power Dissipation  
P
D
@ T
 
= 25
_
C  
20  
0.16  
W
C
Derate above 25
_
C  
mW/
_
C  
3
Operating and Storage Junction  
T
e
mperature Range  
T , T  
–
6
5 to
+
1
50  
_
C  
BASE  
J
stg  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
1
EMITTER  
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Max  
Unit  
Thermal Resistance, Junction
−
to
−
Case  
q
6.25  
_
C/W  
JC  
TO
−
225  
CASE 77
−
09  
STYLE 1  
ELECTRICAL CHARACTERISTICS
(T =
 
25
°
C unless otherwise noted)  
C
Characteristic  
Symbol Min Max  
Unit  
1
2
3
OFF CHARACTERISTICS  
Collector
−
Emitter Sustaining Voltage  
V
Vdc  
m
Adc  
m
Adc  
CEO(sus)  
(I =
 
1.0 mAdc, I
 
= 0)  
300  
−
−
C
B
MARKING DIAGRAM  
Collector Cutoff Current  
(V =
 
300 Vdc, I
 
= 0)  
I
CBO  
100  
100  
CB  
E
YWW  
JE340G  
Emitter Cutoff Current  
(V =
 
3.0 Vdc, I
 
= 0)  
I
EBO  
−
EB  
C
ON CHARACTERISTICS  
DC Current Gain  
h
FE  
−
Y
WW  
=
Y
e
ar  
= Work Week  
(I =
 
50 mAdc, V
 
= 10 Vdc)  
30  
240  
C
CE  
Product parametric performance is indicated in the Electrical Characteristics for  
the listed test conditions, unless otherwise noted. Product performance may not  
be indicated by the Electrical Characteristics if operated under different  
conditions.  
JE340 =
 
Device Code  
G
= Pb
−
Free Package  
ORDERING INFORMATION  
Device  
MJE340G  
Package  
Shipping  
500 Units/Box  
*For additional information on our Pb
−
Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting
T
e
chniques  
Reference Manual, SOLDERRM/D.  
TO
−
225  
(Pb
−
Free)  
©
Semiconductor Components Industries, LLC, 2013  
1
Publication Order Number:  
February, 2017
−
Rev. 14  
MJE340/D  

MJE340G  
32  
28  
24  
20  
16  
12  
8.0  
1.0  
0.8  
T =
 
25
°
C  
J
V
@ I
 
/I =
 
10  
B
BE(sat)  
C
V
BE  
@ V
 
= 10 V  
CE  
0.6  
0.4  
0.2  
0
V
@ I
 
/I =
 
10  
C B  
CE(sat)  
MJE340  
4.0  
0
I /I
 
= 5.0  
C B  
0
20  
40  
60  
80  
100  
120  
140  
160  
10  
20 30  
50  
100  
I ,
 
COLLECTOR CURRENT (mA)  
200 300  
500  
T ,
 
CASE TEMPERATURE (
°
C)  
C
Figure 1.

C

Power Temperature Derating  
Figure 2. “On” Voltages  
ACTIVE
−
REGION SAFE OPERATING AREA  
There are two limitations on the power handling ability of  
a transistor: average junction temperature and second  
breakdown. Safe operating area curves indicate I
 
−
V  
1.0  
C
CE  
limits of the transistor that must be observed for reliable  
operation; i.e., the transistor must not be subjected to greater  
10
m
s  
0.5  
0.3  
T =
 
150
°
C  
J
500
m
s  
based on T  
= 150
_
C; T
 
is variable depending on  
J(pk)  
C
1.0ꢀms  
0.2  
dc  
conditions. Second breakdown pulse limits are valid for  
duty cycles to 10% provided T  
≤
150
_
C. At high case  
0.1  
J(pk)  
temperatures, thermal limitations will reduce the power that  
can be handled to values less than the limitations imposed by  
second breakdown.  
0.05  
SECOND BREAKDOWN LIMIT  
BONDING WIRE LIMIT  
0.03  
0.02  
THERMAL LIMIT T
 
= 25
°
C  
C
SINGLE PULSE  
0.01  
10  
20  
30  
50  
70 100  
200 300  
V
CE  
, COLLECTOR-EMITTER VOLTAGE (VOLTS)  
Figure 3. MJE340  
2
 

MJE340G  
2.0  
10  
7.0  
T =
 
25
°
C  
J
150
°
C  
5.0  
1.6  
1.2  
0.8  
0.4  
0
T =
 
25
°
C  
J
V
= 1.0 Vdc  
CE  
3.0  
2.0  
-ꢁ55
°
C  
1.0  
0.7  
0.5  
V
@ I
 
/I =
 
10  
B
BE(sat)  
C
V
@ V
 
= 1.0 V  
CE  
BE(on)  
0.3  
0.2  
V
@ I
 
/I =
 
10  
C B  
CE(sat)  
0.1  
0.01 0.02
 
0.03 0.05
 
0.1  
0.2 0.3
 
0.5  
1.0  
2.0 3.
0
4
.0  
0.005 0.01
 
0.02 0.03 0.05
 
0.1  
0.2 0.3
 
0.5  
1.0 2.0
 
3.
0
4
.0  
I ,
 
COLLECTOR CURRENT (AMP)  
C
I ,
 
COLLECTOR CURRENT (AMP)  
C
Figure 4. DC Current Gain  
Figure 5. “On” Voltage  
1.0  
0.7  
0.5  
D = 0.5  
0.2  
0.3  
0.2  
P
(pk)  
q
q
(t) = r(t)
q  
JC  
JC  
JC  
0.1  
0.05  
0.02  
= 3.12
°
C/W MAX  
0.1  
0.07  
0.05  
D CURVES APPLY FOR POWER  
PULSE TRAIN SHOWN  
t
1
READ TIME AT t  
t
2
1
T
– T
 
= P
 
q  
C (pk)
 
JC  
(t)  
J(pk)  
0.03  
0.02  
0.01  
DUTY CYCLE, D = t
 
/t  
1
2
SINGLE PULSE  
0.01  
0.01  
0.02 0.03
 
0.05  
0.1  
0.2 0.3
 
0.5  
1.0  
2.0 3.0
 
5.0  
10  
20  
50  
100  
200  
500  
1000  
t, TIME OR PULSE WIDTH (ms)  
Figure 6. Thermal Response  
300  
200  
V
V
= 10 V  
= 2.0 V  
CE  
CE  
T =
 
150
°
C  
J
100  
70  
+100
°
C  
+ꢁ25
°
C  
50  
30  
20  
-ꢁ55
°
C  
10  
1.0  
2.0  
3.0  
5.0  
7.0  
10  
20  
30  
50  
70  
100  
200  
300  
500  
I ,
 
COLLECTOR CURRENT (mAdc)  
C
Figure 7. DC Current Gain  
3

MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
TO
−
225  
CASE 77
−
09  
ISSUE AD  
4
DATE 25 MAR 2015  
1
3
2
2
1
3
FRONT VIEW  
BACK VIEW  
SCALE 1:1  
NOTES:  
E
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. NUMBER AND SHAPE OF LUGS OPTIONAL.  
A1  
Q
A
MILLIMETERS  
PIN 4  
BACKSIDE TAB  
DIM MIN  
MAX  
3.00  
1.50  
0.90  
0.88  
0.63  
11.10  
7.80  
2.54  
16.63  
2.54  
3.30  
4.20  
A
A1  
b
2.40  
1.00  
0.60  
0.51  
0.39  
10.60  
7.40  
2.04  
14.50  
1.27  
2.90  
3.80  
D
b2  
c
P
D
E
1
2
3
e
L
L1  
P
Q
L1  
GENERIC  
MARKING DIAGRAM*  
L
YWW  
XX  
XXXXXG  

2X

b2  
Y
=
Y
e
ar  
WW  
= Work Week  
XXXXX = Device Code  
= Pb
−
Free Package  
e
2X  
c
G
b
*This information is generic. Please refer to  
device data sheet for actual part marking.  
Pb
−
Free indicator, “G” or microdot “
G
”,  
may or may not be present.  
FRONT VIEW  
SIDE VIEW  
STYLE 1:  
STYLE 2:  
STYLE 3:  
PIN 1.
 
BASE  
STYLE 4:  
STYLE 5:  
PIN 1.
 
MT 1  
PIN 1.
 
EMITTER  
2., 4.
 
COLLECTOR  
3. BASE  
PIN 1.
 
CATHODE  
2., 4.
 
ANODE  
3. GATE  
PIN 1.
 
ANODE 1  
2., 4.
 
ANODE 2  
3. GATE  
2., 4.
 
COLLECTOR  
3. EMITTER  
2., 4.
 
MT 2  
3. GATE  
STYLE 6:  
STYLE 7:  
STYLE 8:  
STYLE 9:  
STYLE 10:  
PIN 1.
 
CATHODE  
2., 4.
 
GATE  
3. ANODE  
PIN 1.
 
MT 1  
2., 4.
 
GATE  
3. MT
 
2  
PIN 1.
 
SOURCE  
2., 4.
 
GATE  
3. DRAIN  
PIN 1.
 
GATE  
2., 4.
 
DRAIN  
3. SOURCE  
PIN 1.
 
SOURCE  
2., 4.
 
DRAIN  
3. GATE  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions
 
are uncontrolled
 
except when stamped
 
“CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASB42049B  
TO
−
225  
PAGE 1 OF 1  
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically  
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the  
rights of others.  
©
Semiconductor Components Industries, LLC, 2019  

ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
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. ON Semiconductor reserves the right to make changes without further notice to any products herein.  
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:  
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−
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o
ll Free USA/Canada  
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