onsemi-MJF127G
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MJF122, MJF127
Complementary Power
Darlingtons
For Isolated Package Applications
Designed for general
−
purpose amplifiers and switching
applications, where the mounting surface of the device is required to
be electrically isolated from the heatsink or chassis.
COMPLEMENTARY SILICON
POWER DARLINGTONS
5.0 A, 100
V
,
3
0 W
Features
•
Electrically Similar to the Popular TIP122 and TIP127
•
100 V
CEO(sus)
NPN
PNP
•
5.0 A Rated Collector Current
•
No Isolating Washers Required
•
Reduced System Cost
COLLECTOR 2
COLLECTOR 2
BASE
1
BASE
1
•
High DC Current Gain
−
2000 (Min) @ I
= 3 Adc
C
•
UL Recognized, File #E69369, to 3500 V
•
Pb
−
Free Packages are Available*
Isolation
RMS
EMITTER 3
EMITTER 3
MJF127
MAXIMUM RATINGS
MJF122
Rating
Collector
−
Emitter Voltage
Collector
−
Base Voltage
Emitter
−
Base Voltage
Symbol
Value
100
100
5
Unit
Vdc
Vdc
Vdc
V
CEO
MARKING
DIAGRAM
V
CB
EB
V
MJF12xG
AYWW
RMS Isolation Voltage (Note 1)
V
ISOL
4500
V
RMS
(t = 0.3 sec, R.H.
≤
30%, T
= 25
°
C)
TO
−
220
CASE 221D
−
02
STYLE 2
A
Collector Current
−
Continuous
I
C
5
8
Adc
Adc
Peak
1
x
G
A
Y
= 2
or 7
= Pb
−
Free Package
= Assembly Location
=
Y
e
ar
= Work
Week
2
3
Base Current
I
B
0.12
P
D
@ T
= 25
_
C
30
0.24
W
C
Derate above 25
_
C
W/
_
C
WW
T
o
tal Power Dissipation @ T
= 25
_
C
P
D
2
W
A
Derate above 25
_
C
0.016
W/
_
C
ORDERING INFORMATION
Operating and Storage Junction
T
e
mperat-
T , T
−
65 to
+
1
50
I
C
J
stg
†
ure Range
Device
Package
Shipping
MJF122
TO
−
220
50 Units / Rail
50 Units / Rail
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
62.5
4.1
Unit
_
C/W
_
C/W
MJF122G
TO
−
220
(Pb
−
Free)
Thermal Resistance, Junction
−
to
−
Ambient
R
q
JA
Thermal Resistance, Junction
−
to
−
Case
R
MJF127
TO
−
220
50 Units / Rail
50 Units / Rail
q
JC
MJF127G
TO
−
220
(Pb
−
Free)
Lead
T
e
mperature for Soldering Purpose
T
L
260
_
C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our
T
a
pe and Reel Packaging Specifications
Brochure, BRD8011/D.
1. Proper
strike and creepage distance must be provided.
2. Measurement
made with thermocouple contacting the bottom insulated
mounting surface (in a location beneath the die), the device mounted on a
heatsink with thermal grease and a mounting torque of
≥
6 in. lbs.
*For additional information on our Pb
−
Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2008
1
Publication Order Number:
September, 2008
−
Rev. 7
MJF122/D
MJF122, MJF127
ELECTRICAL CHARACTERISTICS
(T =
25
_
C unless otherwise noted)
C
Characteristic
Symbol
Min
Max
Unit
OFF CHARACTERISTICS
V
100
−
−
10
10
2
Vdc
m
Adc
m
Adc
mAdc
CEO(sus)
(I =
100 mAdc, I
= 0)
C
B
Collector Cutoff Current
(V =
50 Vdc, I
= 0)
I
I
CEO
CE
B
Collector Cutoff Current
(V =
100 Vdc, I
= 0)
−
CBO
CB
E
Emitter Cutoff Current (V
= 5 Vdc, I
= 0)
I
EBO
−
BE
C
DC Current Gain (I
= 0.5 Adc, V
= 3 Vdc)
h
FE
1000
2000
−
−
−
C
CE
DC Current Gain
(I =
3 Adc, V
= 3 Vdc)
C
CE
Collector
−
Emitter Saturation Voltage (I
= 3 Adc, I
= 12 mAdc)
V
CE(sat)
−
−
2
3.5
Vdc
Vdc
C
B
Collector
−
Emitter Saturation Voltage
(I =
5 Adc, I
= 20 mAdc)
C
B
Base
−
Emitter On Voltage (I
= 3 Adc, V
= 3 Vdc)
V
BE(on)
−
2.5
C
CE
DYNAMIC CHARACTERISTICS
Small
−
Signal Current Gain (I
= 3 Adc, V
= 4 Vdc, f = 1 MHz)
h
fe
4
−
−
C
CE
Output Capacitance
(V =
10 Vdc, I
= 0, f = 0.1 MHz)
MJF127
MJF122
C
−
−
300
200
pF
ob
CB
E
3. Pulse
T
e
st: Pulse Width
v
300
m
s, Duty Cycle
v
2%.
5
t
s
R
& R
VARIED TO OBTAIN DESIRED CURRENT LEVELS
C
B
3
2
V
CC
D ,
MUST BE FAST RECOVERY TYPES, e.g.,
1
– 30 V
ꢀ1N5825 USED ABOVE I
≈
100 mA
ꢀMSD6100 USED BELOW I
≈
100 mA
B
R
C
B
SCOPE
t
f
TUT
1
0.7
0.5
V
2
R
B
APPROX.
+8 V
≈
ꢁ8 k
≈
ꢁ120
D
51
1
0.3
0.2
0
t @
V
d
= 0 V
BE(off)
t
r
V
1
V
= 30 V
I /I
= 250
CC
APPROX.
+ 4 V
C
B
= I
-12 V
25
m
s
0.1
0.07
0.05
PNP
NPN
I
B1 B2
T =
25
°
C
J
t , t
≤
10 ns
FOR t
AND t , D
IS DISCONNECTED
d r
1
r
f
DUTY CYCLE = 1%
AND V
= 0
2
0.1
0.5 0.7
1
2
3
5
7
10
0.2 0.3
FOR NPN TEST CIRCUIT REVERSE ALL POLARITIES.
I ,
COLLECTOR CURRENT (AMP)
C
Figure 2. Typical Switching Times
Figure 1. Switching Times Test Circuit
2
MJF122, MJF127
T
A
T
C
80
60
40
20
0
4
3
2
T
C
T
A
1
0
20
40
60
80
100
120
140
160
T, TEMPERATURE (
°
C)
Figure 3. Maximum Power Derating
1
0.5
0.3
0.2
0.1
SINGLE PULSE
R
T
= r(t) R
q
JC
q
JC(t)
0.05
– T
= P
C
R
(t)
q
(pk) JC
J(pk)
0.03
0.02
0.01
0.1
0.5
1
2
3
5
10
20 30
50
100
200 300
500
1K
2K 3K
5K
10K
0.2 0.3
t, TIME (ms)
Figure 4. Thermal Response
10
100
m
s
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
5
1ꢁms
breakdown. Safe operating area curves indicate I
−
V
C
CE
3
2
T =
150
°
C
J
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
d
5 ms
c
1
variable depending on conditions. Secondary breakdown
pulse limits are valid for duty cycles to 10% provided T
= 150
_
C; T
is
J(pk)
C
CURRENT LIMIT
0.5
SECONDARY BREAKDOWN
LIMIT
THERMAL LIMIT @
0.3
0.2
J(pk)
< 150
_
C. T
may be calculated from the data in Figure 4.
J(pk)
T
= 25
°
C (SINGLE PULSE)
At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the
limitations imposed by secondary breakdown.
C
0.1
1
2
3
5
10
20 30
50
100
V
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
CE
Figure 5. Maximum Forward Bias
Safe Operating Area
3
MJF122, MJF127
10,000
5000
300
200
T =
25
°
C
J
3000
2000
C
ob
1000
500
T
= 25
°
C
= 4 Vdc
CE
C
100
70
300
200
V
I
C
= 3 Adc
C
ib
100
50
30
20
50
PNP
NPN
PNP
NPN
10
30
0.1
1
2
5
10
20
50 100 200
500 1000
0.2
0.5
1
2
5
10
20
50 100
f, FREQUENCY (kHz)
V ,
REVERSE VOLTAGE (VOLTS)
R
Figure 6. Typical Small
−
Signal Current Gain
Figure 7. Typical Capacitance
NPN
PNP
MJF122
MJF127
20,000
10,000
5000
20,000
10,000
V
CE
= 4 V
V
CE
= 4 V
7000
5000
T =
150
°
C
J
T =
150
°
C
J
3000
2000
3000
2000
25
°
C
25
°
C
1000
500
1000
700
500
-ꢂ55
°
C
-ꢂ55
°
C
300
200
300
200
0.1
0.2 0.3
0.5 0.7
1
2
3
5
7
10
0.1
0.2 0.3
0.5 0.7
1
2
3
5
7
10
I ,
COLLECTOR CURRENT (AMP)
C
I ,
COLLECTOR CURRENT (AMP)
C
Figure 8. Typical DC Current Gain
3
2.6
2.2
1.8
1.4
1
3
T =
25
°
C
T =
25
°
C
J
J
2.6
I
= 2 A
I
= 2 A
6 A
4 A
4 A
C
C
6 A
2.2
1.8
1.4
1
0.3
0.5 0.7
1
2
3
5
7
10
20 30
0.3
0.5 0.7
1
2
3
5
7
10
20 30
I ,
BASE CURRENT (mA)
B
I ,
BASE CURRENT (mA)
B
Figure 9. Typical Collector Saturation Region
4
MJF122, MJF127
NPN
PNP
MJF122
MJF127
3
2.5
2
3
2.5
2
T =
25
°
C
J
T =
25
°
C
J
V
@ I
/I =
250
B
BE(sat)
C
1.5
1.5
V @
V =
4 V
BE CE
V
BE
@ V
= 4 V
CE
V
@ I
/I =
250
B
BE(sat)
C
1
1
V
@ I
/I =
250
C B
CE(sat)
V
@ I
/I =
250
B
CE(sat)
C
0.5
0.5
0.1
0.2 0.3
0.5 0.7
1
2
3
5
7
10
0.1
0.2 0.3
0.5 0.7
1
2
3
5
7
10
I ,
COLLECTOR CURRENT (AMP)
C
I ,
COLLECTOR CURRENT (AMP)
C
Figure 10. Typical “On” Voltages
+ 5
+ 5
+ 4
+ 3
+ 2
+ 1
*I /I
≤
h
FE 3
+ 4
C
B
*I /I
≤
h
C
B
FE 3
+ 3
+ 2
+ 1
0
25
°
C to 150
°
C
25
°
C to 150
°
C
– 55
°
C to 25
°
C
0
– 1
– 2
– 3
– 4
– 5
– 1
– 2
– 3
*
q
FOR V
VC
*
q
FOR V
VC
CE(sat)
CE(sat)
– 55
°
C to 25
°
C
25
°
C to 150
°
C
FOR V
q
FOR V
VB
BE
– 55
°
C to 25
°
C
25
°
C to 150
°
C
– 4
– 5
– 55
°
C to 25
°
C
q
VB
BE
0.1
0.2 0.3
0.5 0.7
1
2
3
5
7
10
0.1
0.2 0.3
0.5
1
2
3
5
7
10
I ,
COLLECTOR CURRENT (AMP)
C
I ,
COLLECTOR CURRENT (AMP)
C
Figure 11. Typical Temperature Coefficients
5
5
10
10
FORWARD
REVERSE
REVERSE
FORWARD
= 30 V
4
3
2
1
0
4
10
10
10
10
10
10
V
CE
= 30 V
V
CE
3
2
1
0
10
10
10
10
T =
150
°
C
J
T =
150
°
C
J
100
°
C
100
°
C
25
°
C
25
°
C
-1
-1
10
10
-ꢂ0.6 –
0.4 -ꢂ0.2
0
+ꢂ0.2 +ꢂ0.4
+ꢂ0.6 +ꢂ0.8
+ꢂ1 +ꢂ1.2
+ꢂ1.4
+ꢂ0.6 +ꢂ0.4
+ꢂ0.2
0
-ꢂ0.2 -ꢂ0.4 -ꢂ0.6 -ꢂ0.8
-ꢂ1 -ꢂ1.2
-ꢂ1.4
V ,
BASE-EMITTER VOLTAGE (VOLTS)
BE
V
BE
, BASE-EMITTER VOLTAGE (VOLTS)
Figure 12. Typical Collector Cut
−
Off Region
5
MJF122, MJF127
NPN
MJF122
PNP
MJF127
COLLECTOR
COLLECTOR
BASE
BASE
≈
8 k
≈
120
≈
8 k
≈
120
EMITTER
EMITTER
Figure 13. Darlington Schematic
TEST CONDITIONS FOR ISOLATION TESTS*
FULLY ISOLATED PACKAGE
LEADS
HEATSINK
0.110
,
MIN
Figure 14. Mounting Position
*Measurement made between leads and heatsink with all leads shorted together.
MOUNTING INFORMATION
4-40 SCREW
CLIP
PLAIN WASHER
HEATSINK
COMPRESSION WASHER
HEATSINK
NUT
Figure 15. Typical Mounting Techniques*
Laboratory tests on a limited number of samples indicate, when using the screw and compression washer mounting technique, a screw
.
torque of 6 to 8 in
lbs is sufficient to provide maximum power dissipation capability.
The compression washer helps to maintain a con-
stant pressure on the package over time and during large temperature excursions.
Destructive laboratory tests show that using a hex head 4
−
40 screw, without washers, and applying a torque in excess of 20 in
lbs will
.
cause the plastic to crack around the mounting hole, resulting in a loss of isolation capability.
.
Additional tests on slotted 4
−
40 screws indicate that the screw slot fails between 15 to 20 in
lbs without adversely affecting the pack-
age. However,
in order to positively ensure the package integrity of the fully isolated device, ON Semiconductor does not recommend
.
exceeding 10 in
lbs of mounting torque under any mounting conditions.
*
*
F
or more information about mounting power semiconductors see Application Note AN1040.
6
MJF122, MJF127
PACKAGE DIMENSIONS
TO
−
220
CASE 221D
−
03
ISSUE J
NOTES:
1. DIMENSIONING
AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING
DIMENSION: INCH
3. 221D-01
THRU 221D-02 OBSOLETE, NEW
STANDARD 221D-03.
SEATING
−
T
−
PLANE
−
B
−
C
F
S
Q
H
INCHES
DIM MIN
MAX
MILLIMETERS
U
MIN
15.67
9.96
4.50
0.60
2.95
MAX
16.12
10.63
4.90
1.00
3.28
A
A
B
C
D
F
0.617
0.392
0.177
0.024
0.116
0.635
0.419
0.193
0.039
0.129
1
2 3
−
Y
−
G
H
J
0.100 BSC
2.54 BSC
K
0.118
0.018
0.503
0.048
0.135
0.025
0.541
0.058
3.00
0.45
3.43
0.63
K
L
12.78
1.23
13.73
1.47
G
N
J
N
Q
R
S
U
0.200 BSC
5.08 BSC
R
0.122
0.099
0.092
0.239
0.138
0.117
0.113
0.271
3.10
2.51
2.34
6.06
3.50
2.96
2.87
6.88
L
D
3 PL
STYLE 2:
PIN 1.
BASE
M
M
0.25 (0.010)
B
Y
2. COLLECTOR
3. EMITTER
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).
SCILLC reserves the right to make changes without further notice
to any products herein.
SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.
All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
SCILLC does not convey any license under its patent rights
nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.
Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
SCILLC is an Equal
Opportunity/Affirmative Action Employer.
This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMEN
T
:
N. American Technical Support
: 800
−
282
−
9855
T
o
ll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81
−
3
−
5773
−
3850
Literature Distribution Center for ON Semiconductor
P
.
O. Box 5163, Denver, Colorado 80217 USA
Phone
: 303
−
675
−
2175 or 800
−
344
−
3860
T
o
ll Free USA/Canada
Fax
: 303
−
675
−
2176 or 800
−
344
−
3867
T
o
ll Free USA/Canada
Email
: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
MJF122/D
