onsemi-MJF15031G
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MJF15030 (NPN),
MJF15031 (PNP)
Complementary Power
Transistors
For Isolated Package Applications
Designed for general
−
purpose amplifier and switching applications,
where the mounting surface of the device is required to be electrically
isolated from the heatsink or chassis.
COMPLEMENTARY SILICON
POWER TRANSISTORS
8 AMPERES
Features
•
Electrically Similar to the Popular MJE15030 and MJE15031
•
No Isolating Washers Required, Reduced System Cost
•
High Current Gain
−
Bandwidth Product
150 VOLTS, 36 WATTS
•
UL Recognized, File #E69369, to 3500 V
Isolation
RMS
NPN
PNP
•
These Devices are Pb
−
Free and are RoHS Compliant*
COLLECTOR 2, 4
COLLECTOR 2, 4
MAXIMUM RATINGS
Rating
Collector
−
Emitter Voltage
Collector
−
Base Voltage
Emitter
−
Base Voltage
Symbol
Value
150
150
5
Unit
Vdc
Vdc
Vdc
1
1
V
CEO
BASE
BASE
V
CB
V
EB
EMITTER 3
EMITTER 3
V
V
RMS
ISOL
4500
MARKING
DIAGRAM
A
Per Figure 11
Collector Current
−
Continuous
Collector Current
−
Peak
Base Current
I
C
8
16
2
Adc
Adc
Adc
I
CM
I
B
P
36
W
C
D
0.286
W/
_
C
Derate above 25
_
C
TO
−
220 FULLPACK
CASE 221D
STYLE 2
MJF1503xG
AYWW
T
o
tal Power Dissipation @ T
= 25
_
C
P
D
2.0
0.016
W
A
1
Derate above 25
_
C
W/
_
C
2
3
Operating and Storage
T
e
mperature Range
THERMAL CHARACTERISTICS
T , T
J
–
6
5 to +150
_
C
stg
Characteristic
Symbol
Max
62.5
3.5
Unit
_
C/W
_
C/W
_
C
Thermal Resistance, Junction
−
to
−
Ambient
Lead
T
e
mperature for Soldering Purposes
R
q
JA
R
q
JC
MJF1503x = Specific Device Code
x =
0 or 1
T
L
260
G
A
Y
= Pb
−
Free Package
= Assembly Location
=
Y
e
ar
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Proper
strike and creepage distance must be provided.
2. Measurement
made with thermocouple contacting the bottom insulated
surface (in a location beneath the die), the devices mounted on a heatsink with
thermal grease and a mounting torque of
≥
6 in. lbs.
WW
= Work Week
ORDERING INFORMATION
Device
MJF15030G
Package
Shipping
TO
−
220 FULLPACK
50 Units/Rail
(Pb
−
Free)
MJF15031G TO
−
220 FULLPACK
50 Units/Rail
(Pb
−
Free)
*For additional information on our Pb
−
Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting
T
e
chniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
September, 2013
−
Rev. 8
MJF15030/D
MJF15030 (NPN), MJF15031 (PNP)
ELECTRICAL CHARACTERISTICS
(T =
25
_
C unless otherwise noted)
C
Characteristic
Symbol
Min
Max
Unit
OFF CHARACTERISTICS
(I =
10 mAdc, I
= 0)
V
150
−
−
Vdc
CEO(sus)
C
B
Collector Cutoff Current
(V =
150 Vdc, I
= 0)
I
I
10
10
10
m
Adc
m
Adc
m
Adc
CEO
CE
B
Collector Cutoff Current
(V =
150 Vdc, I
= 0)
−
CBO
CB
E
Emitter Cutoff Current
(V =
5 Vdc, I
= 0)
I
−
EBO
BE
C
DC Current Gain
(I =
0.1 Adc, V
= 2 Vdc)
h
40
40
40
20
−
−
−
−
−
C
CE
FE
FE
(I =
2 Adc, V
= 2 Vdc)
C
CE
(I =
3 Adc, V
= 2 Vdc)
C
CE
(I =
4 Adc, V
= 2 Vdc)
C
CE
Typ
DC Current Gain Linearity
h
2
3
(V from
2 V to 20
V
, I
f
rom 0.1 A to 3 A) (NPN to PNP)
CE
C
Collector
−
Emitter Saturation Voltage
(I =
1 Adc, I
= 0.1 Adc)
V
−
−
0.5
1
Vdc
Vdc
CE(sat)
C
B
Base
−
Emitter On Voltage
(I =
1 Adc, V
= 2 Vdc)
V
BE(on)
C
CE
DYNAMIC CHARACTERISTICS
f
T
30
−
MHz
(I =
500 mAdc, V
= 10 Vdc, f
= 10 MHz)
C
CE
test
3. Pulse
T
e
st: Pulse Width
v
300
m
s, Duty Cycle
v
2%.
4. f =
⎪
h
⎪•
f .
test
T
fe
1
0.5
0.3
0.2
SINGLE PULSE
0.1
R
T
= r(t) R
q
JC
q
JC(t)
– T
= P
C
R (t)
q
JC
J(pk)
(pk)
0.05
0.03
0.02
0.01
0.1
0.2 0.3
0.5
1
2
3
5
10
20 30
50
100
200 300
500
1K
2K 3K
5K
10K
t, TIME (ms)
Figure 1. Thermal Response
2
MJF15030 (NPN), MJF15031 (PNP)
20
10
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I
−
V
limits of the transistor that must be observed for reliable
operation, i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
100
m
s
C
CE
5
5 ms
3
2
dc
1
= 150
_
C;
J(pk)
0.5
0.3
0.2
T is
variable depending on conditions. Second breakdown
C
WIREBOND LIMIT
THERMAL LIMIT
SECONDARY BREAKDOWN
pulse limits are valid for duty cycles to 10% provided T
J(pk)
< 150
_
C.
T
may be calculated from the data in
0.1
J(pk)
Figure 1. At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the
limitations imposed by second breakdown.
0.05
LIMIT @ T
= 25
°
C
C
0.03
0.02
2
3
5
7
10
20 30
50 70
100 150200
V
CE
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 2. Forward Bias Safe Operating Area
1000
8
C
(NPN)
(PNP)
ib
500
200
C
ib
5
3
100
50
C
(PNP)
(NPN)
ob
V
= 9 V
BE(off)
I /I
= 10
B
C
2
30
20
5 V
3 V
C
ob
T
= 25
°
C
C
1
0
1.5 V
0 V
10
1.5
3
5
7
10
30
50
100 150
0
100 110 120 130 140 150
V ,
REVERSE VOLTAGE (VOLTS)
R
V
CE
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 3. Reverse Bias Switching Safe
Operating Area
Figure 4. Capacitances
100
100
90
(PNP)
(NPN)
50
30
20
60
50
PNP
V
CE
= 10 V
I
= 0.5 A
= 25
°
C
C
NPN
T
C
10
5
20
10
0
0.5
1
2
3
5
7
10
0.1
0.5
1
2
5
10
0.7
0.2
f, FREQUENCY (MHz)
I ,
COLLECTOR CURRENT (AMP)
C
Figure 5. Small
−
Signal Current Gain
Figure 6. Current Gain — Bandwidth Product
3
MJF15030 (NPN), MJF15031 (PNP)
DC CURRENT GAIN
1K
1K
V
CE
= 2 V
500
200
500
V
CE
= 2 V
T =
150
°
C
J
T =
150
°
C
J
200
150
T =
25
°
C
J
T =
25
°
C
J
100
70
100
50
T =
-ꢀ55
°
C
J
T =
-ꢀ55
°
C
J
50
30
20
20
10
10
0.1
0.2
0.5
1
2
5
10
0.1
0.2
0.5
1
2
5
10
I ,
COLLECTOR CURRENT (AMP)
C
I ,
COLLECTOR CURRENT (AMP)
C
Figure 7a. MJF15030 NPN
Figure 7b. MJF15031 PNP
“ON” VOLTAGE
1.8
1.4
1
T =
25
°
C
J
1.6
1.2
1
V
@ I
/I =
10
B
BE(sat)
C
0.8
0.4
0
V
@ I
/I =
10
BE(sat) C
B
0.6
0.2
V
BE(on)
@ V
= 2 V
CE
V
@ I
/I =
20
C B
CE(sat)
V
@ I
/I =
20
C B
CE(sat)
V
@ I
/I =
20
C B
BE(sat)
I /I
= 10
B
C
I /I
= 10
C B
0.1
0.5
1
2
5
10
0.1
0.5
1
2
5
10
0.2
0.2
I ,
COLLECTOR CURRENT (AMP)
C
I ,
COLLECTOR CURRENT (AMP)
C
Figure 8a. MJF15030 NPN
Figure 8b. MJF15031 PNP
1
10
V
= 80 V
V
= 80 V
CC
CC
I /I
= 10
I /I
= 10, I
= I
C B1
B2
0.5
5
3
2
B
C
B
t (NPN) T =
25
°
C
s
T =
25
°
C
J
J
t (NPN,
PNP)
d
0.2
0.1
t (PNP)
s
t (PNP)
r
1
0.05
0.5
t (PNP)
f
t (NPN)
r
0.03
0.02
0.2
0.1
t (NPN)
f
0.01
0.1
0.2
0.5
1
2
5
10
0.1
0.2 0.3
0.5
1
2
5
10
I ,
COLLECTOR CURRENT (AMP)
C
I ,
COLLECTOR CURRENT (AMP)
C
Figure 9. Turn
−
On Times
Figure 10. Turn
−
Off Times
4
MJF15030 (NPN), MJF15031 (PNP)
TEST CONDITIONS FOR ISOLATION TESTS*
FULLY ISOLATED PACKAGE
LEADS
HEATSINK
0.110
,
MIN
Figure 11. Mounting Position
*Measurement made between leads and heatsink with all leads shorted together.
MOUNTING INFORMATION
4-40 SCREW
CLIP
PLAIN WASHER
HEATSINK
COMPRESSION WASHER
NUT
HEATSINK
Figure 12. Typical Mounting Techniques*
Laboratory tests on a limited number of samples indicate, when using the screw and compression washer mounting technique, a screw torque of 6 to
.
8 in
lbs is sufficient to provide maximum power dissipation capability.
The compression washer helps to maintain a constant pressure on the package
over time and during large temperature excursions.
Destructive laboratory tests show that using a hex head 4
−
40 screw, without washers, and applying a torque in excess of 20 in
lbs will cause the
.
plastic to crack around the mounting hole, resulting in a loss of isolation capability.
Additional tests on slotted 4
−
40 screws indicate that the screw slot fails between 15 to 20 in
lbs without adversely affecting the package.
However,
in order to positively ensure the package integrity of the fully isolated device, ON Semiconductor does not recommend exceeding 10 in
lbs of mount-
.
.
ing torque under any mounting conditions.
*
*
F
or more information about mounting power semiconductors see Application Note AN1040.
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO
−
220 FULLPAK
CASE 221D
−
03
ISSUE K
DATE 27 FEB 2009
NOTES:
1. DIMENSIONING
AND TOLERANCING PER ANSI
Y14.5M, 1982.
SEATING
−
T
−
PLANE
−
B
−
C
2. CONTROLLING
DIMENSION: INCH
3. 221D-01
THRU 221D-02 OBSOLETE, NEW
STANDARD 221D-03.
F
S
Q
INCHES
DIM MIN
MAX
MILLIMETERS
U
SCALE 1:1
MIN
15.67
9.96
4.50
0.60
2.95
MAX
16.12
10.63
4.90
A
B
C
D
F
0.617
0.392
0.177
0.024
0.116
0.635
0.419
0.193
0.039
0.129
A
1
2 3
1.00
3.28
H
G
H
J
0.100 BSC
2.54 BSC
−
Y
−
K
0.118
0.018
0.503
0.048
0.135
0.025
0.541
0.058
3.00
0.45
3.43
0.63
K
L
12.78
1.23
13.73
1.47
G
N
J
N
Q
R
S
U
0.200 BSC
5.08 BSC
R
0.122
0.099
0.092
0.239
0.138
0.117
0.113
0.271
3.10
2.51
2.34
6.06
3.50
2.96
2.87
6.88
L
D
3 PL
M
M
0.25 (0.010)
B
Y
MARKING
DIAGRAMS
STYLE 1:
PIN 1.
GATE
2. DRAIN
STYLE 2:
PIN 1.
BASE
STYLE 3:
PIN 1.
ANODE
2. COLLECTOR
3. EMITTER
2. CATHODE
3. ANODE
3. SOURCE
AYWW
xxxxxxG
AKA
STYLE 4:
STYLE 5:
STYLE 6:
PIN 1.
MT 1
2. MT
2
xxxxxxG
AYWW
PIN 1.
CATHODE
2. ANODE
3. CATHODE
PIN 1.
CATHODE
2. ANODE
3. GATE
3. GATE
Bipolar
Rectifier
A
Y
WW
= Assembly Location
=
Y
e
ar
= Work Week
xxxxxx =
Specific Device Code
G
= Pb
−
Free Package
= Assembly Location
=
Y
e
ar
A
Y
xxxxxx =
Device Code
G
AKA
= Pb
−
Free Package
= Polarity Designator
WW
= Work Week
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42514B
TO
−
220 FULLPAK
PAGE 1 OF 1
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