onsemi-MMUN2135LT1G

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onsemi-MMUN2135LT1G
MUN2135, MMUN2135L,  
MUN5135, DTA123JE,  
DTA123JM3, NSBA123JF3  
Digital
T
r
ansistors (BRT)  
R1 = 2.2 k
W
, R2 = 47 k
W  
PNP Transistors with Monolithic Bias  
Resistor Network  
PIN CONNECTIONS  
PIN 3  
COLLECTOR  
(OUTPUT)  
This series of digital transistors is designed to replace a single  
device and its external resistor bias network. The Bias Resistor  
Transistor (BRT) contains a single transistor with a monolithic bias  
network consisting of two resistors; a series base resistor and a  
base−emitter resistor. The BRT eliminates these individual  
components by integrating them into a single device. The use of a BRT  
can reduce both system cost and board space.  
PIN 1  
BASE  
(INPUT)  
R1  
R2  
PIN 2  
EMITTER  
(GROUND)  
Features  
MARKING DIAGRAMS  
•
Simplifies Circuit Design  
•
Reduces Board Space  
•
Reduces Component Count  
•
S and NSV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AEC−Q101  
Qualified and PPAP Capable  
SC−59  
CASE 318D  
STYLE 1  
XX M
G  
G
1
•
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS  
SOT−23  
CASE 318  
STYLE 6  
XXX M
G  
Compliant  
G
1
MAXIMUM RATINGS
(T =
 
25
°
C)  
A
Rating  
Collector−Base Voltage  
Collector−Emitter Voltage  
Collector Current − Continuous  
Input Forward Voltage  
Symbol  
Max  
50  
Unit  
Vdc  
SC−70/SOT−323  
CASE 419  
XX M
G  
V
CBO  
CEO  
G
STYLE 3  
V
50  
Vdc  
1
I
C
100  
12  
mAdc  
Vdc  
SC−75  
CASE 463  
STYLE 1  
XX M  
XX M  
V
IN(fwd)  
Input Reverse Voltage  
V
IN(rev)  
5
Vdc  
1
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
SOT−723  
CASE 631AA  
STYLE 1  
1
SOT−1123  
CASE 524AA  
STYLE 1  
X M  
1
XXX  
M
G
=
=
=
Specific Device Code  
Date Code*  
Pb−Free Package  
(Note: Microdot may be in either location)  
*Date Code orientation may vary depending up-  
on manufacturing location.  
ORDERING INFORMATION  
See detailed ordering, marking, and shipping information in  
the

of this data sheet.  
©
Semiconductor Components Industries, LLC, 2012  
1
Publication Order Number:  
April, 2017 − Rev. 5  
DTA123J/D  

MUN2135, MMUN2135L, MUN5135, DTA123JE, DTA123JM3, NSBA123JF3  
Table 1. ORDERING INFORMATION  
†
Device  
Part Marking  
Package  
Shipping  
MUN2135T1G  
6R  
SC−59  
(Pb−Free)  
3000 /
T
a
pe & Reel  
3000 /
T
a
pe & Reel  
3000 /
T
a
pe & Reel  
3000 /
T
a
pe & Reel  
8000 /
T
a
pe & Reel  
8000 /
T
a
pe & Reel  
MMUN2135
L
T
1G,  
NSVMMUN2135
L
T
1G*  
ACA  
6M  
SOT−23  
(Pb−Free)  
MUN5135T1G  
SC−70/SOT−323  
(Pb−Free)  
DTA123JET1G  
6M  
SC−75  
(Pb−Free)  
DTA123JM3T5G,  
NSVDTA123JM3T5G*  
6M  
SOT−723  
(Pb−Free)  
NSBA123JF3T5G  
J (90
°
)**  
SOT−1123  
(Pb−Free)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging  
Specifications Brochure, BRD8011/D.  
*S and NSV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and  
PPAP Capable.  
**(XX
°
) = Degree rotation in the clockwise direction.  
300  
250  
(1) SC−75 and SC−70/SOT323; Minimum Pad  
200  
(2) SC−59; Minimum Pad  
(1) (2)
 
(3) (4)
 
(5)  
(3) SOT−23; Minimum Pad  
(4) SOT−1123; 100 mm
 
, 1 oz. copper trace  
(5) SOT−723; Minimum Pad  
2
150  
100  
50  
0
−50 −25  
0
25  
50  
75  
100  
125 150  
AMBIENT TEMPERATURE (
°
C)  
Figure 1. Derating Curve  
2

MUN2135, MMUN2135L, MUN5135, DTA123JE, DTA123JM3, NSBA123JF3  
Table 2. THERMAL CHARACTERISTICS  
Characteristic  
THERMAL CHARACTERISTICS (SC−59) (MUN2135)  
T
o
tal Device Dissipation  
Symbol  
Max  
Unit  
P
D
T =
 
25
°
C  
A
230  
338  
1.8  
2.7  
mW  
Derate above 25
°
C  
mW/
°
C  
Thermal Resistance,  
Junction to Ambient  
R
540  
370  
°
C/W  
°
C/W  
°
C  
q
JA  
Thermal Resistance,  
Junction to Lead  
R
264  
287  
q
JL  
Junction and Storage
T
e
mperature Range  
THERMAL CHARACTERISTICS (SOT−23) (MMUN2135L)  
T
o
tal Device Dissipation  
T , T  
J
−55 to +150  
stg  
P
D
T =
 
25
°
C  
246  
400  
2.0  
3.2  
mW  
A
Derate above 25
°
C  
mW/
°
C  
Thermal Resistance,  
Junction to Ambient  
(Note 1)  
R
R
508  
311  
°
C/W  
°
C/W  
°
C  
q
JA  
Thermal Resistance,  
Junction to Lead  
174  
208  
q
JL  
Junction and Storage
T
e
mperature Range  
THERMAL CHARACTERISTICS (SC−70/SOT−323) (MUN5135)  
T
o
tal Device Dissipation  
T , T  
J
−55 to +150  
stg  
P
D
T =
 
25
°
C  
202  
310  
1.6  
2.5  
mW  
A
Derate above 25
°
C  
mW/
°
C  
Thermal Resistance,  
Junction to Ambient  
R
R
618  
403  
°
C/W  
°
C/W  
°
C  
q
JA  
Thermal Resistance,  
Junction to Lead  
280  
332  
q
JL  
Junction and Storage
T
e
mperature Range  
THERMAL CHARACTERISTICS (SC−75) (DTA123JE)  
T
o
tal Device Dissipation  
T , T  
J
−55 to +150  
stg  
P
D
T =
 
25
°
C  
200  
300  
1.6  
2.4  
mW  
A
Derate above 25
°
C  
mW/
°
C  
Thermal Resistance,  
Junction to Ambient  
R
600  
400  
°
C/W  
°
C  
q
JA  
Junction and Storage
T
e
mperature Range  
T , T  
J
−55 to +150  
stg  
THERMAL CHARACTERISTICS (SOT−723) (DTA123JM3)  
T
o
tal Device Dissipation  
T =
 
25
°
C  
A
P
D
260  
600  
2.0  
4.8  
mW  
Derate above 25
°
C  
mW/
°
C  
Thermal Resistance,  
Junction to Ambient  
R
480  
205  
°
C/W  
°
C  
q
JA  
Junction and Storage
T
e
mperature Range  
T , T  
J
−55 to +150  
stg  

1.

FR−4 @ Minimum Pad.  

2.

FR−4 @ 1.0 x 1.0 Inch Pad.  
2

3.

FR−4 @ 100 mm
 
, 1 oz. copper traces, still air.  
2

4.

FR−4 @ 500 mm
 
, 1 oz. copper traces, still air.  
3
 

MUN2135, MMUN2135L, MUN5135, DTA123JE, DTA123JM3, NSBA123JF3  
Characteristic  
THERMAL CHARACTERISTICS (SOT−1123) (NSBA123JF3)  
T
o
tal Device Dissipation  
Symbol  
Max  
Unit  
P
D
T =
 
25
°
C  
A
254  
297  
2.0  
2.4  
mW  
Derate above 25
°
C  
mW/
°
C  
Thermal Resistance,  
Junction to Ambient  
R
493  
421  
°
C/W  
q
JA  
Thermal Resistance, Junction to Lead  
R
193  
°
C/W  
°
C  
q
JL  
Junction and Storage
T
e
mperature Range  
T , T  
J
−55 to +150  
stg  
1. FR−4
 
@ Minimum Pad.  
2. FR−4
 
@ 1.0 x 1.0 Inch Pad.  
2
3. FR−4
 
@ 100 mm
 
, 1 oz. copper traces, still air.  
2
4. FR−4
 
@ 500 mm
 
, 1 oz. copper traces, still air.  
Table 3. ELECTRICAL CHARACTERISTICS
(T =
 
25
°
C, unless otherwise noted)  
A
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Collector−Base Cutoff Current  
I
I
nAdc  
nAdc  
mAdc  
Vdc  
CBO  
(V =
 
50
V
, I
 
=
0
)  
−
−
−
−
−
−
−
100  
500  
0.2  
−
CB  
E
Collector−Emitter Cutoff Current  
(V =
 
50
V
, I
 
=
0
)  
CEO  
CE  
B
Emitter−Base Cutoff Current  
(V =
 
6.0
V
, I
 
=
0
)  
I
EBO  
−
EB  
C
Collector−Base Breakdown Voltage  
(I =
 
10
m
A, I
 
= 0)  
V
V
(BR)CBO  
(BR)CEO  
50  
50  
C
E
Collector−Emitter Breakdown V

(I =
 
2.0 mA, I
 
= 0)  
Vdc  
−
C
B
ON CHARACTERISTICS  
DC Current Gain (Note 5)  
h
FE  
(I =
 
5.0 mA, V
 
= 10 V)  
80  
−
140  
−
−
0.25  
0.5  
−
C
CE  
Collector
*
Emitter Saturation V

(I =
 
10 mA, I
 
= 0.3 mA)  
V
Vdc  
Vdc  
Vdc  
Vdc  
Vdc  
k
W  
CE(sat)  
C
B
Input Voltage (off)  
(V =
 
5.0
V
, I
 
=
1
00
m
A)  
V
i(off)  
V
i(on)  
−
0.6  
0.8  
−
CE  
C
Input Voltage (on)  
(V =
 
0.3
V
, I
 
=
5
.0 mA)  
1.1  
−
CE  
C
Output Voltage (on)  
(V =
 
5.0
V
, V
 
=
2
.5
V
, R
 
=
1
.0 k
W
)  
V
OL  
0.2  
CC  
B
L
Output Voltage (off)  
V
OH  
(V =
 
5.0
V
, V
 
=
0
.5
V
, R
 
=
1
.0 k
W
)  
4.9  
1.5  
−
−
CC  
B
L
Input Resistor  
Resistor Ratio  
R1  
R /R  
2.2  
2.9  
0.038  
0.047  
0.056  
1
2
5. Pulsed
 
Condition: Pulse Width = 300 msec, Duty Cycle
v
2%.  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
4
 

MUN2135, MMUN2135L, MUN5135, DTA123JE, DTA123JM3, NSBA123JF3  
TYPICAL CHARACTERISTICS  
MUN2135, MMUN2135L, MUN5135, DTA123JE, DTA123JM3  
1000  
1
V
CE  
= 10 V  
I /I
 
= 10  
C
B
25
°
C  
100  
150
°
C  
25
°
C  
−55
°
C  
150
°
C  
0.1  
10  
1
−55
°
C  
0.01  
0
10  
20  
30  
40  
50  
1
10  
100  
I ,
 
COLLECTOR CURRENT (mA)  
C
I ,
 
COLLECTOR CURRENT (mA)  
C
Figure 2. V

CE(sat)

vs. I

C  

Figure 3. DC Current Gain  
7
6
5
4
3
2
1
100  
10  
1
f = 10 kHz  
= 0 A  
T =
 
25
°
C  
A
150
°
C  
−55
°
C  
I
E
25
°
C  
0.1  
0.01  
V
O
= 5 V  
0.001  
0
0
10  
20  
30  
40  
50  
0
1
2
3
4
V ,
 
REVERSE BIAS VOLTAGE (V)  
R
V ,
 
INPUT VOLTAGE (V)  
in  
Figure 4. Output Capacitance  
Figure 5. Output Current vs. Input Voltage  
10  
25
°
C  
1
−55
°
C  
150
°
C  
V
O
= 0.2 V  
0.1  
0
10  
20  
30  
40  
50  
I ,
 
COLLECTOR CURRENT (mA)  
C
Figure 6. Input Voltage vs. Output Current  
5

MUN2135, MMUN2135L, MUN5135, DTA123JE, DTA123JM3, NSBA123JF3  
TYPICAL CHARACTERISTICS  
NSBA123JF3  
1000  
1
V
CE  
= 10 V  
I /I
 
= 10  
C
B
150
°
C  
25
°
C  
25
°
C  
100  
150
°
C  
−55
°
C  
0.1  
10  
1
−55
°
C  
0.01  
0
10  
20  
30  
40  
50  
0.1  
1
10  
100  
I ,
 
COLLECTOR CURRENT (mA)  
C
I ,
 
COLLECTOR CURRENT (mA)  
C
Figure 7. V

CE(sat)

vs. I

C  

Figure 8. DC Current Gain  
7
6
5
4
3
2
1
100  
10  
1
f = 10 kHz  
= 0 A  
T =
 
25
°
C  
A
150
°
C  
I
E
−55
°
C  
25
°
C  
0.1  
0.01  
V
O
= 5 V  
0.001  
0
0
10  
20  
30  
40  
50  
0
1
2
3
V ,
 
REVERSE BIAS VOLTAGE (V)  
R
V ,
 
INPUT VOLTAGE (V)  
in  
Figure 9. Output Capacitance  
Figure 10. Output Current vs. Input Voltage  
100  
10  
25
°
C  
−55
°
C  
150
°
C  
1
V
O
= 0.2 V  
0.1  
0
10  
20  
30  
40  
50  
I ,
 
COLLECTOR CURRENT (mA)  
C
Figure 11. Input Voltage vs. Output Current  
6

MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
SOT
−
23 (TO
−
236)  
CASE 318
−
08  
ISSUE AS  
DATE 30 JAN 2018  
SCALE 4:1  
NOTES:  
D
1. DIMENSIONING
 
AND TOLERANCING PER ASME Y14.5M, 1994.  
2. CONTROLLING
 
DIMENSION: MILLIMETERS.  
3. MAXIMUM
 
LEAD THICKNESS INCLUDES LEAD FINISH.  
MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF  
THE BASE MATERIAL.  
0.25  
3
4. DIMENSIONS
 
D AND E DO NOT INCLUDE MOLD FLASH,  
PROTRUSIONS, OR GATE BURRS.  
T
H
E
E
1
2
MILLIMETERS  
INCHES  
DIM  
A
A1  
b
c
D
E
e
L
MIN  
0.89  
0.01  
0.37  
0.08  
2.80  
1.20  
1.78  
0.30  
0.35  
2.10  
0
°
 
NOM  
1.00  
0.06  
0.44  
0.14  
2.90  
1.30  
1.90  
0.43  
0.54  
2.40  
−−−  
MAX  
MIN  
0.035  
0.000  
0.015  
0.003  
0.110  
0.047  
0.070  
0.012  
0.014  
0.083  
0
°  
NOM  
0.039  
0.002  
0.017  
0.006  
0.114  
0.051  
0.075  
0.017  
0.021  
0.094  
−−−  
MAX  
0.044  
0.004  
0.020  
0.008  
0.120  
0.055  
0.080  
0.022  
0.027  
0.104  
10
°  
L
1.11  
0.10  
0.50  
0.20  
3.04  
1.40  
2.04  
0.55  
0.69  
2.64  
10
°  
3X  
b
L1  
VIEW C  
e
TOP VIEW  
L1  
A
H
E
T
c
A1  
SEE VIEW C  
SIDE VIEW  
GENERIC  
MARKING DIAGRAM*  
END VIEW  
RECOMMENDED  
SOLDERING FOOTPRINT  
XXXM
G  
G
1
3X  
0.90  
XXX = Specific Device Code  
2.90  
M
= Date Code  
G
= Pb
−
Free Package  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
Pb
−
Free indicator, “G” or microdot “
G
”,  
may or may not be present.  
3X  
0.95  
0.80  
PITCH  
DIMENSIONS: MILLIMETERS  
STYLE 1 THRU 5:  
CANCELLED  
STYLE 6:  
STYLE 7:  
PIN 1.
 
EMITTER  
2. BASE  
STYLE 8:  
PIN 1.
 
BASE  
2. EMITTER  
3. COLLECTOR  
PIN 1.
 
ANODE  
2. NO
 
CONNECTION  
3. CATHODE  
3. COLLECTOR  
STYLE 9:  
PIN 1.
 
ANODE  
2. ANODE  
STYLE 10:  
STYLE 11:  
STYLE 12:  
STYLE 13:  
PIN 1.
 
SOURCE  
2. DRAIN  
STYLE 14:  
PIN 1.
 
CATHODE  
2. GATE  
PIN 1.
 
DRAIN  
2. SOURCE  
3. GATE  
PIN 1.
 
ANODE  
PIN 1.
 
CATHODE  
2. CATHODE  
3. ANODE  
2. CATHODE  
3. CATHODE
−
ANODE  
3. CATHODE  
3. GATE  
3. ANODE  
STYLE 15:  
STYLE 16:  
STYLE 17:  
PIN 1.
 
NO CONNECTION  
2. ANODE  
STYLE 18:  
STYLE 19:  
STYLE 20:  
PIN 1.
 
GATE  
2. CATHODE  
3. ANODE  
PIN 1.
 
ANODE  
2. CATHODE  
3. CATHODE  
PIN 1.
 
NO CONNECTION
 
PIN 1.
 
CATHODE  
PIN 1.
 
CATHODE  
2. ANODE  
3. GATE  
2. CATHODE  
3. ANODE  
2. ANODE  
3. CATHODE
−
ANODE  
3. CATHODE  
STYLE 21:  
STYLE 22:  
STYLE 23:  
PIN 1.
 
ANODE  
2. ANODE  
STYLE 24:  
STYLE 25:  
STYLE 26:  
PIN 1.
 
GATE  
2. SOURCE  
3. DRAIN  
PIN 1.
 
RETURN  
2. OUTPUT  
3. INPUT  
PIN 1.
 
GATE  
2. DRAIN  
PIN 1.
 
ANODE  
2. CATHODE  
3. GATE  
PIN 1.
 
CATHODE  
2. ANODE  
3. SOURCE  
3. NO
 
CONNECTION  
3. CATHODE  
STYLE 27:  
STYLE 28:  
PIN 1.
 
CATHODE  
2. CATHODE  
3. CATHODE  
PIN 1.
 
ANODE  
2. ANODE  
3. ANODE  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions
 
are uncontrolled
 
except when stamped
 
“CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASB42226B  
SOT
−
23 (TO
−
236)  
PAGE 1 OF 1  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically  
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the  
rights of others.  
©
Semiconductor Components Industries, LLC, 2019  

MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
SC
−
59  
CASE 318D
−
04  
ISSUE H  
DATE 28 JUN 2012  
SCALE 2:1  
D
NOTES:  
1. DIMENSIONING
 
AND TOLERANCING PER ANSI Y14.5M, 1982.  
2. CONTROLLING
 
DIMENSION: MILLIMETER.  
MILLIMETERS  
INCHES  
3
DIM  
A
A1  
b
c
D
E
e
L
MIN  
1.00  
0.01  
0.35  
0.09  
2.70  
1.30  
1.70  
0.20  
2.50  
NOM  
1.15  
0.06  
0.43  
0.14  
2.90  
1.50  
1.90  
0.40  
2.80  
MAX  
MIN  
NOM  
0.045  
0.002  
0.017  
0.005  
0.114  
0.059  
0.075  
0.016  
0.110  
MAX  
0.051  
0.004  
0.020  
0.007  
0.122  
0.067  
0.083  
0.024  
0.118  
E
1.30  
0.10  
0.50  
0.18  
3.10  
1.70  
2.10  
0.60  
3.00  
0.039  
0.001  
0.014  
0.003  
0.106  
0.051  
0.067  
0.008  
0.099  
H
E
1
2
b
e
H
E
C
GENERIC  
MARKING DIAGRAM  
A
L
A1  
XXX M
G  
G
SOLDERING FOOTPRINT*  
1
0.95  
0.037  
0.95  
0.037  
XXX  
M
= Specific Device Code  
= Date Code  
G
= Pb
−
Free Package*  
(*Note: Microdot may be in either location)  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
Pb
−
Free indicator, “G” or microdot “
G
”,  
may or may not be present.  
2.4  
0.094  
1.0  
0.039  
STYLE 1:  
PIN 1.
 
BASE  
2. EMITTER  
3. COLLECTOR  
STYLE 2:  
PIN 1.
 
ANODE  
2. N.C.  
STYLE 3:  
PIN 1.
 
ANODE  
2. ANODE  
0.8  
mm  
inches  
3. CATHODE  
3. CATHODE  
ǒ
Ǔ
SCALE 10:1  
0.031  
*For additional information on our Pb
−
Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.  
STYLE 4:  
STYLE 5:  
STYLE 6:  
PIN 1.
 
CATHODE  
2. N.C.  
3. ANODE  
PIN 1.
 
CATHODE  
2. CATHODE  
3. ANODE  
PIN 1.
 
ANODE  
2. CATHODE  
3. ANODE/CATHODE  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions
 
are uncontrolled
 
except when stamped
 
“CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASB42664B  
SC
−
59  
PAGE 1 OF 1  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically  
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the  
rights of others.  
©
Semiconductor Components Industries, LLC, 2019  

MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
SC
−
70 (SOT
−
323)  
CASE 419  
ISSUE R  
DATE 11 OCT 2022  
SCALE 4:1  
GENERIC  
MARKING DIAGRAM  
XX M
G  
G
1
XX  
M
G
= Specific Device Code  
= Date Code  
= Pb
−
Free Package  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
Pb
−
Free indicator, “G” or microdot “
G
”, may  
or may not be present. Some products may  
not follow the Generic Marking.  
STYLE 1:  
STYLE 2:  
PIN 1.
 
ANODE  
2. N.C.  
3. CATHODE  
STYLE 3:  
PIN 1.
 
BASE  
2. EMITTER  
3. COLLECTOR  
STYLE 4:  
STYLE 5:  
PIN 1.
 
ANODE  
2. ANODE  
3. CATHODE  
CANCELLED  
PIN 1.
 
CATHODE  
2. CATHODE  
3. ANODE  
STYLE 6:  
STYLE 7:  
PIN 1.
 
BASE  
STYLE 8:  
PIN 1.
 
GATE  
2. SOURCE  
3. DRAIN  
STYLE 9:  
STYLE 10:  
STYLE 11:  
PIN 1.
 
EMITTER  
PIN 1.
 
ANODE  
PIN 1.
 
CATHODE  
2. ANODE  
PIN 1.
 
CATHODE  
2. CATHODE  
2. BASE  
2. EMITTER  
2. CATHODE  
3. COLLECTOR  
3. COLLECTOR  
3. CATHODE-ANODE  
3. ANODE-CATHODE  
3. CATHODE  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions
 
are uncontrolled
 
except when stamped
 
“CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASB42819B  
SC
−
70 (SOT
−
323)  
PAGE 1 OF 1  
onsemi
and  
are trademarks of Semiconductor Components Industries, LLC dba
onsemi
or its subsidiaries in the United States and/or other countries.
onsemi
reserves  
the right to make changes without further notice to any products herein.
onsemi
makes no warranty, representation or guarantee regarding the suitability of its products for any particular  
purpose, nor does
onsemi
assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation  
special, consequential or incidental damages.
onsemi
does not convey any license under its patent rights nor the rights of others.  
©
Semiconductor Components Industries, LLC, 2019  

MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
SC
−
75/SOT
−
416  
CASE 463
−
01  
ISSUE G  
3
2
1
DATE 07 AUG 2015  
SCALE 4:1  
NOTES:  
−
E
−  
1. DIMENSIONING
 
AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING
 
DIMENSION: MILLIMETER.  
2
MILLIMETERS  
DIM MIN
 
NOM MAX  
0.70  
A1
0.00  
INCHES  
NOM MAX  
MIN  
3
e
−
D
−  
A
0.80  
0.05  
0.90 0.027
 
0.031 0.035  
0.10 0.000
 
0.002 0.004  
0.30 0.006
 
0.008 0.012  
0.25 0.004
 
0.006 0.010  
1.65 0.061
 
0.063 0.065  
0.90 0.027
 
0.031 0.035  
0.04 BSC  
1
b
C
D
E
e
0.15  
0.10  
1.55  
0.70  
0.20  
0.15  
1.60  
0.80  
1.00 BSC  
0.15  
b
3 PL  
0.20 (0.008)  
M
D
0.20 (0.008)
 
E  
H
E
L
0.10  
1.50  
0.20 0.004
 
0.006 0.008  
1.70 0.060
 
0.063 0.067  
H
1.60  
E
C
A
GENERIC  
MARKING DIAGRAM*  
L
A1  
XX M  
G
STYLE 1:  
STYLE 2:  
STYLE 3:  
PIN 1.
 
BASE  
PIN 1.
 
ANODE  
2. N/C  
PIN 1.
 
ANODE  
2. ANODE  
2. EMITTER  
3. COLLECTOR  
1
3. CATHODE  
3. CATHODE  
XX  
M
G
= Specific Device Code  
= Date Code  
= Pb
−
Free Package  
STYLE 4:  
STYLE 5:  
PIN 1.
 
CATHODE  
2. CATHODE  
3. ANODE  
PIN 1.
 
GATE  
2. SOURCE  
3. DRAIN  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
Pb
−
Free indicator, “G” or microdot “
G
”,  
may or may not be present.  
SOLDERING FOOTPRINT*  
0.356  
0.014  
1.803  
0.071  
0.787  
0.031  
0.508  
0.020  
1.000  
0.039  
mm  
inches  
ǒ
Ǔ
SCALE 10:1  
*For additional information on our Pb
−
Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions
 
are uncontrolled
 
except when stamped
 
“CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASB15184C  
SC
−
75/SOT
−
416  
PAGE 1 OF 1  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically  
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the  
rights of others.  
©
Semiconductor Components Industries, LLC, 2019  

MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
SOT
−
1123  
CASE 524AA  
ISSUE C  
DATE 29
 
NOV 2011  
SCALE 8:1  
NOTES:  
−
X
−  
D
1. DIMENSIONING
 
AND TOLERANCING PER ASME  
Y14.5M, 1994.  
−
Y
−  
2. CONTROLLING
 
DIMENSION: MILLIMETERS.  
3. MAXIMUM
 
LEAD THICKNESS INCLUDES LEAD  
FINISH. MINIMUM LEAD THICKNESS IS THE  
MINIMUM THICKNESS OF BASE MATERIAL.  
4. DIMENSIONS
 
D AND E DO NOT INCLUDE MOLD  
FLASH, PROTRUSIONS, OR GATE BURRS.  
1
2
3
E
TOP VIEW  
MILLIMETERS  
A
DIM MIN  
MAX  
0.40  
0.28  
0.20  
0.17  
0.85  
0.65  
0.40  
1.05  
A
b
0.34  
0.15  
b1
0.10  
c
D
E
e
0.07  
0.75  
0.55  
0.35  
0.95  
H
c
E
H
E
SIDE VIEW  
L
0.185 REF  
L2
0.05 0.15  
b
3X  
L2  
GENERIC  
MARKING DIAGRAM*  
0.08 X  
Y
e
X M  
3X  
L
2X  
b1  
X
M
= Specific Device Code  
= Date Code  
BOTTOM VIEW  
*This information is generic. Please refer  
to device data sheet for actual part  
marking.  
SOLDERING FOOTPRINT*  
1.20  
Pb
−
Free indicator, “G” or microdot “
G
”,  
may or may not be present.  

3X

0.34  
0.26  
1
0.38  
2X  
0.20  
PACKAGE  
OUTLINE  
DIMENSIONS: MILLIMETERS  
*For additional information on our Pb
−
Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.  
STYLE 1:  
STYLE 2:  
STYLE 3:  
STYLE 4:  
STYLE 5:  
PIN 1.
 
BASE  
PIN 1.
 
ANODE  
2. N/C  
PIN 1.
 
ANODE  
2. ANODE  
PIN 1.
 
CATHODE  
2. CATHODE  
3. ANODE  
PIN 1.
 
GATE  
2. EMITTER  
3. COLLECTOR  
2. SOURCE  
3. DRAIN  
3. CATHODE  
3. CATHODE  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions
 
are uncontrolled
 
except when stamped
 
“CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON23134D  
SOT
−
1123, 3
−
LEAD, 1.0X0.6X0.37, 0.35P  
PAGE 1 OF 1  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically  
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the  
rights of others.  
©
Semiconductor Components Industries, LLC, 2019  

MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
SOT
−
723  
CASE 631AA
−
01  
ISSUE D  
DATE 10 AUG 2009  
SCALE 4:1  
NOTES:  
−
X
−  
1. DIMENSIONING
 
AND TOLERANCING PER ASME  
Y14.5M, 1994.  
2. CONTROLLING
 
DIMENSION: MILLIMETERS.  
3. MAXIMUM
 
LEAD THICKNESS INCLUDES LEAD  
FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM  
THICKNESS OF BASE MATERIAL.  
D
A
b1  
−
Y
−  
3
E
H

E  

4. DIMENSIONS
 
D AND E DO NOT INCLUDE MOLD  
FLASH, PROTRUSIONS OR GATE BURRS.  
1
2
MILLIMETERS  
2X
b  
3X  
C
DIM MIN  
NOM  
0.50  
0.21  
0.31  
0.12  
1.20  
0.80  
MAX  
0.55  
0.27  
0.37  
0.17  
1.25  
0.85  
2X
e  
0.08 X
 
Y  
A
b
0.45  
0.15  
0.25  
0.07  
1.15  
0.75  
SIDE VIEW  
TOP VIEW  
b1  
C
L
D
1
E
0.40 BSC  
1.20  
0.29 REF  
0.20  
e
H
E  
L
1.15  
0.15  
1.25  
0.25  
L2  
GENERIC  
3X  
L2  
MARKING DIAGRAM*  
BOTTOM VIEW  
STYLE 1:  
PIN 1.
 
BASE  
STYLE 2:  
PIN 1.
 
ANODE  
2. N/C  
STYLE 3:  
STYLE 4:  
STYLE 5:  
PIN 1.
 
GATE  
2. SOURCE  
3. DRAIN  
PIN 1.
 
ANODE  
2. ANODE  
PIN 1.
 
CATHODE  
2. CATHODE  
3. ANODE  
XX M  
1
2. EMITTER  
3. COLLECTOR  
3. CATHODE  
3. CATHODE  
XX  
M
= Specific Device Code  
= Date Code  
RECOMMENDED  
SOLDERING FOOTPRINT*  
*This information is generic. Please refer  
to device data sheet for actual part  
marking. Pb
−
Free indicator, “G”, may  
or not be present.  
2X  
0.40  

2X

0.27  
PACKAGE  
OUTLINE  
1.50  
3X  
0.52  
0.36  
DIMENSIONS: MILLIMETERS  
*For additional information on our Pb
−
Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions
 
are uncontrolled
 
except when stamped
 
“CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON12989D  
SOT
−
723  
PAGE 1 OF 1  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically  
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the  
rights of others.  
©
Semiconductor Components Industries, LLC, 2019  

onsemi
,  
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “
onsemi
” or its affiliates  
and/or subsidiaries in the United States and/or other countries.
onsemi
owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.  
A listing of
onsemi
’s product/patent coverage may be accessed at

.
onsemi
reserves the right to make changes at any time to any  
products or information herein, without notice. The information herein is provided “as
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is” and
onsemi
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onsemi
assume any liability arising out of the application or use  
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products  
and applications using
onsemi
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onsemi
. “Typical” parameters which may be provided in
onsemi
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onsemi
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