onsemi-NCV8413DTRKG
| Part # | onsemi-NCV8413DTRKG |
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Self-Protected Low Side
Driver with In-Rush Current
Management
NCV8413
The NCV8413 is a three terminal protected Low
−
Side Smart
Discrete FET. The protection features include Delta Thermal
Shutdown, overcurrent, overtemperature, ESD and integrated Drain to
Gate clamping for over voltage protection. The device also offers fault
indication via the gate pin. This device is suitable for harsh automotive
environments.
V
I MAX
D
(Limited)
DSS
(Clamped)
R
TYP
DS(ON)
42 V
37 m
W
@ 10 V
22 A
Features
•
Short Circuit Protection with In
−
Rush Current Management
•
Thermal Shutdown with Automatic Restart
•
Delta Thermal Shutdown
•
Over
V
o
ltage Protection
•
Integrated Clamp for Over
V
o
ltage Protection and Inductive
DPAK
CASE 369C
STYLE 2
Switching
•
ESD Protection
•
dV/dt Robustness
•
Analog Drive Capability (Logic Level Input)
MARKING DIAGRAM
•
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC
−
Q101 Grade 1
Qualified and PPAP Capable
•
These Devices are Pb
−
Free and are RoHS Compliant
1
AYWW
NCV
8413G
2
4
3
A
Y
= Assembly Location
=
Y
e
ar
Typical Applications
WW
G
= Work Week
= Pb
−
Free Package
•
Switch a
V
a
riety of Resistive, Inductive and Capacitive Loads
•
Can Replace Electromechanical Relays and Discrete Circuits
•
Automotive / Industrial
PIN ASSIGNMENT
−
Style 2
Drain
1 = Gate
2 = Drain
3 = Source
4 = Drain
Overvoltage
Protection
Gate
Input
ESD Protection
ORDERING INFORMATION
†
Device
NCV8413DTRKG
Package
Shipping
T
e
mperature
Limit
Current
Limit
Current
Sense
DPAK
(Pb
−
Free)
2500 /
T
a
pe &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our
T
a
pe and Reel Packaging Specification
Brochure, BRD8011/D.
Source
Figure 1. Block Diagram
©
Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
December, 2019
−
Rev. 1
NCV8413/D
NCV8413
Table 1. MAXIMUM RATINGS
Rating
Symbol
Value (min)
Unit
V
Drain
−
to
−
Source Voltage Internally Clamped
Drain
−
to
−
Gate Voltage Internally Clamped
Gate
−
to
−
Source Voltage
V
DSS
42
42
14
V
DG
V
V
GS
V
Drain Current
−
Continuous
I
D
Internally Limited
T
o
tal Power Dissipation
P
D
W
@ T
= 25
°
C (Note 1)
1.30
2.72
A
@ T
= 25
°
C (Note 2)
A
Thermal Resistance
Junction
−
to
−
Case (Soldering Point)
Junction
−
to
−
Case (
T
o
p)
Junction
−
to
−
Ambient (Note 1)
Junction
−
to
−
Ambient (Note 2)
°
C/W
R
1.30
54.2
95.7
45.9
thJC
R
R
R
thJT
thJA
thJA
Single Pulse Inductive Load Switching Energy
E
AS
470
mJ
(L = 120 mH, I
= 2.8 A, V
= 5
V
, R
=
2
5
W
, T
= 25
°
C)
Lpeak
GS
G
Jstart
Load Dump Voltage (V
= 0 and 10 V, R
= 4.5
W
) (Note 4)
U *
S
55
V
GS
L
Operating Junction
T
e
mperature
T
−
40 to 150
−
55 to 150
°
C
°
C
J
Storage
T
e
mperature
T
storage
ESD CHARACTERISTICS
(Note 3, 5)
Electro
−
Static Discharge Capability
Human Body Model (HBM)
Charged Device Model (CDM)
ESD
kV
4
1
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Mounted
onto a 2
″
square FR4 board (100 sq mm, 1 oz. Cu, steady state)
2. Mounted
onto a 2
″
square FR4 board (645 sq mm, 1 oz. Cu, steady state)
3. Not
tested in production.
4. Load
Dump
T
e
st B (with centralized load dump suppression) according to ISO16750
−
2 standard. Guaranteed by design. Not tested in
production. Passed Class C according to ISO16750
−
1.
5. This
device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC
−
Q100
−
002 (JS
−
001
−
2017)
Field Induced Charge Device Model ESD characterization is not performed on plastic molded packages with body sizes smaller than
2 x 2 mm due to the inability of a small package body to acquire and retain enough charge to meet the minimum CDM discharge current
waveform characteristic defined in JEDEC JS
−
002
−
2018
Figure 2. Voltage and Current Convention
2
NCV8413
Table 2. ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
J
Characteristic
Test Conditions
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain
−
to
−
Source Clamped
Breakdown Voltage
V
42
40
46
44
51
51
V
V
= 0
V
, I
=
2
50
m
A
(BR)DSS
GS
D
V
GS
= 0
V
, I
=
2
50
m
A,
D
T =
150
°
C (Note 6)
J
Zero Gate Voltage Drain Current
V
= 32
V
, V
= 0 V
I
0.6
4
5
m
A
m
A
DS
GS
DSS
V
DS
= 32
V
, V
= 0 V,
GS
T =
150
°
C (Note 6)
J
Gate Input Current
V
= 5
V
, V
= 0 V
I
50
125
2.2
GS
DS
GSS
ON CHARACTERISTICS
Gate Threshold Voltage
Threshold
T
e
mperature Coefficient
V
GS
= V
, I
= 1.2 mA
V
GS(th)
1.0
1.7
−
4
37
75
V
DS
D
mV/
°
C
m
W
Static Drain
−
to
−
Source
On Resistance
V
GS
= 10
V
, I
= 3
A
, T
= 25
°
C
R
DS(ON)
68
D
J
V
= 10
V
, I
= 3
A
,
123
GS
J
D
T =
150
°
C (Note 6)
V
GS
= 5
V
, I
= 3
A
, T
= 25
°
C
47
90
76
D
J
V
= 5
V
, I
= 3
A
,
135
GS
D
T =
150
°
C (Note 6)
J
Source Drain Forward On Voltage
I
S
= 7 A, V
= 0 V
V
SD
0.85
1.1
V
GS
SWITCHING CHARACTERISTICS
(Note 6)
Turn
−
On Time (10% V
to 90% I
)
V
DS
= 0 V to 5
V
,
t
25
44
35
65
25
85
m
s
GS
D
GS
ON
V
= 12
V
, I
= 1 A
D
Turn
−
Off Time (90% V
to 10% I
)
t
GS
D
OFF
Turn
−
On Time (10% V
to 90% I
)
V
GS
= 0 V to 10
V
,
t
15
GS
D
ON
V
= 12
V
, I
= 1 A
DS
D
Turn
−
Off Time (90% V
to 10% I
)
t
60
GS
D
OFF
Slew Rate On (80% V
to 50% V
)
)
V
DD
= 0 V to 10
V
,
−
dV /dt
DS ON
0.75
0.6
1.5
0.98
V/
m
s
DS
DS
GS
V
= 12
V
, R
=
4
.7
W
L
Slew Rate Off (50% V
to 80% V
dV /dt
DS OFF
DS
DS
SELF PROTECTION CHARACTERISTICS
Current Limit
V
= 5
V
, V
=
1
0 V
I
LIM
13
13
17
20
18
A
GS
DS
V
= 5
V
, V
=
1
0
V
,
15.5
GS
DS
T =
150
°
C (Note 6)
J
V
GS
= 10
V
, V
=
1
0 V (Note 6)
12
11
17
22
20
DS
V
GS
= 10
V
, V
=
1
0
V
,
15.5
DS
T =
150
°
C (Note 6)
J
T
e
mperature Limit (Turn
−
Off)
Thermal Hysteresis
V
= 5 V (Note 6)
= 10 V (Note 6)
T
150
150
172
15
185
200
°
C
m
A
GS
LIM(OFF)
D
T
LIM(ON)
T
e
mperature Limit (Turn
−
Off)
Thermal Hysteresis
V
GS
T
182
15
LIM(OFF)
D
T
LIM(ON)
GATE INPUT CHARACTERISTICS
(Note 6)
Device ON Gate Input Current
−
Normal Operation
V
= 5
V
, V
=
1
0
V
, I
= 1 A
I
35
200
170
900
70
50
310
500
1200
120
970
70
GS
DS
D
GON
V
GS
= 10
V
, V
=
1
0
V
, I
= 1 A
450
DS
D
Device ON Gate Input Current
−
Thermal Limit
V
GS
= 5
V
, V
=
1
0
V
, I
= 0 A
I
900
DS
D
GDTL
V
GS
= 10
V
, V
=
1
0
V
, I
= 0 A
1700
600
DS
D
Device ON Gate Input Current
−
Current Limit
V
= 5
V
, V
=
1
0 V
I
GCL
GS
DS
V
= 10
V
, V
=
1
0 V
710
1350
GS
DS
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. Not
tested in production.
3
NCV8413
TYPICAL CHARACTERISTICS
10
1000
T
= 25
°
C
J(start)
T
= 25
°
C
J(start)
T
= 150
°
C
J(start)
T
= 150
°
C
J(start)
1
100
10
100
10
100
L (mH)
L (mH)
Figure 3. Single Pulse Maximum Switch
−
off
Figure 4. Single Pulse Maximum Switching
Energy vs. Load Inductance
Current vs. Load Inductance
100
1000
T
= 25
°
C
J(start)
10
T
= 25
°
C
J(start)
T
= 150
°
C
J(start)
T
= 150
°
C
J(start)
1
100
1
10
1
10
t
av
(ms)
t
av
(ms)
Figure 5. Single Pulse Maximum Inductive
Switch
−
off Current vs. Time in Avalanche
Figure 6. Single Pulse Maximum Inductive
Switching Energy vs. Time in Avalanche
20
15
20
15
10
8 V
T =
25
°
C
A
9 V
10 V
V
DS
= 10 V
7 V
6 V
5 V
4 V
10
105
°
C
3 V
5
0
5
0
25
°
C
V
= 2.5 V
GS
150
°
C
−
40
°
C
0
1
2
3
4
5
1
2
3
4
5
V
DS
(V)
V
GS
(V)
Figure 7. On
−
State Ouput Characteristics
Figure 8. Transfer Characteristics
4
NCV8413
TYPICAL CHARACTERISTICS
110
150
°
C, V
= 5 V
GS
140
120
100
80
I =
3 A
D
100
90
80
70
60
50
40
105
°
C, V
= 5 V
GS
150
°
C
105
°
C
150
°
C, V
= 10 V
GS
105
°
C, V
= 10 V
GS
25
°
C, V
= 5 V
GS
60
25
°
C
25
°
C, V
= 10 V
GS
−
40
°
C
40
20
30
−
40
°
C, V
= 5 V
−
40
°
C, V
= 10 V
GS
GS
20
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
10
40
V
GS
(V)
I (A)
D
Figure 9. R
DS(on)
vs. Gate
−
Source Voltage
Figure 10. R
DS(on)
vs. Drain Current
22
21
20
19
18
17
16
15
14
2.00
1.75
1.50
1.25
1.00
V
= 10 V
I
D
= 5 A
DS
−
40
°
C
V
= 5 V
GS
25
°
C
105
°
C
150
°
C
V
= 10 V
GS
0.75
0.50
13
12
−
40
−
20
0
20
40
60
80 100 120 140
5
6
7
8
9
T (
°
C)
J
V
(V)
GS
Figure 11. Normalized R
DS(on)
vs. Temperature
Figure 12. Current Limit vs. Gate
−
Source
Voltage
20
18
16
14
100
10
1
V
GS
= 0 V
V
DS
= 10 V
V
= 10 V
= 5 V
GS
150
°
C
V
GS
0.1
105
°
C
25
°
C
12
10
0.01
−
40
°
C
0.001
−
40
−
20
0
20
40
60
80 100
120 140
10
15
20
25
(V)
30
35
T (
°
C)
J
V
DS
Figure 13. Current Limit vs. Junction
Temperature
Figure 14. Drain
−
to
−
Source Leakage Current
5
NCV8413
TYPICAL CHARACTERISTICS
1.2
1.1
1.0
0.9
0.8
1.0
I
V
= 1.2 mA
D
= V
DS
GS
0.9
0.8
0.7
−
40
°
C
25
°
C
105
°
C
150
°
C
0.6
0.5
0.7
0.6
V
= 0 V
9
GS
−
40
−
20
0
20
40
60
80 100
120 140
1
2
3
4
5
6
7
8
10
T (
°
C)
J
I
S
(A)
Figure 15. Normalized Threshold Voltage vs.
Temperature
Figure 16. Source
−
Drain Diode Forward
Characteristics
2.5
2.0
1.5
1.0
160
140
120
100
80
V
= 25 V
= 5 A
= 0
W
DD
I
D
R
G
t
ON
dV /dt
DS OFF
t
r
60
−
dV /dt
DS ON
V
= 25 V
= 5 A
= 0
W
DD
40
t
OFF
0.5
0
I
D
R
G
20
0
t
f
3
4
5
6
7
8
9
10
3
4
5
6
7
8
9
10
V
GS
(V)
V
GS
(V)
Figure 17. Resistive Load Switching Time vs.
Figure 18. Resistive Load Switching Drain
−
Source Voltage Slope vs. Gate
−
Source Voltage
Gate
−
Source Voltage
70
60
50
40
30
2.0
1.8
1.6
1.4
V
= 25 V
= 5 A
DD
V
= 25 V
= 5 A
DD
t
, V
= 10 V
OFF GS
I
D
I
D
−
dV /dt ,
V =
10 V
DS ON
GS
t , V
= 10 V
t , V
= 5 V
f
GS
f
GS
t
, V
= 5 V
OFF GS
dV /dt
, V
= 5 V
DS OFF GS
t
, V
= 5 V
GS
ON
dV /dt
, V
= 10 V
DS OFF GS
t , V
= 5 V
r
GS
−
dV /dt ,
V =
5 V
DS ON
GS
1.2
0
t
, V
= 10 V
GS
ON
20
10
t , V
= 10 V
r
GS
0
250
500
750 1000
1250 1500 1750
2000
(
W
)
0
250
500
750 1000
1250 1500
1750 2000
(
W
)
R
R
G
G
Figure 19. Resistive Load Switching Time vs.
Gate Resistance
Figure 20. Resistive Load Switching Drain
−
Source Voltage Slope vs. Gate Resistance
6
NCV8413
TYPICAL CHARACTERISTICS
80
70
60
50
40
PCB Cu thickness, 1.0 oz
PCB Cu thickness, 2.0 oz
30
20
0
200
400
600
800 1000 1200 1400
2
COPPER HEAT SPREADER AREA (mm
)
Figure 21. R
q
JA
vs. Copper Area
100
10
1
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
0.01
0.1
2
645 mm
2 oz. Copper
Single Pulse
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE WIDTH (s)
Figure 22. Transient Thermal Resistance
7
NCV8413
APPLICATION INFORMATION
Circuit Protection Features
junction temperature is exceeded. When activated at
typically 172
°
C, the NCV8413 turns off. This feature is
provided to prevent failures from accidental overheating.
The NCV8413 has three main protections. Current Limit,
Thermal Shutdown and Delta Thermal Shutdown. These
protections establish robustness of the NCV8413.
EMC Performance
Current Limit and Short Circuit Protection
The NCV8413 has current sense element. In the event that
the drain current reaches designed current limit level,
integrated Current Limit protection establishes its constant
level.
If better EMC performance is needed, connect a small
ceramic capacitor to the drain pin as close to the device as
possible according to Figure 23.
Delta Thermal Shutdown
Delta Thermal Shutdown (DTSD) Protection increases
higher reliability of the NCV8413. DTSD consist of two
independent temperature sensors – cold and hot sensors. The
NCV8413 establishes a slow junction temperature rise by
sensing the difference between the hot and cold sensors.
ON/OFF output cycling is designed with hysteresis that
results in a controlled saw tooth temperature profile
(Figure 24). The die temperature slowly rises (DTSD) until
the absolute temperature shutdown (TSD) is reached around
172
°
C.
Thermal Shutdown with Automatic Restart
Internal Thermal Shutdown (TSD) circuitry is provided to
protect the NCV8413 in the event that the maximum
Figure 23. EMC Capacitor Placement
TEST CIRCUITS AND WAVEFORMS
Figure 24. Overload Protection Behavior
8
NCV8413
TEST CIRCUITS AND WAVEFORMS
Figure 25. Resistive Load Switching Test Circuit
Figure 26. Resistive Load Switching Waveforms
9
NCV8413
TEST CIRCUITS AND WAVEFORMS
Figure 27. Inductive Load Switching Test Circuit
Figure 28. Inductive Load Switching Waveform
10
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C
4
ISSUE F
2
1
DATE 21 JUL 2015
3
SCALE 1:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
A
D
E
C
A
b3
B
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BOD
Y
.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
c2
4
2
L3
Z
DETAIL A
H
1
3
7. OPTIONAL MOLD FEATURE.
INCHES
DIM MIN
MAX
0.086 0.094
A1
0.000 0.005
0.025 0.035
b2
0.028 0.045
b3
0.180 0.215
MILLIMETERS
L4
NOTE 7
MIN
2.18
0.00
0.63
0.72
4.57
0.46
0.46
5.97
6.35
MAX
2.38
0.13
0.89
1.14
5.46
0.61
0.61
6.22
6.73
c
b2
e
BOTTOM VIEW
A
SIDE VIEW
b
b
M
0.005 (0.13)
C
TOP VIEW
c
0.018 0.024
c2
0.018 0.024
Z
Z
D
E
e
0.235 0.245
0.250 0.265
0.090 BSC
H
2.29 BSC
9.40 10.41
1.40 1.78
2.90 REF
0.51 BSC
0.89 1.27
GAUGE
PLANE
SEATING
PLANE
H
L
L1
L2
0.370 0.410
0.055 0.070
0.114 REF
L2
C
0.020 BSC
L3
0.035 0.050
L
BOTTOM VIEW
A1
L4
Z
−−−
0.040
0.155
−−−
−−−
3.93
1.01
−−−
L1
ALTERNATE
CONSTRUCTIONS
DETAIL A
ROTATED 9
0
5
CW
GENERIC
MARKING DIAGRAM*
STYLE 1:
PIN 1.
BASE
STYLE 2:
PIN 1.
GATE
2. DRAIN
STYLE 3:
STYLE 4:
STYLE 5:
PIN 1.
GATE
PIN 1.
ANODE
2. CATHODE
3. ANODE
PIN 1.
CATHODE
2. ANODE
2. COLLECTOR
2. ANODE
3. CATHODE
4. ANODE
3. EMITTER
3. SOURCE
4. DRAIN
3. GATE
4. ANODE
XXXXXXG
ALYWW
AYWW
XXX
4. COLLECTOR
4. CATHODE
STYLE 6:
PIN 1.
MT1
2. MT2
STYLE 7:
STYLE 8:
STYLE 9:
PIN 1.
ANODE
2. CATHODE
STYLE 10:
PIN 1.
CATHODE
2. ANODE
XXXXXG
PIN 1.
GATE
PIN 1.
N/C
2. COLLECTOR
2. CATHODE
3. GATE
4. MT2
3. EMITTER
3. ANODE
3. RESISTOR
ADJUST
4. CATHODE
3. CATHODE
4. ANODE
4. COLLECTOR
4. CATHODE
IC
Discrete
SOLDERING FOOTPRINT*
XXXXXX =
Device Code
A
L
Y
WW
G
= Assembly Location
= Wafer Lot
=
Y
e
ar
= Work Week
= Pb
−
Free Package
6.20
0.244
3.00
0.118
2.58
0.102
*This information is generic. Please refer
to device data sheet for actual part
marking.
5.80
0.228
1.60
0.063
6.17
0.243
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON10527D
DPAK (SINGLE GAUGE)
PAGE 1 OF 1
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Marking.pdf
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