onsemi-NDS0610-G

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onsemi-NDS0610-G
DATA SHEET  
P-Channel Enhancement  
Mode Field Effect Transistor  
SOT
−
23  
CASE 318
−
08  
NDS0610  
General Description  
This P
−
Channel Enhancement Mode Field Effect Transistors are  
Produced using
onsemi
’s proprietary, high cell density, DMOS  
technology. This very high density process has been designed to  
minimize on
−
state resistance, provide rugged and reliable  
performance and fast switching. They can be used, with a minimum of  
effort, in most applications requiring up to 120 mA DC and can deliver  
current up to 1 A.  
D
G
S
This product is particularly suited to low voltage applications  
requiring a low current high side switch.  
Features  
MARKING DIAGRAM  
•
−
0.12 A,
−
60 V  
♦
R  
♦
R  
= 10
ꢀ ꢁ
 
V =
 
−
10 V  
GS  
DS(on)  
610 M
G  
=
ꢂ ꢃ
 
ꢀ ꢁ
 
V =
 
−
4.5 V  
DS(on)  
GS  
G
•
V
o
ltage Controlled P
−
Channel Small Signal Switch  
•
High Density Cell design for Low R  
DS(on)  
610 =
 
Device Code  
•
High Saturation Current  
M
= Date Code*  
G
= Pb
−
Free Package  
ABSOLUTE MAXIMUM RATINGS
T =
 
25
°
C unless otherwise noted  
A
(NOTE: Microdot may be in either location)  
Symbol  
Parameter  
Drain
−
to
−
Source Voltage  
Gate
−
to
−
Source Voltage  
Value  
−
60  
20  
Unit  
V
*Date Code orientation and/or location may vary  
depending upon manufacturing location.  
V
DSS  
V
GSS  
V
I
D
A
Drain Current  
ORDERING INFORMATION  
−
0.12  
−
1  
†
Device  
Shipping  
Package  
−
Pulsed  
NDS0610  
SOT
−
23  
(Pb
−
Free)  
3000 /  
T
a
pe & Reel  
P
D
W
Maximum Power Dissipation  
0.36  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our
T
a
pe and Reel Packaging Specifications  
Brochure,

.  
Derate Above 25
°
C  
2.9  
T , T  
Operating and Storage Junction  
T
e
mperature Range  
−
55 to +150  
°
C  
°
C  
J
stg  
T
L
Maximum Lead
T
e
mperature for  
Soldering Purposes, 1/16” from  
Case for 10 Seconds  
300  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
©
Semiconductor Components Industries, LLC, 2016  
1
Publication Order Number:  
September, 2023
−
Rev 4  
NDS0610/D  

NDS0610  
THERMAL CHARACTERISTICS  
Symbol  
Parameter  
Value  
Unit  
R
Thermal Resistance, Junction
−
to
−

350  
°
C/W  
θ
JA  
ELECTRICAL CHARACTERISTICS
 
T =
 
25
°
C unless otherwise noted  
A
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Unit  
Off Characteristics  
BV  
Drain to Source Breakdown Voltage  
V
I
= 0
V
, I
 
=
−
10
ꢄ
A  
−
60  
−
−
−
V
DSS  
GS  
D
Breakdown Voltage
T
e
mperature  
Coefficient  
=
−
10
ꢄ
A, Referenced to 25
°
C  
−
−
53  
mV/
°
C  
ꢅ
BV

DSS  

ꢅ
T

J  

D
I
Zero Gate Voltage Drain Current  
V
V
V
=
−
48
V
, V
 
= 0 V  
−
−
−
−
−
−
−
1  
−
200  
10  
ꢄ
A  
ꢄ
A  
nA  
DSS  
DS  
GS  
=
−
48
V
, V
 
= 0 V T
 
=
1
25
°
C  
DS  
GS  
GS  
J
I
Gate
−
Body Leakage  
=
20
V
, V
 
= 0 V  
DS  
GSS  
On Characteristics

V
Gate Threshold Voltage  
V
I
= V
 
,
I =
 
−
1 mA  
−
1  
−
1.7  
−
3  
−
3.5  
V
GS(th)  
DS  
GS D  
Gate Threshold Voltage  
T
e
mperature Coefficient  
=
−
1 mA, Referenced to 25
°
C  
−
−
mV/
°
C  
ꢅ
V

GS(th)  

ꢅ
T

J  

D
R
Static Drain
−
Source On
−
Resistance  
V
GS  
V
GS  
V
GS  
=
−
10
V
, I
 
=
−
0.5 A  
−
1.0  
1.3  
1.7  
10  
20  
16  
ꢀ
DS(on)  
D
=
−
4.5
V
, I
 
=
−
0.25 A  
D
=
−
10
V
, I
 
=
−
0.5 A, T
 
= 125
°
C  
D
J
I
On
−
State Drain Current  
V
=
−
10
V
, V
 
=
−
10 V  
−
0.6  
−
−
−
A
D(on)  
GS  
DS  
DS  
g
FS  
Forward Transconductance  
V
=
−
10
V
, I
 
=
−
0.1 A  
70  
430  
mS  
D
Dynamic Characteristics  
C
Input Capacitance  
V
=
−
25
V
, V
 
= 0 V, f =
1
.0 MHz  
−
−
−
−
79  
10  
4
−
−
−
−
pF  
pF  
pF  
ꢀ
iss  
DS  
DS  
GS  
C
Output Capacitance  
Reverse Transfer Capacitance  
Gate Resistance  
oss  
C
rss  
R
V
=
−
15 m
V
, f =
1
.0 MHz  
10  
G
Switching Characteristics

t
Turn
−
On Delay Time  
Turn
−
On Rise Time  
Turn
−
Off Delay Time  
Turn
−
Off Fall Time  
T
o
tal Gate Change  
Gate
−
Source Change  
Gate
−
Drain Change  
V
V
=
−
25
V
, I
 
=
−
0.12 A,  
−
−
−
−
−
−
−
2.5  
6.3  
10  
5
12.6  
15  
15  
2.5  
−
ns  
ns  
d(on)  
DD  
GS  
D
=
−
10
V
, R  
= 6
Ω  
GEN  
t
r
t
ns  
d(off)  
t
f
7.5  
1.8  
0.3  
0.4  
ns  
Q
V
DS  
V
GS  
=
−
48
V
, I
 
=
−
0.5 A,  
nC  
nC  
nC  
g
D
=
−
10 V  
Q
gs  
gd  
Q
−
Drain
−
Source Diode Characteristics and Maximum Ratings  
Maximum Continuous Drain–Source Diode Forward Current  
I
S
−
−
−
−
−
−
0.8  
17  
−
0.24  
−
1.5  
−
A
V
V
SD  
Drain
−
Source Diode Forward Voltage  
Diode Reverse Recovery Time  
Diode Reverse Recovery Charge  
V =
 
0
V
, I
 
=
−

GS S  
t
rr  
I =
 
−
0.5 A, d
 
/d =
 
100 A/
ꢄ

ns  
nC  
F
iF  
t
Q
15  
−
rr  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
NOTES:  
1. R  
is the sum of the junction
−
to
−
case and case
−
to
−
ambient thermal resistance where the case thermal reference is defined as the solder  
ꢆ
JA  
mounting surface of the drain pins. R  
is guaranteed by design while R  
is determined by the user’s board design.  
ꢆ
ꢆ
JC  
CA  
a) 350
°
C/W when mounted on a  
minimum pad.  
Scale 1 :
 
1 on
 
letter size paper  
2. Pulse
 
T
e
st: Pulse Width
≤
300
ꢄ
s, Duty Cycle
≤
2.0%  
2
 

NDS0610  
TYPICAL CHARACTERISTICS  
2.2  
2
1.4  
V
GS  
=
−
10 V  
−
60 V  
−
4.5 V  
−
4.0 V  
1.2  
1
V
GS  
=
−
3.0 V  
−
3.5 V  
−
3.5 V  
1.8  
0.8  
0.6  
0.4  
0.2  
0
1.6  
1.4  
1.2  
1
−
3.0 V  
−
4.0 V  
−
4.5 V  
−
6.0 V  
−
10 V  
−
2.5 V  
0.8  
0
1
2
3
4
5
6
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
1.4  
−
I ,
 
DRAIN CURRENT (A)  
D
−
V ,
 
DRAIN TO SOURCE VOLTAGE (V)  
DS  
Figure 2. On
−
Resistance Variation With  
Figure 1. On
−
Region Characteristics  
Drain Current and Gate Voltage  
5
1.8  
I
D
=
−
0.5 A  
I
D
=
−
0.25 A  
V
=
−
10 V  
GS  
1.6  
1.4  
1.2  
1
4
3
T =
 
125
°
C  
A
2
1
0
0.8  
0.6  
0.4  
T =
 
25
°
C  
A
−
50
−
25  
0
150  
25  
50  
75  
100 125  
2
4
6
8
10  
−
V ,
 
GATE TO SOURCE VOLTAGE (V)  
GS  
T ,
 
JUNCTION TEMPERATURE (
5
C)  
J
Figure 4. On
−
Resistance Variation with  
Gate
−
to
−
Source Voltage  
Figure 3. On
−
Resistance Variation with  
Temperature  
10  
1.2  
1
V
DS  
=
−
10 V  
V
GS  
= 0 V  
25
°
C  
T =
 
−
55
°
C  
A
1
0.1  
125
°
C  
0.8  
T =
 
125
°
C  
A
0.6  
0.4  
0.2  
0
25
°
C  
0.01  
0.001  
−
55
°
C  
0.0001  
0.2  
4.5  
1
0.4  
0.6  
0.8  
1
1.2  
1.5  
2
2.5  
3
3.5  
4
−
V ,
 
BODY DIODE FORWARD VOLTAGE (V)  
SD  
−
V ,
 
GATE TO SOURCE VOLTAGE (V)  
GS  
Figure 5. Transfer Characteristics  
Figure 6. Body Diode Forward Voltage Variation with  
Source Current and Temperature  
3

NDS0610  
TYPICAL CHARACTERISTICS
(CONTINUED)  
100  
10  
8
f = 1 MHz  
V
DS  
=
−
12 V  
−
24 V  
80  
I
D
=
−
0.5 A  
V
GS  
= 0 V  
C
ISS  
−
48 V  
60  
6
40  
4
C
OSS  
2
20  
0
C
RSS  
0
0
10  
20  
30  
40  
50  
60  
0
0.4  
0.8  
1.2  
1.6  
2
Q ,
 
GATE CHARGE (nC)  
g
−
V ,
 
DRAIN TO SOURCE VOLTAGE (V)  
DS  
Figure 7. Gate Charge Characteristics  
Figure 8. Capacitance Characteristics  
10  
5
SINGLE PULSE  
= 30
°
C/W  
T =
 
25
°
C  
A
R
ꢆ
JA  
4
3
2
100 us  
1
R
LIMIT  
DS(on)  
1 ms  
10 ms  
100 ms  
0.1  
1 s  
10 s  
DC  
V
GS  
=
−
10 V  
0.01  
SINGLE PULSE  
= 350
°
C/W  
1
0
R
ꢆ
JA  
T =
 
25
°
C  
A
0.001  
1
10  
−
V ,
 
DRAIN
−
SOURCE VOLTAGE (V)  
100  
0.01  
0.1  
1
10  
100  
t1, TIME (s)  
DS  
Figure 9. Maximum Safe Operating Area  
Figure 10. Single Pulse Maximum  
Power Dissipation  
1
D = 0.5  
0.1  
0.2  
0.1  
R JA
 
(t) = r(t) * R
 
JA  
q
q
R JA =
 
350
5
C/W  
q
0.05  
P(pk)  
0.02  
0.01  
t

1  

t

2  

0.01  
T
J
−
T =
 
P * R
 
JA (t)  
q
A
Duty Cycle, D = t1/t2  
Single Pulse  
0.001  
0.0001  
0.001  
0.01  
0.1  
t ,
 
TIME (s)  
1
10  
100  
1000  
1
Figure 11. Transient Thermal Response Curve  
4

MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
SOT
−
23 (TO
−
236)  
CASE 318  
ISSUE AT  
DATE 01 MAR 2023  
SCALE 4:1  
GENERIC  
MARKING DIAGRAM*  
XXXM
G  
G
1
XXX = Specific Device Code  
M
= Date Code  
G
= Pb
−
Free Package  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
Pb
−
Free indicator, “G” or microdot “
G
”, may  
or may not be present. Some products may  
not follow the Generic Marking.  
STYLES ON PAGE 2  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions
 
are uncontrolled
 
except when stamped
 
“CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASB42226B  
SOT
−
23 (TO
−
236)  
PAGE 1 OF 2  
onsemi
and  
are trademarks of Semiconductor Components Industries, LLC dba
onsemi
or its subsidiaries in the United States and/or other countries.
onsemi
reserves  
the right to make changes without further notice to any products herein.
onsemi
makes no warranty, representation or guarantee regarding the suitability of its products for any particular  
purpose, nor does
onsemi
assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation  
special, consequential or incidental damages.
onsemi
does not convey any license under its patent rights nor the rights of others.  
©
Semiconductor Components Industries, LLC, 2019  

MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
SOT
−
23 (TO
−
236)  
CASE 318  
ISSUE AT  
DATE 01 MAR 2023  
STYLE 1 THRU 5:  
CANCELLED  
STYLE 6:  
STYLE 7:  
PIN 1.
 
EMITTER  
2. BASE  
STYLE 8:  
PIN 1.
 
BASE  
PIN 1.
 
ANODE  
2. EMITTER  
3. COLLECTOR  
2. NO
 
CONNECTION  
3. CATHODE  
3. COLLECTOR  
STYLE 9:  
PIN 1.
 
ANODE  
2. ANODE  
STYLE 10:  
STYLE 11:  
PIN 1.
 
ANODE  
2. CATHODE  
STYLE 12:  
STYLE 13:  
PIN 1.
 
SOURCE  
2. DRAIN  
STYLE 14:  
PIN 1.
 
CATHODE  
2. GATE  
PIN 1.
 
DRAIN  
2. SOURCE  
3. GATE  
PIN 1.
 
CATHODE  
2. CATHODE  
3. ANODE  
3. CATHODE  
3. CATHODE
−
ANODE  
3. GATE  
3. ANODE  
STYLE 15:  
STYLE 16:  
STYLE 17:  
PIN 1.
 
NO CONNECTION  
2. ANODE  
STYLE 18:  
STYLE 19:  
STYLE 20:  
PIN 1.
 
CATHODE  
2. ANODE  
PIN 1.
 
GATE  
2. CATHODE  
3. ANODE  
PIN 1.
 
ANODE  
2. CATHODE  
3. CATHODE  
PIN 1.
 
NO CONNECTION
 
PIN 1.
 
CATHODE  
2. CATHODE  
3. ANODE  
2. ANODE  
3. CATHODE
−
ANODE  
3. CATHODE  
3. GATE  
STYLE 21:  
STYLE 22:  
STYLE 23:  
PIN 1.
 
ANODE  
2. ANODE  
STYLE 24:  
STYLE 25:  
STYLE 26:  
PIN 1.
 
GATE  
2. SOURCE  
3. DRAIN  
PIN 1.
 
RETURN  
2. OUTPUT  
3. INPUT  
PIN 1.
 
GATE  
2. DRAIN  
PIN 1.
 
ANODE  
2. CATHODE  
3. GATE  
PIN 1.
 
CATHODE  
2. ANODE  
3. SOURCE  
3. NO
 
CONNECTION  
3. CATHODE  
STYLE 27:  
STYLE 28:  
PIN 1.
 
CATHODE  
2. CATHODE  
3. CATHODE  
PIN 1.
 
ANODE  
2. ANODE  
3. ANODE  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions
 
are uncontrolled
 
except when stamped
 
“CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASB42226B  
SOT
−
23 (TO
−
236)  
PAGE 2 OF 2  
onsemi
and  
are trademarks of Semiconductor Components Industries, LLC dba
onsemi
or its subsidiaries in the United States and/or other countries.
onsemi
reserves  
the right to make changes without further notice to any products herein.
onsemi
makes no warranty, representation or guarantee regarding the suitability of its products for any particular  
purpose, nor does
onsemi
assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation  
special, consequential or incidental damages.
onsemi
does not convey any license under its patent rights nor the rights of others.  
©
Semiconductor Components Industries, LLC, 2019  

onsemi
,  
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “
onsemi
” or its affiliates  
and/or subsidiaries in the United States and/or other countries.
onsemi
owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.  
A listing of
onsemi
’s product/patent coverage may be accessed at

.
onsemi
reserves the right to make changes at any time to any  
products or information herein, without notice. The information herein is provided “as
−
is” and
onsemi
makes no warranty, representation or guarantee regarding the accuracy of the  
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does
onsemi
assume any liability arising out of the application or use  
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products  
and applications using
onsemi
products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information  
provided by
onsemi
. “Typical” parameters which may be provided in
onsemi
data sheets and/or specifications can and do vary in different applications and actual performance may  
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
onsemi
does not convey any license  
under any of its intellectual property rights nor the rights of others.
onsemi
products are not designed, intended, or authorized for use as a critical component in life support systems  
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should  
Buyer purchase or use
onsemi
products for any such unintended or unauthorized application, Buyer shall indemnify and hold
onsemi
and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that
onsemi
was negligent regarding the design or manufacture of the part.
onsemi
is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
ADDITIONAL INFORMATION  
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:  
onsemi Website:

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