onsemi-NDS8435A
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March 1997
NDS8435A
Single P-Channel Enhancement Mode Field Effect Transistor
General Description
Features
-7.9 A,
-30 V. R
DS(ON)
= 0.023
W
@ V
GS
= -10 V
SO-8 P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance and provide
superior switching performance. These devices are particularly
suited for low voltage applications such as notebook computer
power management
and other battery powered circuits where
fast switching, low in-line power loss, and resistance to
transients are needed.
R
DS(ON)
= 0.035
W
@ V
GS
= -4.5V.
High density cell design for extremely low R
DS(ON).
High power and current handling capability in a widely used
surface mount package.
___________________________________________________________________________________________
4
3
2
1
5
6
7
8
Absolute Maximum Ratings
T
A
= 25°C unless otherwise noted
Symbol Parameter
NDS8435A
Units
V
DSS
V
GSS
I
D
Drain-Source Voltage
Gate-Source Voltage
-30
V
±20
-7.9
V
A
Drain Current – Continuous
– Pulsed
(Note 1a)
-25
P
D
Maximum Power Dissipation
(Note 1a)
(Note 1b)
2.5
W
1.2
(Note 1c)
1
T
J
,T
STG
Operating and Storage Temperature Range
-55 to 150
°C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Ambient
(
Note 1a)
Thermal Resistance, Junction-to-Case
50
25
°C/W
°C/W
R
q
JA
R
q
JC
(Note 1)
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NDS8435A Rev.C
1
Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
I
DSS
Drain-Source Breakdown Voltage
V
GS
= 0
V, I
D
= -250
µA
V
DS
= -24
V, V
GS
= 0
V
-30
V
Zero Gate Voltage
Drain Current
-1
µA
µA
nA
nA
-10
T
J
= 55°C
I
GSSF
I
GSSR
Gate – Body Leakage, Forward
Gate – Body Leakage, Reverse
V
GS
= 20
V, V
DS
= 0
V
V
GS
= -20
V, V
DS
= 0
V
100
-100
ON CHARACTERISTICS
(Note 2)
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= -250
µA
V
GS
= -10 V,
I
D
= -7.9 A
-1
-1.3
-1
-3
V
-0.7
-2.2
T
J
= 125°C
T
J
= 125°C
R
DS(ON)
Static Drain-Source On-Resistance
0.02
0.027
0.03
0.023
0.041
0.035
W
V
GS
= -4.5 V,
I
D
= -6.5 A
V
GS
= -10
V, V
DS
= -5
V
V
GS
= -4.5, V
DS
= -5 V
V
DS
= -10 V, I
D
= -7.9 A
On-State Drain Current
-25
-10
A
S
I
D(on)
Forward Transconductance
-17
g
FS
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance
V
DS
= -15 V,
V
GS
= 0 V,
f = 1.0 MHz
1800
950
pF
pF
pF
Output Capacitance
Reverse Transfer Capacitance
240
SWITCHING CHARACTERISTICS
(Note 2)
Turn – On Delay Time
Turn – On Rise Time
Turn – Off Delay Time
Turn – Off Fall Time
Total Gate Charge
11
20
95
46
48
6
22
35
ns
ns
t
D(on)
t
r
t
D(off)
t
f
V
DD
= -10 V,
I
D
= -1 A,
V
GEN
= -10 V, R
GEN
= 6
W
180
100
67
ns
ns
nC
nC
nC
Q
g
Q
gs
Q
gd
V
DS
= -15 V,
I
D
= -7.9 A, V
GS
= -10 V
Gate-Source Charge
Gate-Drain Charge
12
NDS8435A Rev.C
1
Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
Symbol Parameter
Conditions
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
Min
Typ
Max
Units
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
-2.1
-1.2
A
V
I
S
-0.74
V
SD
Notes:
V
GS
= 0 V,
I
S
= -2.1 A
(Note 2)
1. R
q
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
q
JC
is guaranteed by
design while R
q
CA
is determined by the user’s board design.
T
J
–
T
T
J
–
T
A
=
I
2
D
(
t
) ´
R
DS
(
O
N
)
J
A
( )
P
D
t
=
=
q
J
A
(
t
)
T
R
R
q
J
C
+
R
t
q
C
A
( )
Typical R
q
JA
for single device operation using the board layouts shown below on 4.5″x5″ FR-4 PCB in a still air environment:
a. 50
o
C/W when mounted on a 1 in
2
pad of 2oz copper.
b. 105
o
C/W when mounted on a 0.04 in
2
pad of 2oz copper.
c. 125
o
C/W when mounted on a 0.006 in
2
pad of 2oz copper.
1a
1b
1c
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
NDS8435A Rev.C
1
Typical Electrical Characteristics
2.5
2
-30
-4.5
-4.0
V
GS
=-10V
-6.0
-24
-18
-12
-6
-3.5
V
GS
=-3.5V
-4.0
-4.5
1.5
1
-5.0
-3.0
-6.0
-7.0
-10
-2.5
0
0.5
0
-5
-10
-15
-20
-25
0
-0.5
-1
-1.5
-2
-2.5
-3
V
, DRAIN-SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
DS
Figure 2. On-Resistance Variation
with Drain Current and Gate Voltage
.
Figure 1. On-Region Characteristics
.
1.6
1.4
1.2
1
2
1.5
1
I
D
= -7.9A
V
GS
= -10V
V
GS
= -10V
T =
125°C
J
25°C
-55°C
0.5
0
0.8
0.6
-50
-25
0
25
50
75
100
125
150
0
-5
-10
-15
-20
-25
T
, JUNCTION TEMPERATURE (°C)
I
D
, DRAIN CURRENT (A)
J
Figure 4. On-Resistance Variation
Figure 3. On-Resistance Variation
with Temperature.
with Drain Current and Temperature
.
-25
1.2
1.1
1
T
= -55°C
V
DS
= -10V
J
V
DS
= V
GS
25°C
125°C
I
D
=-250µA
-20
-15
-10
-5
0.9
0.8
0.7
0.6
0
-1
-1.5
-2
-2.5
-3
-3.5
-4
-50
-25
0
25
T ,
JUNCTION TEMPERATURE (°C)
J
50
75
100
125
150
V
, GATE TO SOURCE VOLTAGE (V)
GS
Figure 6. Gate Threshold Variation
Figure 5. Transfer Charateristics
.
with Temperature
.
NDS8435A Rev.C
1
Typical Electrical Characteristics
(continued)
1.125
20
5
V
GS
= 0V
1.1
1.075
1.05
I
D
= -250µA
T
= 125°C
J
1
0.1
25°C
1.025
1
-55°C
0.01
0.975
0.95
0.001
0.0001
0.925
-50
-25
0
25
50
75
100
125
150
0
0.2
0.4
, BODY DIODE FORWARD VOLTAGE (V)
SD
0.6
0.8
1
1.2
T
, JUNCTION TEMPERATURE (°C)
-V
J
Figure 7. Breakdown Voltage
Variation with Temperature.
Figure 8. Body Diode Forward Voltage Variation
with Source Current and
Temperature
.
4000
3000
10
V
DS
= -5V
I
= -7.9A
D
-10
8
6
4
2
0
2000
C
iss
-15
C
oss
1000
500
300
f = 1 MHz
V
GS
= 0 V
C
rss
150
0
.
1
0
.
2
0
.
5
1
2
5
10
20 30
0
10
20
30
40
50
-V
, DRAIN TO SOURCE VOLTAGE (V)
Q
g
, GATE CHARGE (nC)
DS
Figure 9. Capacitance Characteristics
.
Figure 10. Gate Charge Characteristics.
t
o
n
t
off
-V
DD
t
d(off)
t
d(on)
t
r
t
f
90%
R
L
90%
V
IN
D
V
O
UT
V
OUT
10%
10%
90%
V
GS
R
GEN
DUT
G
V
50%
50%
IN
S
10%
INVERTED
PULSE WIDTH
Figure 12. Switching Waveforms
.
Figure 11. Switching Test Circuit
.
NDS8435A Rev.C
1
Typical Electrical and ThermalCharacteristics
(continued)
2.5
40
V
DS
= – 10V
1a
T =
-55°C
J
32
24
16
8
2
1.5
1
25°C
125°C
1b
1c
4.5″x5″ FR-4 Board
T
A
25
o
=
C
Still Air
0
0.5
0
-6
-12
-18
-24
-30
0
0.2
0.4
0.6
0.8
2
1
I
, DRAIN CURRENT (A)
2oz COPPER MOUNTING PAD AREA (in
)
D
Figure 13. Transconductance Variation with Drain
Figure 14. SO-8 Maximum Steady-State Power
Current and Temperature
.
Dissipation versus Copper Mounting Pad Area.
50
30
8.5
8
7.5
7
1a
10
5
2
1
0.5
6.5
6
V
GS
= -10V
SINGLE PULSE
1b
1c
0.1
4.5″x5″ FR-4 Board
T
A
Still Air
V
G
S
–
10V
= C
25
o
0.05
R
= See Note 1c
JA
q
5.5
5
T
A
= 25°C
=
0.01
0.1
0.2
0.5
1
2
5
10
20 30
50
0
0.2
0.4
0.6
0.8
1
2
– V
, DRAIN-SOURCE VOLTAGE (V)
2oz COPPER MOUNTING PAD AREA (in
)
DS
Figure 15. Maximum Steady- State Drain
Figure 16. Maximum Safe Operating Area
.
Current versus Copper Mounting Pad
Area.
1
D = 0.5
0.5
0.2
0.2
0.1
R
(t) = r(t)
* R
q
JA
JA
q
0.1
R
= See note 1c
JA
q
0.05
0.05
0.02
0.01
P(pk)
0.02
0.01
t
1
t
2
Single Pulse
0.005
T
– T
= P
* R
(t)
J
A
JA
q
Duty Cycle, D =
t
1
/t
0.002
0.001
2
0.0001
0.001
0.01
0.1
, TIME (sec)
1
10
100
300
t
1
Figure 17. Transient Thermal Response Curve
.
Note: Thermal
characterization performed using the conditions described in note 1c. Transient thermal response will change
depending on the circuit board design.
NDS8435A Rev.C
1
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QFET™
TinyLogic™
UHC™
VCX™
CROSSVOLT™
E
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CMOS
TM
FACT™
FACT Quiet Series™
QS™
FAST
®
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
FASTr™
GTO™
HiSeC™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILIT
Y
,
F
UNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
