onsemi-NFA41560R42
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DATA SHEET
Motion SPM
[
45 Series
NFA41560R42
General Description
NFA41560R42 is a Motion SPM 45 module providing a
fully
−
featured, high
−
performance inverter output stage for AC
Induction, BLDC, and PMSM motors. These modules integrate
optimized gate drive of the built
−
in RC
−
IGBTs to minimize EMI and
losses, while also providing multiple on
−
module protection features
including under
−
voltage lockouts, over
−
current shutdown, thermal
monitoring of drive IC, and fault reporting. The built
−
in, high
−
speed
HVIC requires only a single supply voltage and translates the
incoming logic
−
level gate inputs to the high
−
voltage, high
−
current
drive signals required to properly drive the module’s internal IGBTs.
Separate negative IGBT terminals are available for each phase to
support the widest variety of control algorithms.
3D Package Drawing (Click to Activate 3D Content)
SPMAA
−
C26 / 26LD, PDD STD CERAMIC TYPE,
LONG LEAD DUAL FORM TYPE
CASE MODFC
Features
•
600 V
−
15 A 3
−
Phase RC
−
IGBT Inverter with Integral Gate Drivers
and Protection
•
Low Thermal Resistance Using Ceramic Substrate
MARKING DIAGRAM
•
Low
−
Loss, Short
−
Circuit Rated FS4 RC
−
IGBTs
•
Built
−
In Bootstrap Diodes and Dedicated Vs Pins Simplify PCB
Layout
$Y
NFA41560R42
XXX
•
Built
−
In NTC Thermistor for Temperature Monitoring
YWW
•
Separate Open
−
Emitter Pins from Low
−
Side RC
−
IGBTs for
Three
−
Phase Current Sensing
•
Single
−
Grounded Power Supply
$Y
=
onsemi
Logo
•
Isolation Rating: 2000 V
/ Min.
rms
NFA41560R42 = Specific Device Code
XXX
Y
•
Remove Dummy Pin
•
This is a Pb
−
Free Device
= Trace Code
=
Y
e
ar
= Work Week
WW
Applications
•
Motion Control
−
Home Appliance / Industrial Motor
ORDERING INFORMATION
this data sheet.
Related Resources
[
User
’
s
G
uide
[
Thermal Performance Information
[
Mounting Guidance
[
©
Semiconductor Components Industries, LLC, 2021
1
Publication Order Number:
September, 2021
−
Rev. 0
NFA41560R42/D
NFA41560R42
Integrated Power Functions
•
For inverter low
−
side IGBTs: gate drive circuit,
Short
−
Circuit Protection (SCP) control supply
circuit Under
−
V
o
ltage Lock
−
Out Protection
(UVLO)
•
Fault signaling: corresponding to UVLO (low
−
side
supply) and SC faults
•
600 V
−
15 A IGBT inverter for three
−
phase DC / AC
Integrated Drive, Protection, and System Control
Functions
•
For inverter high
−
side IGBTs: gate drive circuit,
high
−
voltage isolated high
−
speed level shifting
control circuit Under
−
V
o
ltage Lock
−
Out
•
Input interface: active
−
HIGH interface, works with
3.3 / 5 V logic, Schmitt
−
trigger input
Protection (UVLO) NOTE: Available bootstrap
Pin Configuration
VB(U)(26)
VS(U)(25)
TH1(1)
TH2(2)
VB(V)(24)
VS(V)(23)
P(3)
U(4)
VB(W)(22)
VS(W)(21)
HIN(U)(20)
HIN(V)(19)
HIN(W)(18)
VDD(H)(17)
VDD(L)(16)
VSS(15)
Case Temperature (
T
c
)
Detecting Point
V(5)
W(6)
LIN(U)(14)
LIN(V)(13)
LIN(W)(12)
VFO(11)
NU(7)
NV(8)
ITRIP(10)
NW(9)
Figure 1. Top View
2
NFA41560R42
PIN DESCRIPTION
Pin No.
1
Pin Name
Description
TH1
TH2
Thermistor Bias Voltage
2
Series Resistor for the Use of Thermistor (
T
e
mperature Detection)
Positive DC
−
Link Input
3
P
4
U
Output for U
−
Phase
5
V
Output for V
−
Phase
6
W
Output for W
−
Phase
7
NU
Negative DC
−
Link Input for U
−
Phase
Negative DC
−
Link Input for V
−
Phase
Negative DC
−
Link Input for W
−
Phase
Input for Current Protection
8
NV
9
NW
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
ITRIP
VFO
Fault Output
LIN(W)
LIN(V)
LIN(U)
VSS
Signal Input for Low
−
Side W
−
Phase
Signal Input for Low
−
Side V
−
Phase
Signal Input for Low
−
Side U
−
Phase
Common Supply Ground
VDD(L)
VDD(H)
HIN(W)
HIN(V)
HIN(U)
VS(W)
VB(W)
VS(V)
VB(V)
VS(U)
VB(U)
Low
−
Side Common Bias Voltage for IC and IGB
T
s
D
riving
High
−
Side Common Bias Voltage for IC and IGB
T
s
D
riving
Signal Input for High
−
Side W
−
Phase
Signal Input for High
−
Side V
−
Phase
Signal Input for High
−
Side U
−
Phase
High
−
Side Bias Voltage Ground for W
−
Phase IGBT Driving
High
−
Side Bias Voltage for W
−
Phase IGBT Driving
High
−
Side Bias Voltage Ground for V
−
Phase IGBT Driving
High
−
Side Bias Voltage for V
−
Phase IGBT Driving
High
−
Side Bias Voltage Ground for U
−
Phase IGBT Driving
High
−
Side Bias Voltage for U
−
Phase IGBT Driving
3
NFA41560R42
Internal Equivalent Circuit and Input/Output Pins
TH1 (1)
TH2 (2)
Thermistor
P (3)
(26) VB(U)
UVB
UVS
(25) VS(U)
OUT(UH)
UVS
(24) VB(V)
(23) VS(V)
U (4)
VVB
VVS
(22) VB(W)
(21) VS(W)
WVB
WVS
OUT(VH)
VVS
(20) HIN(U)
V (5)
HIN(U)
(19) HIN(V)
(18) HIN(W)
HIN(V)
HIN(W)
VDD
(17) VDD(H)
OUT(WH)
WVS
VSS
W (6)
(16) VDD(L)
(15) VSS
VDD
OUT(UL)
OUT(VL)
VSS
NU (7)
NV (8)
NW (9)
(14) LIN(U)
(13) LIN(V)
LIN(U)
LIN(V)
(12) LIN(W)
(11) VFO
LIN(W)
VFO
(10) ITRIP
ITRIP
OUT(WL)
NOTE:
1. Inverter
high
−
side is composed of three RC
−
IGB
T
s
a
nd one control IC for each IGB
T
.
2. Inverter
low
−
side is composed of three RC
−
IGB
T
s
a
nd one control IC for each IGB
T
.
I
t has gate drive and protection functions.
3. Inverter
power side is composed of four inverter DC
−
link input terminals and three inverter output terminals.
Figure 2. Internal Block Diagram
4
NFA41560R42
ABSOLUTE MAXIMUM RATINGS
(Tj = 25
°
C, unless otherwise noted)
Symbol
Parameter
Conditions
Rating
Unit
INVERTER PART
VPN
Supply Voltage
P
−
NU, N
V
,
N
W
450
500
V
V
VPN(surge) Supply
Voltage (Surge)
P
−
NU, N
V
,
N
W
Vces
Ic
Collector
−
Emitter Voltage
Each IGBT Collector Current
Each IGBT Collector Current (Peak)
Collector Dissipation
600
V
Tc =
2
5
°
C
15
A
Icp
Pc
Tj
Tc =
2
5
°
C, Under 1 ms Pulse Width
30
A
45
W
°
C
Operating Junction
T
e
mperature
−
40~150
CONTROL PART
VDD
VBS
Control Supply Voltage
VDD(H), VDD(L)
−
VSS
20
20
V
V
High
−
Side Control Bias Voltage
VB(U)
−
VS(U), VB(V)
−
VS(V),
VB(W)
−
VS(W)
VIN
Input Signal Voltage
HIN(U), HIN(V), HIN(W),
LIN(U), LIN(V), LIN(W)
−
VSS
−
0.3~VDD + 0.3
V
VFO
IFO
Fault Output Supply Voltage
Fault Output Current
VFO
−
VSS
−
0.3~VDD + 0.3
1
V
mA
V
Sink Current at VFO pin
ITRIP
−
VSS
VITRIP
Current
−
Sensing Input Voltage
−
0.3~VDD + 0.3
BOOTSTRAP DIODE PART
VRRM
Maximum Repetitive Reverse Voltage
600
0.5
2.0
V
A
A
If
Forward Current
Tc =
2
5
°
C
Ifp
Forward Current (Peak)
Tc =
2
5
°
C, Under 1 ms Pulse Width
Tj
Operating Junction
T
e
mperature
−
40~150
°
C
TOTAL SYSTEM
VPN(PROT) Self
−
Protection Supply Voltage Limit (Short
−
Circuit
VDD = VBS = 13.5~16.5 V
Tj = 150
°
C, Vces < 600 V
Non
−
Repetitive, < 2
m
s
400
V
Protection Capability)
Tc
Module Case Operation
T
e
mperature
Storage
T
e
mperature
−
40~125
−
40~125
2000
°
C
°
C
T
s
tg
Viso
Isolation Voltage
60 Hz, Sinusoidal, AC 1 minute,
Connection Pins to Heat Sink Plate
V
rms
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
4. These
values had been made an acquisition by the calculation considered to design factor.
ABSOLUTE MAXIMUM RATINGS
(Tj = 25
°
C, unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
THERMAL RESISTANCE
Rth(j
−
c)Q Junction
to Case Thermal Resistance
Inverter IGBT Part (per 1/6 module)
Inverter FWDi Part (per 1/6 module)
−
−
−
−
2.75
4.2
°
C/W
°
C/W
Rth(j
−
c)F
5
NFA41560R42
ELECTRICAL CHARACTERISTICS
(Tj = 25
°
C, unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
INVERTER PART
VCE(sat)
Collector
−
Emitter
VDD = VBS = 15
V
,
I
N =
5
V
,
I
c = 15 A, Tj = 25
°
C
IN = 0
V
,
I
c =
−
15 A, Tj = 25
°
C
−
1.5
2.1
V
Saturation Voltage
VF
FWDi Forward Voltage
Switching Times
−
−
−
−
−
−
−
−
−
−
−
−
1.75
0.75
0.12
0.85
0.14
0.13
0.80
0.15
0.90
0.14
0.18
−
2.35
−
V
m
s
m
s
m
s
m
s
m
s
m
s
m
s
m
s
m
s
m
s
mA
HS
ton
tc(on)
toff
VPN = 300
V
,
V
DD(H) = VDD(L) = 15
V
,
I
c = 15 A,
−
−
tc(off)
trr
−
−
LS
ton
VPN = 300
V
,
V
DD(H) = VDD(L) = 15
V
,
I
c = 15 A,
−
tc(on)
toff
−
−
tc(off)
trr
−
−
Ices
Collector
−
Emitter
Leakage Current
Vce = Vces
1
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. ton
and toff include the propagation delay time of the internal drive IC. tc(on) and tc(off) are the switching time of IGBT itself under the given
100% Ic
100% Ic
trr
Vce
Ic
Ic
Vce
VIN
toff
VIN
ton
tc(on)
tc(off)
10% Ic
VIN(on)
VIN(off)
10% Vce
(b) Turn
−
off
10% Ic
90% Ic
10% Vce
(a) Turn
−
on
Figure 3. Switching Time Definitions
6
NFA41560R42
INDUCTIVE LOAD, VPN = 300
V
,
V
DD = 15
V
,
T
j = 25
°
C
INDUCTIVE LOAD, VPN = 300
V
,
V
DD = 15
V
,
T
j = 150
°
C
1000
800
600
400
1000
800
600
400
IGBT Turn
−
on, Eon
IGBT Turn
−
off, Eoff
FRD Turn
−
off, Erec
IGBT Turn
−
on, Eon
IGBT Turn
−
off, Eoff
FRD Turn
−
off, Erec
200
0
200
0
0
5
10
15
0
5
10
15
Ic, COLLECTOR CURRENT (A)
Ic, COLLECTOR CURRENT (A)
Figure 4. Switching Loss Characteristics (Typical)
ELECTRICAL CHARACTERISTICS
(Tj = 25
°
C, unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
CONTROL PART
IQDDH
IQDDL
IPDDH
Quiescent VDD Supply
VDD(H) = 15
V
, HIN = 0 V, VDD(H)
−
VSS
−
−
−
−
−
−
0.10
2.65
0.15
mA
mA
mA
Current
VDD(L) = 15 V, LIN = 0 V, VDD(L)
−
VSS
Operating VDD Supply
VDD(H) = 15
V
,
f
PWM = 20 kHz, Duty = 50%,
Current
Applied to One PWM Signal Input for High
−
Side
IPDDL
IQBS
IPBS
VDD(L) = 15
V
,
f
PWM = 20 kHz, Duty = 50%,
−
−
−
−
−
−
4.00
0.30
2.00
mA
mA
mA
Applied to One PWM Signal Input for Low
−
Side
Quiescent VBS Supply
VDD(H) = 15
V
, HIN = 0 V, VB(U)
−
VS(U), VB(V)
−
VS(V),
Current VB(W)
−
VS(W)
Operating VBS Supply
VDD(H) = 15
V
,
f
PWM = 20 kHz, Duty = 50%,
Current
Applied to One PWM Signal Input for High
−
Side
VFOH
VFOL
Fault Output Voltage
VDD = 0
V
,
I
TRIP = 0
V
,
V
FO Circuit: 10 k
W
to 5 V Pull
−
up
VDD = 0
V
,
I
TRIP = 1
V
,
V
FO Circuit: 10 k
W
to 5 V Pull
−
up
4.5
−
−
−
−
V
V
0.5
VSC(ref)
UVDDD
UVDDR
UVBSD
UVBSR
tFOD
Short Circuit Trip Level
VDD = 15 V, ITRIP
−
VSS
0.45
10.5
11.0
10.0
10.5
30
0.50
−
0.55
13.0
13.5
12.5
13.0
−
V
Supply Circuit
Under
−
Voltage
Protection
Detection Level
Reset Level
V
−
V
Supply Circuit
Under
−
Voltage
Protection
Detection Level
Reset Level
−
V
−
V
Fault
−
Output Pulse
Width
−
m
s
VIN(ON)
VIN(OFF)
RTH
ON Threshold Voltage
OFF Threshold Voltage
HIN
−
VSS, LIN
−
VSS
−
0.8
−
−
−
2.6
−
V
V
Resistance of
Thermistor
@ TTH = 25
°
C
@ TTH = 100
°
C
47
2.9
−
k
W
k
W
−
−
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
7. Short
−
circuit current protection is functioning only at the low
−
sides.
8. TTH
is the temperature of thermistor itself.
T
o
k
now case temperature (
T
c
), please make the experiment considering your application.
7
NFA41560R42
R
−
T Curve
600
550
500
450
400
350
300
250
200
150
100
50
R
−
T Curve in 50
°
C~125
°
C
20
16
12
8
4
0
50
60
70
80
90 100
110 120
T
e
mperature (
°
C)
0
−
20
−
10
0
10
20
30
40
50
60
70
80
90 100
110 120
T
e
mperature TTH (
°
C)
Figure 5. R
−
T Curve of The Built
−
In Thermistor
ELECTRICAL CHARACTERISTICS
(Tj = 25
°
C, unless otherwise noted)
Symbol Parameter
Conditions
BOOTSTRAP DIODE PART
Min
Typ
Max
Unit
VF
trr
Forward Voltage
If = 0.1 A,
T
c =
2
5
°
C
−
−
2.5
80
−
−
V
Reverse
−
Recovery Time
If = 0.1 A, dlf/dt = 50 A/
m
s,
T
c =
2
5
°
C
ns
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
Built
−
In Bootstrap Diode VF
−
If Characteristic
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
Tc =
2
5
°
C
0.0
0
1
2
3
4
5
6
7
8
9 10
11 12 13
14 15
VF [V]
NOTE:
9. Built
−
in bootstrap diode includes around 15
W
resistance characteristic.
Figure 6. Built
−
In Bootstrap Diode Characteristics (Typ.)
8
NFA41560R42
RECOMMENDED OPERATING CONDITIONS
Symbol
VPN
Parameter
Supply Voltage
Conditions
Min
−
Typ
300
15.0
15.0
−
Max
400
16.5
18.5
1
Unit
V
P
−
NU, N
V
,
N
W
VDD
Control Supply Voltage
High
−
Side Bias Voltage
Control Supply Variation
VDD(H), VDD(L)
−
VSS
13.5
13.0
−
1
V
VBS
VB(U)
−
VS(U), VB(V)
−
VS(V), VB(W)
−
VS(W)
V
dVDD/dt,
dVBS/dt
V/
m
s
tdead
Blanking Time for Preventing
For each input signal
Arm
−
Short
1
−
−
m
s
fPWM
VSEN
PWM Input Signal
−
40
°
C
≤
T
c
≤
125
°
C,
−
40
°
C
≤
Tj
≤
150
°
C
−
−
−
20
4
kHz
V
Voltage for Current Sensing
Applied between NU, N
V
,
N
W
−
VSS
(Including Surge
−
Voltage)
−
4
PWIN(ON) Minimum
Input Pulse Width
PWIN(OFF)
VDD = VBS = 15
V
,
I
c
≤
30 A, Wiring Inductance
between NU, N
V
,
N
W and DC Link N < 10 nH
1.2
1.2
−
−
−
−
−
m
s
Tj
Junction
T
e
mperature
−
40
150
°
C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
10
.
T
his product might not make response if input pulse width is less than the recommended value.
9
NFA41560R42
MECHANICAL CHARACTERISTICS AND RATINGS
Parameter
Device Flatness
Conditions
Min
0
Typ
−
Max
+120
0.8
Unit
m
m
Mounting
T
o
rque
Mounting Screw: M3
Recommended 0.7 N · m
Recommended 7.1 kg · cm
0.6
6.2
−
0.7
N · m
kg · cm
g
7.1
8.1
Weight
11.00
−
Figure 7. Flatness Measurement Position
NOTE:
11. Do not make over torque when mounting screws. Much mounting torque may cause ceramic cracks, as well as bolts and Al heat
−
sink
destruction.
12
.
A
void one
−
sided tightening stress. Figure 8
shows the recommended torque order for mounting screws. Uneven mounting can cause the
ceramic substrate of package to be damaged. The pre
−
screwing torque is set to 20~30% of maximum torque rating.
Figure 8. Mounting Screws Torque Order
10
NFA41560R42
Time Charts of Protective Function
Input Signal
Protection
Circuit State
RESET
a1
SET
RESET
UVDDR
a6
UVDDD
a3
Control
Supply Voltage
a2
a7
a4
Output Current
a5
Fault Output Signal
a1: Control supply voltage rises: After the voltage rises UVDDR, the circuits start to operate when next input is applied.
a2: Normal operation: IGBT ON and carrying current.
a3: Under voltage detection (UVDDD).
a4: IGBT OFF in spite of control input condition.
a5: Fault output operation starts with a fixed pulse width.
a6: Under voltage reset (UVDDR).
a7: Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH.
Figure 9. Under
−
Voltage Protection (Low
−
Side)
Input Signal
Protection
RESET
b1
SET
RESET
Circuit State
UVBSR
b5
UVBSD
b2
Control
Supply Voltage
b3
b4
b6
Output Current
High
−
level (no fault output)
Fault Output Signal
b1: Control supply voltage rises: After the voltage reaches UV
b2: Normal operation: IGBT ON and carrying current.
b3: Under voltage detection (UVBSD).
, the circuits start to operate when next input is applied.
BSR
b4: IGBT OFF in spite of control input condition, but there is no fault output signal.
b5: Under voltage reset (UVBSR).
b6: Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH.
Figure 10. Under
−
Voltage Protection (High
−
side)
11
NFA41560R42
Lower Arms
Control Input
c6 c7
Protection
Circuit State
SET
RESET
Internal IGBT
Gate
−
Emitter Voltage
c4
c3
c2
SC
c1
c8
Output Current
SC Reference
Voltage
Sensing Voltage
of Shunt Resistance
CR Circuit Time
Constant Delay
c5
Fault Output Signal
(with the external sense resistance and RC filter connection)
c1: Normal operation: IGBT ON and carrying current.
c2: Short circuit current detection (SC trigger).
c3: All low
−
side IGBT’s gate are hard interrupted.
c4: All low
−
side IGBT’s turn OF
F
.
c5: Fault output operation starts with a fixed pulse width.
c6: Input HIGH: IGBT ON state, but during the active period of fault output the IGBT doesn’t turn ON.
c7: Fault output operation finishes, but IGBT doesn’t turn on until triggering next signal from LOW to HIGH.
c8: Normal operation: IGBT ON and carrying current.
Figure 11. Short
−
Circuit Protection (Low
−
Side Operation Only)
+5 V (for MCU or Control power)
RPF = 10 k
W
SPM
HIN(U), HIN(V), HIN(W)
LIN(U), LIN(V), LIN(W)
MCU
VFO
VSS
NOTE:
13
.
R
C coupling at each input might change depending on the PWM control scheme used in the application and the wiring impedance of the
application’s printed circuit board. The input signal section of the Motion SPM 45 product integrates 5 k
W
(
typ.) pull
−
down resistor.
Therefore, when using an external filtering resistor, please pay attention to the signal voltage drop at input terminal.
Figure 12. Recommended MCU I/O Interface Circuit
12
NFA41560R42
HVIC
(26) VB(U)
P (3)
U (4)
VB (U)
C3
C3
C3
C4
C4
(25) VS(U)
(20) H
N
I (U)
VS (U)
HIN(U)
OUT(UH)
VS (U)
R1
R1
R1
Gating UH
Gating VH
Gating WH
(24) VB(V)
VB (V)
(23) VS(V)
(19) H
N
I (V)
VS (V)
HIN(V)
OUT(VH)
VS (V)
V ( 5)
(22) VB(W)
(21) VS(W)
M
VB (W)
VS (W)
C4
C4
(18) H
N
I (W)
(17) VDD(H)
HIN(W)
VDD
C6
VDC
M
C
U
OUT(WH)
VS (W)
15 V line
C2
W (6)
C1
C1
C1
(15) VSS
VS S
5V line
C4
LVIC
(16) VDD(L)
VDD
VFO
OUT(UL)
R2
C1
C2
A
R3
NU (7)
NV (8)
NW (9)
R1
(11) VFO
Fault
C1
OUT(VL)
R1
(14)
L
I
N(U)
(13)
L
I
N(V)
(12)
L
I
N(W)
Gating UL
Gating VL
Gating WL
LI N(U)
LI N(V)
LI N(W)
R3
R1
R1
Shunt
Resistor
E
Power
GND Line
C5
OUT(WL)
VS S
(10) IT
R
I
P
(1) TH1
C1 C1
C1
R3
ITRIP
R5
D
B
R4
THERMISTOR
(2) TH2
Control
GND Line
C
U-Phase Current
V-Phase Current
Input Signal for
Short
−
Circuit Protection
W-Phase Current
Temp. Monitoring
NOTE:
14
.
T
o
a
void malfunction, the wiring of each input should be as short as possible (less than 2
−
3 cm).
15
.
V
FO output is open
−
drain type. This signal line should be pulled up to the positive side of the MCU or control power supply with a resistor
that makes IFO up to 1 mA.
16
.
I
nput signal is active
−
HIGH type. There is a 5k
W
resistor inside the IC to pull down each input signal line to GND. RC coupling circuits is
recommended for the prevention of input signal oscillation. R1C1 time constant should be selected in the range 50~150 ns (recommended
R1 = 100
W
, C1 = 1 nF).
17
.
E
ach wiring pattern inductance of point A should be minimized (recommend less than 10 nH). Use the shunt resistor R3 of surface mounted
(SMD) type to reduce wiring inductance.
T
o
p
revent malfunction, wiring of point E should be connected to the terminal of the shunt resistor
R3 as close as possible.
18
.
T
o
i
nsert the shunt resistor to measure each phase current at NU, N
V
,
N
W terminal, it makes to change the trip level ISC about the short
−
cir-
cuit current.
19
.
T
o
p
revent errors of the protection function, the wiring of point B, C, and D should be as short as possible.
20
.
I
n the short
−
circuit protection circuit, please select the R5C5 time constant in the range 1.5~2
m
s. Do enough evaluation on the real system
because short
−
circuit protection time may vary wiring pattern layout and value of the R5C5 time constant.
21
.
E
ach capacitor should be mounted as close to the pins of the Motion SPM 45 product as possible.
22
.
T
o
p
revent surge destruction, the wiring between the smoothing capacitor C6 and the P & GND pins should be as short as possible. The
use of a high
−
frequency non
−
inductive capacitor of around 0.1~0.22
m
F between the P and GND pins is recommended.
23
.
R
elays are used in almost every systems of electrical equipment in home appliances. In these cases, there should be sufficient distance
between the MCU and the relays.
24
.
T
he zener diode or transient voltage suppressor should be adopted for the protection of ICs from the surge destruction between each pair
of control supply terminals (recommended zener diode is 22 V / 1 W, which has the lower zener impedance characteristic than about 15
W
).
25
.
C
2 of around seven times larger than bootstrap capacitor C3 is recommended.
26
.
P
lease choose the electrolytic capacitor with good temperature characteristic in C3. Also, choose 0.1~0.2
m
F R
−
category ceramic capacitors
with good temperature and frequency characteristics in C4.
Figure 13. Typical Application Circuit
13
NFA41560R42
ORDERING INFORMATION
Device
Device Marking
Package
Shipping
NFA41560R42
NFA41560R42
SPMAA
−
C26 / 26LD, PDD STD CERAMIC TYPE,
LONG LEAD DUAL FORM TYPE
(Pb
−
Free)
12 Units / Rail
SPM is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
14
NFA41560R42
PACKAGE DIMENSIONS
SPMAA
−
C26 / 26LD, PDD STD CERAMIC TYPE, LONG LEAD DUAL FORM TYPE
CASE MODFC
ISSUE O
15
NFA41560R42
onsemi
,
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onsemi
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onsemi
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onsemi’s
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onsemi
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onsemi
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onsemi
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