onsemi-NFAM2012L5BT
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Intelligent Power Module (IPM)
1200
V
,
2
0 A
Advance Information
NFAM2012L5BT
The NFAM2012L5BT is a fully
−
integrated inverter power module
consisting of an independent High side gate driver, LVIC, six IGBT’s
and a temperature sensor (TSU by LVIC and NTC Thermistor),
suitable for driving permanent magnet synchronous (PMSM) motors,
brushless DC (BLDC) motors and AC asynchronous motors. The
IGBT’s are configured in a three
−
phase bridge with separate emitter
connections for the lower legs for maximum flexibility in the choice of
control algorithm.
The power stage has under
−
voltage lockout protection (UVP).
Internal boost diodes are provided for high side gate boost drive.
Features
•
Three
−
phase 1200
V
,
2
0 A IGBT Module with Independent Drivers
•
Active Logic Interface
•
Built
−
in Under
−
voltage Protection (UVP)
CASE MODGC
MINI DIP39, 31.0×54.5
•
Integrated Bootstrap Diodes and Resistors
•
Separate Low
−
side IGBT Emitter Connections for Individual Current
Sensing of Each Phase
MARKING DIAGRAM
•
Temperature Sensor (TSU Output by LVIC or NTC Thermistor)
•
UL Certification: *Applied
•
This is a Pb
−
Free Device
NFAM2012L5BT
ZZZATYWW
Typical Application
•
Industrial Drives
•
Industrial Pumps
•
Industrial Fans
NFAM2012L5BT = Specific Device Code
ZZZ
A
= Assembly Lot Code
= Assembly Location
=
T
e
st Location
=
Y
e
ar
T
Y
•
Industrial Automation
W
P
U
V
RTH VTH
WW
= Work Week
VS(U)
VB(U)
VDD(UH)
HIN(U)
High Side
HVIC1
Device marking is on package top side
HS1
VS(V)
VB(V)
VDD(VH)
HIN(V)
VS(W)
VB(W)
High Side
HVIC2
ORDERING INFORMATION
HS2
HS3
HS2
HS3
HS1
LS1
†
Shipping
High Side
HVIC3
(Qty / Packing)
VDD(WH)
HIN(W)
Package
Device
LS2
LS3
VTS
LIN(U)
LIN(V)
LIN(W)
VFO
90 / BOX
NFAM2012L5BT DIP39,
31.0×54.5
Low Side
LVIC
with
Protection
LS1
LS2
LS3
(Pb
−
Free)
CFOD
CIN
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our
T
a
pe and Reel Packaging Specification
Brochure, BRD8011/D.
VSS
VDD(L)
NU
NV
NW
Figure 1. Application Schematic
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
©
Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
October, 2019
−
Rev. P0
NFAM2012L5BT/D
NFAM2012L5BT
5V line
RTH (39)
VTH (38)
VB(U) (3)
VS(U) (1)
P (37)
CS
+
C1
VB
HOUT
HIN (U) (6)
HIN
VDD(UH) (4)
HVIC 1
VDD
VSS
U (36)
VS
VB(V) (9)
VS(V) (7)
VB
HIN (V) (12)
HIN
HOUT
VDD(VH) (10)
HVIC 2
VDD
VSS
V (35)
VS
Motor
VB(W) (15)
VS(W) (13)
MCU
VB
HOUT
HIN (W) (18)
HIN
VDD(WH) (16)
HVIC 3
VDD
VSS
W (34)
VS
VTS (20)
VTS
OUT(U)
LIN(U) (21)
LIN(V) (22)
LIN(W) (23)
LIN(U)
LIN(V)
LIN(W)
NU (33)
5V line
LVIC
VFO (24)
OUT(V)
OUT(W)
VFO
CFOD (25)
CFOD
CIN
NV (32)
NW (31)
CIN (26)
15V line
VDD(L) (28)
VDD
VSS (27)
VSS
Signal for short circuit trip
Phase current
Figure 2. Application Schematic
−
Adjustable Option
2
NFAM2012L5BT
RTH (39
* NTC
Thermistor
VTH (38)
P (37)
VS(U) (1)
VB (U) (3)
VB
VDD (UH ) (4)
HIN (U) (6)
HOUT
VDD
HVIC 1
HIN
V S
VSS
U (36)
V (3
5
)
W (34)
VS
(
V
)
(
7)
V
B
(
V)(9)
VB
VDD
(
V
H
)
(
1
0
)
HIN (
V
) (
1
2
)
HOUT
VDD
HIN
HVIC 2
VS
VSS
VS(W) (1
3
)
V
B
(W) (
1
5
)
VB
VDD (WH ) (1
6
)
HIN (W) (1
8
)
HOUT
VDD
HIN
HVIC 3
VS
VSS
OUT (
U
)
VTS
V
T
S (20)
LIN (
U
)
(
2
1
)
LIN (
V
) (2
2
)
LIN (
W
)
(
2
3
)
VFO (2
4
)
LI
N
(U)
LI
N
(V)
NU (3
3
)
NV (3
2
)
NW (3
1
)
LI
N
(W)
VFO
OUT (V)
LVIC
CFOD
CIN
CFOD (2
5
)
CIN (2
6
)
VSS
VSS (2
7
)
OUT (W)
VDD (L) (2
8
)
VDD
Figure 3. Equivalent Block Diagram
3
NFAM2012L5BT
Table 1. PIN FUNCTION DESCRIPTION
Pin
1
Name
VS(U)
−
Description
High
−
Side Bias Voltage GND for U Phase IGBT Driving
Dummy
(2)
3
VB(U)
VDD(UH)
−
High
−
Side Bias Voltage for U Phase IGBT Driving
High
−
Side Bias Voltage for U Phase IC
Dummy
4
(5)
6
HIN(U)
VS(V)
−
Signal Input for High
−
Side U Phase
High
−
Side Bias Voltage GND for V Phase IGBT Driving
Dummy
7
(8)
9
VB(V)
VDD(VH)
−
High
−
Side Bias Voltage for V Phase IGBT Driving
High
−
Side Bias Voltage for V Phase IC
Dummy
10
(11)
12
13
(14)
15
16
(17)
18
(19)
20
21
22
23
24
25
26
27
28
(29)
(30)
31
32
33
34
35
36
37
38
39
HIN(V)
VS(W)
−
Signal Input for High
−
Side V Phase
High
−
Side Bias Voltage GND for W Phase IGBT Driving
Dummy
VB(W)
VDD(WH)
−
High
−
Side Bias Voltage for W Phase IGBT Driving
High
−
Side Bias Voltage for W Phase IC
Dummy
HIN(W)
−
Signal Input for High
−
Side W Phase
Dummy
VTS
LIN(U)
LIN(V)
LIN(W)
VFO
CFOD
CIN
Voltage Output for LVIC
T
e
mperature Sensing Unit
Signal Input for Low
−
Side U Phase
Signal Input for Low
−
Side V Phase
Signal Input for Low
−
Side W Phase
Fault Output
Capacitor for Fault Output Duration Selection
Input for Current Protection
VSS
VDD(L)
−
Low
−
Side Common Supply Ground
Low
−
Side Bias Voltage for IC and IGB
T
s
D
riving
Dummy
−
Dummy
NW
Negative DC
−
Link Input for U Phase
Negative DC
−
Link Input for V Phase
Negative DC
−
Link Input for W Phase
Output for U Phase
NV
NU
W
V
Output for V Phase
U
Output for W Phase
P
Positive DC
−
Link Input
VTH
RTH
Thermistor Bias Voltage (T) / Not connection
Series Resister for Thermistor (
T
e
mperature Detection)
*optional for T
4
NFAM2012L5BT
C
Rating
Symbol
Conditions
P
−
NU, N
V
,
N
W
Value
900
Unit
V
Supply Voltage
VPN
Supply Voltage (Surge)
VPN(Surge)
VPN(PROT)
1000
800
V
Self Protection Supply Voltage Limit
(Short
−
Circuit Protection Capability
VDD = VBS = 13.5 V ~ 16.5
V
,
Ti = 150
°
C, Vces < 1200 V,
Non
−
Repetitive, < 2 us
V
Collector
−
Emitter Voltage
Vces
VRRM
Ic
1200
1200
V
V
A
A
V
V
Maximum Repetitive Revers Voltage
Each IGBT Collector Current
20
Each IGBT Collector Current (Peak)
Icp
Under 1 ms Pulse Width
40
Control Supply Voltage High
−
Side
Control Bias Voltage
VDD
VBS
VDD(UH, VH, WH), VDD(L)
−
VSS
−
0.3 to 20
−
0.3 to 20
VB(U)
−
VS(U), VB(V)
−
VS(V),
VB(W)
−
VS(W)
Input Signal Voltage
VIN
HIN(U), HIN(V), HIN(W), LIN(U), LIN(V),
LIN(W)
−
VSS
−
0.3 to VDD
V
Fault Output Supply Voltage
Fault Output Current
VFO
IFO
VCIN
Pc
VFO
−
VSS
−
0.3 to VDD
2
V
mA
V
Sink Current at VFO pin
CIN
−
VSS
Current Sensing Input Voltage
Corrector Dissipation
−
0.3 to VDD
125
Per One Chip
W
Operating Junction
T
e
mperature
Storage
T
e
mperature
Tj
−
40 to +150
−
40 to +125
−
40 to +125
2500
°
C
T
s
tg
Tc
°
C
Module Case Operation
T
e
mperature
Isolation Voltage
°
C
Viso
60 Hz, Sinusoidal, AC 1 minute,
Connection Pins to Heat Sink Plate
V rms
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer
to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERA
TING RANGES
and/or APPLICATION INFORMATION for Safe
Operating parameters.
2. This
surge voltage developed by the switching operation due to the wiring inductance between P and NU, N
V
,
N
W terminal.
Table 3. THERMAL CHARACTERISTICS
Rating
Symbol
Rth(j
−
c)Q
Rth(j
−
c)F
Conditions
Min
−
Typ
−
Max
1.0
Unit
°
C/W
°
C/W
Junction to Case Thermal
Resistance
Inverter IGBT Part
(per 1/6 Module)
Inverter FRD Part
(per 1/6 Module)
−
−
1.2
3. Refer
to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERA
TING RANGES
and/or APPLICATION INFORMATION for Safe
Operating parameters.
Rating
Supply Voltage
Symbol
VPN
Conditions
P
−
NU, N
V
,
N
W
Min
−
Typ
600
15
Max
800
Unit
V
Gate Driver Supply Voltages
VDD
VDD(UH, VH, WH), VDD(L)
−
VSS
13.5
13.0
16.5
18.5
V
VBS
VB(U)
−
VS(U), VB(V)
−
VS(V),
VB(W)
−
VS(W)
15
V
Supply Voltage Variation
dVDD / dt
dVBS / dt
−
1
−
−
1
V/
m
s
PWM Frequency
Dead Time
fPWM
DT
1
3
20
kHz
Turn
−
off to Turn
−
on (external)
−
m
s
5
NFAM2012L5BT
Rating
Symbol
Conditions
Min
Typ
Max
Unit
Allowable r.m.s. Current
Io
VPN =
600
V
,
VDD = VBS = 15
V
,
P
.
F
. =
0
.8,
Tc
≤
125
°
C, Tj
≤
150
°
C,
(Note 5)
fPWM =
5 kHz
−
−
18.1
A rms
fPWM =
15 kHz
−
−
9.4
Allowable Input Pulse Width
Package Mounting
T
o
rque
PWIN (on)
PWIN (off)
400 V
≤
VPN
≤
800 V,
13.5 V
≤
VDD
≤
16.5 V,
13.0 V
≤
VBS
≤
18.5 V,
−
40
°
C
≤
T
c
≤
150
°
C
2.0
2.5
0.6
−
−
−
−
m
s
M3 Type Screw
0.7
0.9
Nm
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
4. Allowable
r.m.s Current depends on the actual conditions.
5. Flatness
tolerance of the heatsink should be within
−
50
m
m to +100
m
m.
Table 5. ELECTRICAL CHARACTERISTICS
(
T
c =
2
5
°
C, VD = 15 V,
unless otherwise noted) (Note 6) (continued)
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
INVERTER SECTION
Collector
−
Emitter Leakage
Vce = Vces, Tj = 25
°
C
Ices
−
−
−
−
−
1
mA
mA
V
Current
Vce = Vces, Tj = 150
°
C
10
2.5
Collector
−
Emitter Saturation
Voltage
VDD = VBS = 15
V
,
I
N = 5 V
Ic = 20 A, Tj = 25
°
C
VCE(sat)
1.85
VDD = VBS = 15
V
,
I
N = 5 V
Ic = 20 A, Tj = 150
°
C
−
2.00
−
V
FWDi Forward Voltage
IN = 0
V
,
I
f = 20 A, Tj = 25
°
C
IN = 0
V
,
I
f = 20 A, Tj = 150
°
C
VF
−
−
1.90
1.70
1.40
0.30
1.90
0.20
0.40
1.50
0.30
2.00
0.20
0.40
2.5
−
V
V
High Side
Low Side
Switching Times
VPN = 600
V
,
V
DD(H) = VDD(L) = 15 V
Ic = 20 A, Tj = 25
°
C, IN = 0
⇔
5 V
Inductive Load
ton
tc (on)
toff
0.80
−
2.00
0.60
2.70
0.60
−
m
s
m
s
m
s
m
s
m
s
m
s
m
s
m
s
m
s
m
s
−
tc (off)
trr
−
−
Switching Times
VPN = 600
V
,
V
DD(H) = VDD(L) = 15 V
Ic = 20 A, Tj = 25
°
C, IN = 0
⇔
5 V
Inductive Load
ton
0.90
−
2.10
0.60
2.80
0.60
−
tc (on)
toff
−
tc (off)
trr
−
−
DRIVER SECTION
Quiescent VDD Supply Current
VDD(UH,VH,WH) = 15
V
,
HIN(U,
V
,
W) = 0 V
VDD(UH)
−
VSS
VDD(VH)
−
VSS
VDD(WH)
−
VSS
IQDDH
−
−
0.30
mA
VDD(L) = 15 V,
VDD(L)
−
VSS
IQDDL
IPDDH
−
−
−
−
3.50
0.40
mA
mA
LIN(U,
V
,
W
) = 0 V
Operating VDD Supply Current
VDD(UH, VH, WH) = 15
V
,
fPWM = 20 kHz, Duty = 50%,
VDD(UH)
−
VSS
VDD(VH)
−
VSS
Applied to one PWM Signal Input
VDD(WH)
−
VSS
for High
−
Side
VDD(L) = 15 V,
VDD(L)
−
VSS
IPDDL
−
−
9.00
mA
fPWM = 20 kHz, Duty = 50%,
Applied to one PWM Signal Input
for Low
−
Side
6
NFAM2012L5BT
Parameter
DRIVER SECTION
Test Conditions
Symbol
Min
Typ
Max
Unit
Quiescent VBS Supply Current
VBS = 15 V
HIN(U,
V
,
W
) = 0 V
VB(U)
−
VS(U)
VB(V)
−
VS(V)
VB(W)
−
VS(W)
IQBS
−
−
0.30
mA
Operating VBS Supply Current
VDD = VBS = 15
V
,
fPWM = 20 kHz, Duty = 50%,
VB(U)
−
VS(U)
VB(V)
−
VS(V)
IPBS
−
−
8.00
mA
Applied to one PWM Signal Input
VB(W)
−
VS(W)
for High
−
Side
ON Threshold Voltage
OFF Threshold Voltage
Short Circuit Trip Level
HIN(U,
V
,
W
)
−
VSS, LIN(U,
V
,
W
)
−
VSS
VIN(ON)
VIN(OF)
VCIN(ref)
UVDDD
UVDDR
UVBSD
UVBSR
VTS
−
−
−
2.6
−
V
V
V
V
V
V
V
V
0.8
VDD = 15 V, CIN
−
VSS
Detection Level
0.46
10.3
10.8
10.0
10.5
0.48
−
0.50
12.5
13.0
12.0
12.5
Supply Circuit Under
−
Voltage
Protection
Reset Level
−
Detection Level
−
Reset Level
−
Voltage Output for LVIC
T
e
mperature Sensing Unit
VTS
−
VSS = 10 n
F
, T
e
mp. = 25
°
C
(0.905) (1.030) (1.155)
Fault Output Voltage
VDD = 0
V
, CIN = 0 V,
VFOH
VFOL
tFOD
4.9
−
−
−
−
0.95
−
V
V
VFO Circuit: 10 k
W
to 5 V Pull
−
up
VDD = 0
V
, CIN = 1 V,
VFO Circuit: 10 k
W
to 5 V Pull
−
up
Fault
−
Output Pulse Width
CFOD = 22 nF
1.6
2.4
ms
BOOTSTRAP SECTION
Bootstrap Diode Forward Current
If = 0.1 A
VF
3.4
30
4.6
38
5.8
46
V
Built
−
in Limiting Resistance
RBOOT
W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. Performance
guaranteed over the indicated operating temperature range by design and/or characterization tested at T
= T
= 25
_
C. Low
J
A
duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
7. The
fault
−
out pulse width tFOD depends on the capacitance value of CFOD according to the following approximate equation:
6
tFOD = (TBD) x 10
x CFOD (s).
8. Values
based on design and/or characterization.
4.0
3.5
3.0
2.5
2.0
1.5
1.0
40 45 50 55 60 65 70 75 80 85 90 95
100 105 110 115 120
125 130
LVIC Temperature (
°
C)
Figure 4. Temperature of LVIC versus VOT Characteristics
7
NFAM2012L5BT
Table 6. THERMISTOR CHARACTERISTIC
Parameter
Resistance
Symbol
Condition
Min
46.530
1.344
4009.5
−
40
Typ
47
Max
47.47
1.471
4090.5
+125
Unit
k
W
k
W
K
R
Tc =
2
5
°
C
25
Resistance
R
Tc =
1
25
°
C
1.406
4050
−
125
B
−
Constant (25
−
50
°
C)
T
e
mperature Range
−
B
−
−
°
C
10000
1000
min
typ
max
100
10
1
−
40
−
30
−
20
−
10
0
10 20 30 40 50 60 70
Case
T
e
mperature
80 90
100 110 120 130
Figure 5. Thermistor Resistance versus Case Temperature
8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
MINI DIP39, 31.0×54.5
CASE MODGC
ISSUE A
DATE 19 MAR 2019
GENERIC
MARKING DIAGRAM*
XXXXXXXXXXXXXXXXX
ZZZATYWW
XXXXX = Specific Device Code
ZZZ
AT
Y
= Assembly Lot Code
= Assembly &
T
e
st Location
=
Y
e
ar
*This information is generic. Please refer to device data
sheet for actual part marking. Pb
−
Free indicator, “G” or
microdot
“
G
”, may or may not be present. Some products
may not follow the Generic Marking.
WW =
Work Week
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON91300G
MINI DIP39, 31.0×54.5
PAGE 1 OF 1
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2018
onsemi
,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “
onsemi
” or its affiliates
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onsemi
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onsemi
’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
.
onsemi
reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as
−
is” and
onsemi
makes no warranty, representation or guarantee regarding the accuracy of the
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onsemi
assume any liability arising out of the application or use
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and applications using
onsemi
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provided by
onsemi
. “Typical” parameters which may be provided in
onsemi
data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
onsemi
does not convey any license
under any of its intellectual property rights nor the rights of others.
onsemi
products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use
onsemi
products for any such unintended or unauthorized application, Buyer shall indemnify and hold
onsemi
and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that
onsemi
was negligent regarding the design or manufacture of the part.
onsemi
is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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LITERATURE FULFILLMEN
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