onsemi-NSBC115TPDP6T5G
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NSBC115TPDP6
Complementary Bias
Resistor
T
r
ansistors
R1 = 100 k
W
, R2 =
8
k
W
NPN and PNP Transistors with Monolithic
Bias Resistor Network
PIN CONNECTIONS
(2)
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base
−
emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
(3)
(1)
R
1
R
2
Q
1
Q
2
Features
R
2
•
S and NSV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable
R
1
(4)
(5)
(6)
•
Simplifies Circuit Design
•
Reduces Board Space
•
Reduces Component Count
MARKING DIAGRAMS
•
These Devices are Pb
−
Free, Halogen Free/BFR Free and are RoHS
SOT
−
963
J
Compliant
M
CASE 527AD
MAXIMUM RATINGS
A
1
(T =
25
°
C both polarities Q1 (PNP) and Q2 (NPN), unless otherwise noted)
J
M
=
Specific Device Code
Rating
Collector
−
Base Voltage
Collector
−
Emitter Voltage
Collector Current
−
Continuous
Input Forward Voltage
Symbol
Max
50
Unit
Vdc
= Date
Code*
V
CBO
CEO
*Date Code orientation may vary depending upon
manufacturing location.
V
50
Vdc
I
C
100
40
mAdc
Vdc
V
IN(fwd)
Input Reverse Voltage
V
IN(rev)
Vdc
−
NPN
−
PNP
6
5
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
†
Device
Package
Shipping
NSBC115TPDP6T5G
SOT
−
963
8,000 /
T
a
pe & Reel
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our
T
a
pe and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2012
1
Publication Order Number:
June, 2017
−
Rev. 1
DTC115TP/D
NSBC115TPDP6
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
NSBC115TPDP6 (SOT
−
963) One Junction Heated
T
o
tal Device Dissipation
P
D
T =
25
°
C
231
269
1.9
2.2
mW
A
Derate above 25
°
C
mW/
°
C
Thermal Resistance,
Junction to Ambient
R
540
464
°
C/W
q
JA
T
o
tal Device Dissipation
P
D
T =
25
°
C
339
408
2.7
3.3
mW
A
Derate above 25
°
C
mW/
°
C
Thermal Resistance,
Junction to Ambient
R
369
306
°
C/W
°
C
q
JA
Junction and Storage
T
e
mperature Range
T , T
J
−
55 to +150
stg
2
2
1. FR
−
4 @ 100 mm
, 1 oz. copper traces, still air.
2. FR
−
4 @ 500 mm
, 1 oz. copper traces, still air.
3. Both
junction heated values assume total power is sum of two equally powered channels.
2
NSBC115TPDP6
ELECTRICAL CHARACTERISTICS
(T =
25
°
C both polarities Q
(PNP) and Q
(NPN), unless otherwise noted)
A
1
2
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector
−
Base Cutoff Current
I
I
nAdc
nAdc
mAdc
Vdc
CBO
(V =
50
V
, I
=
0
)
−
−
−
−
−
−
−
100
500
0.1
−
CB
E
Collector
−
Emitter Cutoff Current
(V =
50
V
, I
=
0
)
CEO
CE
B
Emitter
−
Base Cutoff Current
(V =
6.0
V
, I
=
0
)
I
EBO
−
EB
C
Collector
−
Base Breakdown Voltage
(I =
10
m
A, I
= 0)
V
V
(BR)CBO
(BR)CEO
50
50
C
E
(I =
2.0 mA, I
= 0)
Vdc
−
C
B
ON CHARACTERISTICS
h
FE
(I =
5.0 mA, V
= 10 V)
160
350
−
C
CE
(I =
10 mA, I
= 1.0 mA)
V
Vdc
Vdc
CE(sat)
−
−
0.25
C
B
Input Voltage (off)
(V =
5.0
V
, I
=
1
00
m
A) (NPN)
V
i(off)
i(on)
−
−
0.6
0.62
−
−
CE
C
(V =
5.0
V
, I
=
1
00
m
A) (PNP)
CE
C
Input Voltage (on)
(V =
0.2
V
, I
=
1
.0 mA) (NPN)
V
Vdc
−
−
1.0
1.0
−
−
CE
C
(V =
0.2
V
, I
=
1
.0 mA) (PNP)
CE
C
Output Voltage (on)
(V =
5.0
V
, V
=
3
.5
V
, R
=
1
.0 k
W
)
V
Vdc
Vdc
k
W
OL
−
−
0.2
CC
B
L
Output Voltage (off)
V
OH
(V =
5.0
V
, V
=
0
.25
V
, R
=
1
.0 k
W
)
4.9
70
−
−
100
−
−
130
−
CC
B
L
Input Resistor
Resistor Ratio
R1
R /R
1
2
4. Pulsed
Condition: Pulse Width = 300 msec, Duty Cycle
≤
2%.
250
200
(1)
2
(1) SOT
−
963; 100 mm
, 1 oz. copper trace
150
100
50
0
−
50
−
25
0
25
50
75
100
125 150
AMBIENT TEMPERATURE (
°
C)
Figure 1. Derating Curve
3
NSBC115TPDP6
TYPICAL CHARACTERISTICS
−
NPN TRANSISTOR
NSBC115TPDP6
10
1
1000
I /I
= 10
C
B
150
°
C
25
°
C
150
°
C
25
°
C
−
55
°
C
−
55
°
C
100
0.1
V
CE
= 10 V
0.01
10
0
10
20
30
40
50
1
10
100
I ,
COLLECTOR CURRENT (mA)
C
I ,
COLLECTOR CURRENT (mA)
C
Figure 2. V
CE(sat)
vs. I
C
Figure 3. DC Current Gain
2.4
2.0
100
10
150
°
C
f = 10 kHz
= 0 A
T =
25
°
C
A
25
°
C
I
E
−
55
°
C
1.6
1.2
0.8
1
0.1
0.4
0
V
O
= 5 V
24
0.01
0
10
20
30
40
50
0
4
8
12
16
20
28
V ,
REVERSE VOLTAGE (V)
R
V ,
INPUT VOLTAGE (V)
in
Figure 4. Output Capacitance
Figure 5. Output Current vs. Input Voltage
100
−
55
°
C
10
25
°
C
150
°
C
1
V
O
= 0.2 V
0.1
0
10
20
30
40
50
I ,
COLLECTOR CURRENT (mA)
C
Figure 6. Input Voltage vs. Output Current
4
NSBC115TPDP6
TYPICAL CHARACTERISTICS
−
PNP TRANSISTOR
NSBC115TPDP6
10
1
1000
100
I /I
= 10
150
°
C
C
B
25
°
C
−
55
°
C
25
°
C
150
°
C
0.1
10
1
−
55
°
C
V
CE
= 10 V
0.01
0
10
20
30
40
50
1
10
100
I ,
COLLECTOR CURRENT (mA)
C
I ,
COLLECTOR CURRENT (mA)
C
Figure 7. V
CE(sat)
vs. I
C
Figure 8. DC Current Gain
7
6
5
4
3
2
100
10
150
°
C
f = 10 kHz
= 0 A
T =
25
°
C
A
25
°
C
I
E
−
55
°
C
1
0.1
0.01
1
0
V
O
= 5 V
24
0.001
0
10
20
30
40
50
0
4
8
12
16
20
28
V ,
REVERSE VOLTAGE (V)
R
V ,
INPUT VOLTAGE (V)
in
Figure 9. Output Capacitance
Figure 10. Output Current vs. Input Voltage
100
−
55
°
C
10
25
°
C
150
°
C
1
V
O
= 0.2 V
0.1
0
10
20
30
40
50
I ,
COLLECTOR CURRENT (mA)
C
Figure 11. Input Voltage vs. Output Current
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT
−
963
CASE 527AD
−
01
ISSUE E
DATE 09
FEB 2010
SCALE 4:1
NOTES:
D
X
Y
1. DIMENSIONING
AND TOLERANCING PER ASME
Y14.5M, 1994.
A
2. CONTROLLING
DIMENSION: MILLIMETERS
3. MAXIMUM
LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
4. DIMENSIONS
D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
6
5
4
3
H
E
E
1
2
MILLIMETERS
DIM MIN
NOM
0.37
0.15
0.12
1.00
0.80
0.35 BSC
1.00
0.19 REF
0.10
MAX
0.40
0.20
0.17
1.05
0.85
C
TOP VIEW
e
A
b
C
D
E
0.34
0.10
0.07
0.95
0.75
SIDE VIEW
6X
L
e
H
E
0.95
0.05
1.05
0.15
L
L2
GENERIC
MARKING DIAGRAM*
6X
b
6X
L2
0.08
X Y
XM
1
BOTTOM VIEW
STYLE 1:
PIN 1.
EMITTER 1
2. BASE
1
STYLE 2:
STYLE 3:
PIN 1.
CATHODE 1
2. CATHODE
1
X
M
= Specific Device Code
= Month Code
PIN 1.
EMITTER 1
2. EMITTER2
3. BASE
2
3. COLLECTOR
2
4. EMITTER
2
5. BASE
2
3. ANODE/ANODE
2
4. CATHODE
2
5. CATHODE
2
6. ANODE/ANODE
1
4. COLLECTOR
2
5. BASE
1
6. COLLECTOR
1
*This information is generic. Please refer
to device data sheet for actual part
marking.
6. COLLECTOR
1
STYLE 4:
STYLE 5:
STYLE 6:
PIN 1.
CATHODE
2. ANODE
Pb
−
Free indicator, “G” or microdot “
G
”,
PIN 1.
COLLECTOR
2. COLLECTOR
3. BASE
PIN 1.
CATHODE
2. CATHODE
3. ANODE
may or may not be present.
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
RECOMMENDED
4. EMITTER
5. COLLECTOR
6. COLLECTOR
4. ANODE
5. CATHODE
6. CATHODE
MOUNTING FOOTPRINT
6X
0.35
6X
0.20
STYLE 7:
PIN 1.
CATHODE
2. ANODE
STYLE 8:
STYLE 9:
PIN 1.
SOURCE 1
2. GATE
1
PIN 1.
DRAIN
2. DRAIN
3. GATE
3. CATHODE
4. CATHODE
5. ANODE
3. DRAIN
2
4. SOURCE
2
5. GATE
2
PACKAGE
OUTLINE
4. SOURCE
5. DRAIN
6. DRAIN
1.20
6. CATHODE
6. DRAIN
1
STYLE 10:
PIN 1.
CATHODE 1
2. N/C
0.35
PITCH
3. CATHODE
2
4. ANODE
2
5. N/C
DIMENSIONS: MILLIMETERS
6. ANODE
1
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON26456D
SOT
−
963, 1X1, 0.35P
PAGE 1 OF 1
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