onsemi-NSBC124EDXV6T1G
| Part # | onsemi-NSBC124EDXV6T1G |
| Download | onsemi-NSBC124EDXV6T1G |
MUN5212DW1,
NSBC124EDXV6,
NSBC124EDP6
Dual NPN Bias Resistor
Transistors
R1 = 22 k
W
, R2 = 22 k
W
PIN CONNECTIONS
(2)
NPN Transistors with Monolithic Bias
Resistor Network
(3)
(1)
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base-emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
R
1
R
2
Q
1
Q
2
R
2
R
1
Features
(4)
(5)
(6)
•
Simplifies Circuit Design
•
Reduces Board Space
•
Reduces Component Count
•
S and NSV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable*
MARKING DIAGRAMS
6
SOT
−
363
CASE 419B
−
02
7B M
G
G
•
These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
1
Compliant
MAXIMUM RATINGS
A
SOT
−
563
CASE 463A
1
7B M
G
(T =
25
°
C, common for Q
and Q
, unless otherwise noted)
1
2
Rating
Symbol
Max
50
Unit
Vdc
Collector-Base Voltage
Collector-Emitter Voltage
V
CBO
CEO
V
50
Vdc
R M
SOT
−
963
CASE 527AD
Collector Current
−
Continuous
Input Forward Voltage
I
100
40
mAdc
Vdc
C
1
V
IN(fwd)
Input Reverse Voltage
V
10
Vdc
IN(rev)
7B/R
M
G
=
=
=
Specific Device Code
Date Code*
Pb-Free Package
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
(Note: Microdot may be in either location)
ORDERING INFORMATION
*Date Code orientation may vary depending
upon manufacturing location.
†
Device
Package
Shipping
MUN5212DW1T1G,
NSVMUN5212DW1T1G*
SOT
−
363
3,000/
T
a
pe & Reel
NSBC124EDXV6T1G
NSBC124EDXV6T5G
NSBC124EDP6T5G
SOT
−
563
SOT
−
563
SOT
−
963
4,000/
T
a
pe & Reel
8,000/
T
a
pe & Reel
8,000/
T
a
pe & Reel
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our
T
a
pe and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2012
73
Publication Order Number:
June, 2017
−
Rev. 1
DTC124ED/D
MUN5212DW1, NSBC124EDXV6, NSBC124EDP6
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
MUN5212DW1 (SOT
−
363) ONE JUNCTION HEATED
T
o
tal Device Dissipation
P
D
T =
25
°
C
187
256
1.5
2.0
mW
A
Derate above 25
°
C
mW/
°
C
Thermal Resistance,
Junction to Ambient
R
670
490
°
C/W
q
JA
T
o
tal Device Dissipation
P
D
T =
25
°
C
250
385
2.0
3.0
mW
A
Derate above 25
°
C
mW/
°
C
Thermal Resistance,
Junction to Ambient
R
°
C/W
°
C/W
°
C
q
JA
493
325
Thermal Resistance,
R
q
JL
188
208
Junction and Storage
T
e
mperature Range
NSBC124EDXV6 (SOT
−
563) ONE JUNCTION HEATED
T
o
tal Device Dissipation
T , T
J
−
55 to +150
stg
P
D
T =
25
°
C
357
2.9
mW
mW/
°
C
A
Derate above 25
°
C
Thermal Resistance,
Junction to Ambient
R
°
C/W
q
JA
D
350
T
o
tal Device Dissipation
P
T =
25
°
C
500
4.0
mW
mW/
°
C
A
Derate above 25
°
C
Thermal Resistance,
Junction to Ambient
R
°
C/W
q
JA
250
Junction and Storage
T
e
mperature Range
NSBC124EDP6 (SOT
−
963) ONE JUNCTION HEATED
T
o
tal Device Dissipation
T , T
−
55 to +150
°
C
J
stg
P
D
T =
25
°
C
231
269
1.9
2.2
MW
A
Derate above 25
°
C
mW/
°
C
Thermal Resistance,
Junction to Ambient
R
°
C/W
q
JA
540
464
T
o
tal Device Dissipation
P
D
T =
25
°
C
339
408
2.7
3.3
MW
A
Derate above 25
°
C
mW/
°
C
Thermal Resistance,
Junction to Ambient
R
°
C/W
°
C
q
JA
369
306
Junction and Storage
T
e
mperature Range
T , T
J
−
55 to +150
stg
49
.
F
R
−
4 @ Minimum Pad.
50
.
F
R
−
4 @ 1.0
×
1.0 Inch Pad.
51
.
B
oth junction heated values assume total power is sum of two equally powered channels.
2
2
52
.
F
R
−
4 @ 100 mm
, 1 oz. copper traces, still air.
53
.
F
R
−
4 @ 500 mm
, 1 oz. copper traces, still air.
74
MUN5212DW1, NSBC124EDXV6, NSBC124EDP6
ELECTRICAL CHARACTERISTICS
(T =
25
°
C, common for Q
and Q
, unless otherwise noted)
A
1
2
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector-Base Cutoff Current
I
I
nAdc
nAdc
mAdc
Vdc
CBO
(V =
50
V
, I
=
0
)
−
−
−
−
−
−
−
100
500
0.2
−
CB
E
Collector-Emitter Cutoff Current
(V =
50
V
, I
=
0
)
CEO
CE
B
Emitter-Base Cutoff Current
(V =
6.0
V
, I
=
0
)
I
EBO
−
EB
C
Collector-Base Breakdown Voltage
(I =
10
m
A, I
= 0)
V
V
(BR)CBO
(BR)CEO
50
50
C
E
(I =
2.0 mA, I
= 0)
Vdc
−
C
B
ON CHARACTERISTICS
h
FE
(I =
5.0 mA, V
= 10 V)
60
−
100
−
−
0.25
−
C
CE
(I =
10 mA, I
= 0.3 mA)
V
V
CE(sat)
C
B
Input Voltage (Off)
(V =
5.0
V
, I
=
1
00
m
A)
V
Vdc
Vdc
Vdc
Vdc
k
W
i(off)
i(on)
−
1.2
1.9
−
CE
C
Input Voltage (On)
(V =
0.2
V
, I
=
5
.0 mA)
V
−
−
CE
C
Output Voltage (On)
(V =
5.0
V
, V
=
2
.5
V
, R
=
1
.0 k
W
)
V
OL
−
0.2
CC
B
L
Output Voltage (Off)
V
OH
(V =
5.0
V
, V
=
0
.5
V
, R
=
1
.0 k
W
)
4.9
15.4
0.8
−
−
CC
B
L
Input Resistor
Resistor Ratio
R1
R /R
22
1.0
28.6
1.2
1
2
54
.
P
ulsed Condition: Pulse Width = 300 ms, Duty Cycle
≤
2%.
400
350
300
250
(1) SOT
−
363; 1.0
×
1.0 Inch Pad
200
(2) SOT
−
563; Minimum Pad
(1) (2) (3)
2
(3) SOT
−
963; 100 mm
, 1 oz. Copper Trace
150
100
50
0
−
50
−
25
0
25
50
75
100
125 150
AMBIENT TEMPERATURE (
°
C)
Figure 130. Derating Curve
75
MUN5212DW1, NSBC124EDXV6, NSBC124EDP6
TYPICAL CHARACTERISTICS
MUN5212DW1, NSBC124EDXV6
1
1000
V
= 10 V
CE
I /I
= 10
C
B
25
°
C
T =
75
°
C
25
°
C
A
T =
−
25
°
C
A
0.1
−
25
°
C
75
°
C
100
10
0.01
0.001
1
10
100
0
20
40
50
I ,
COLLECTOR CURRENT (mA)
C
I ,
COLLECTOR CURRENT (mA)
C
Figure 131. V
CE(sat)
vs. I
C
Figure 132. DC Current Gain
3.2
100
10
1
25
°
C
75
°
C
f = 10 kHz
= 0 A
T =
25
°
C
A
2.8
2.4
2.0
1.6
T =
−
25
°
C
A
I
E
0.1
1.2
0.8
0.01
V
= 5 V
0.4
0
O
0.001
0
10
20
30
40
50
0
2
4
6
8
10
V ,
REVERSE VOLTAGE (V)
R
V ,
INPUT VOLTAGE (V)
in
Figure 133. Output Capacitance
Figure 134. Output Current vs. Input Voltage
100
V
O
= 0.2 V
T =
−
25
°
C
A
10
75
°
C
25
°
C
1
0.1
0
10
20
30
40
50
I ,
COLLECTOR CURRENT (mA)
C
Figure 135. Input Voltage vs. Output Current
76
MUN5212DW1, NSBC124EDXV6, NSBC124EDP6
TYPICAL CHARACTERISTICS
NSBC124EDP6
1
1000
I /I
= 10
C
B
V
CE
= 10 V
25
°
C
150
°
C
100
−
55
°
C
25
°
C
0.1
150
°
C
−
55
°
C
10
1
0.01
0
10
20
30
40
50
0.1
1
10
100
I ,
COLLECTOR CURRENT (mA)
C
I ,
COLLECTOR CURRENT (mA)
C
Figure 136. V
CE(sat)
vs. I
C
Figure 137. DC Current Gain
100
10
1
2.4
2.0
1.6
1.2
0.8
150
°
C
f = 10 kHz
= 0 A
T =
25
°
C
A
−
55
°
C
25
°
C
I
E
0.1
0.4
0
V
O
= 5 V
0.01
0
10
20
30
40
50
0
2
4
6
8
10
12
14
16
V ,
REVERSE VOLTAGE (V)
R
V ,
INPUT VOLTAGE (V)
in
Figure 138. Output Capacitance
Figure 139. Output Current vs. Input Voltage
100
25
°
C
10
−
55
°
C
150
°
C
1
V
O
= 0.2 V
40
0.1
0
10
20
30
50
I ,
COLLECTOR CURRENT (mA)
C
Figure 140. Input Voltage vs. Output Current
77
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC
−
88/SC70
−
6/SOT
−
363
CASE 419B
−
02
ISSUE Y
1
DATE 11 DEC 2012
SCALE 2:1
2X
aaa H
D
NOTES:
D
H
1. DIMENSIONING
AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING
DIMENSION: MILLIMETERS.
A
3. DIMENSIONS
D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS
D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS
A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS
b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TI
P
.
7. DIMENSION
b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM
MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOO
T
.
D
GAGE
PLANE
6
1
5
2
4
3
L
L2
E1
E
DETAIL A
aaa
C
2X
2X 3 TIPS
bbb H
D
e
MILLIMETERS
DIM MIN
NOM MAX
−−−
INCHES
MIN
−−−
NOM MAX
−−−
0.043
−−−
0.004
6X
b
B
TOP VIEW
A
−−−
−−−
1.10
A1
0.00
A2
0.70
0.10 0.000
M
ddd
C A-B D
0.90
0.20
0.15
2.00
2.10
1.25
0.65 BSC
0.36
1.00 0.027 0.035 0.039
0.25 0.006 0.008 0.010
0.22 0.003 0.006 0.009
2.20 0.070 0.078 0.086
2.20 0.078 0.082 0.086
1.35 0.045 0.049 0.053
0.026 BSC
b
C
D
E
0.15
0.08
1.80
2.00
A2
DETAIL A
A
E1
1.15
e
L
0.26
0.46 0.010 0.014 0.018
0.006 BSC
L2
0.15 BSC
0.15
aaa
bbb
ccc
ddd
0.006
0.012
0.004
0.004
0.30
0.10
0.10
6X
ccc C
A1
SEATING
PLANE
c
C
SIDE VIEW
END VIEW
GENERIC
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT*
6
6X
0.30
XXXM
G
6X
0.66
G
1
2.50
XXX =
Specific Device Code
M
= Date Code*
G
= Pb
−
Free Package
0.65
(Note: Microdot may be in either location)
PITCH
*Date Code orientation and/or position may
vary depending upon manufacturing location.
DIMENSIONS: MILLIMETERS
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLES ON PAGE 2
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC
−
88/SC70
−
6/SOT
−
363
PAGE 1 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
SC
−
88/SC70
−
6/SOT
−
363
CASE 419B
−
02
ISSUE Y
DATE 11 DEC 2012
STYLE 1:
PIN 1.
EMITTER 2
2. BASE
2
STYLE 2:
CANCELLED
STYLE 3:
CANCELLED
STYLE 4:
STYLE 5:
STYLE 6:
PIN 1.
ANODE 2
2. N/C
PIN 1.
CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
PIN 1.
ANODE
2. ANODE
3. COLLECTOR
1
4. EMITTER
1
5. BASE
1
3. COLLECTOR
3. CATHODE
1
4. ANODE
1
5. N/C
4. EMITTER
5. BASE
6. COLLECTOR
2
6. ANODE
6. CATHODE
6. CATHODE
2
STYLE 7:
STYLE 8:
CANCELLED
STYLE 9:
STYLE 10:
STYLE 11:
STYLE 12:
PIN 1.
SOURCE 2
2. DRAIN
2
3. GATE
1
PIN 1.
EMITTER 2
2. EMITTER
1
3. COLLECTOR
1
4. BASE
1
PIN 1.
SOURCE 2
2. SOURCE
1
3. GATE
1
PIN 1.
CATHODE 2
2. CATHODE
2
3. ANODE
1
PIN 1.
ANODE 2
2. ANODE
2
3. CATHODE
1
4. ANODE
1
5. ANODE
1
6. CATHODE
2
4. SOURCE
1
5. DRAIN
1
6. GATE
2
4. DRAIN
1
5. DRAIN
2
6. GATE
2
4. CATHODE
1
5. CATHODE
1
6. ANODE
2
5. BASE
2
6. COLLECTOR
2
STYLE 13:
PIN 1.
ANODE
2. N/C
STYLE 14:
PIN 1.
VREF
2. GND
STYLE 15:
STYLE 16:
STYLE 17:
STYLE 18:
PIN 1.
VIN1
2. VCC
PIN 1.
ANODE 1
2. ANODE
2
PIN 1.
BASE 1
2. EMITTER
2
3. COLLECTOR
2
4. BASE
2
PIN 1.
BASE 1
2. EMITTER
1
3. COLLECTOR
2
4. BASE
2
3. COLLECTOR
4. EMITTER
5. BASE
3. GND
3. ANODE
3
3. VOUT2
4. VIN2
5. GND
6. VOUT1
4. IOUT
5. VEN
6. VCC
4. CATHODE
3
5. CATHODE
2
6. CATHODE
1
5. EMITTER
1
6. COLLECTOR
1
5. EMITTER
2
6. COLLECTOR
1
6. CATHODE
STYLE 19:
PIN 1.
I OUT
2. GND
STYLE 20:
STYLE 21:
PIN 1.
ANODE 1
2. N/C
STYLE 22:
PIN 1.
D1 (i)
2. GND
STYLE 23:
PIN 1.
Vn
2. CH1
3. Vp
STYLE 24:
PIN 1.
CATHODE
2. ANODE
PIN 1.
COLLECTOR
2. COLLECTOR
3. BASE
3. GND
3. ANODE
2
4. CATHODE
2
5. N/C
3. D2
(i)
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
4. V
CC
4. EMITTER
5. COLLECTOR
6. COLLECTOR
4. D2
(c)
5. VBUS
6. D1
(c)
4. N/C
5. V
EN
5. CH2
6. N/C
6. V
REF
6. CATHODE
1
STYLE 30:
STYLE 25:
STYLE 26:
PIN 1.
SOURCE 1
2. GATE
1
STYLE 27:
PIN 1.
BASE 2
2. BASE
1
STYLE 28:
PIN 1.
DRAIN
2. DRAIN
3. GATE
STYLE 29:
PIN 1.
ANODE
2. ANODE
PIN 1.
SOURCE 1
2. DRAIN
2
3. DRAIN
2
4. SOURCE
2
5. GATE
1
PIN 1.
BASE 1
2. CATHODE
3. COLLECTOR
2
4. BASE
2
3. DRAIN
2
4. SOURCE
2
5. GATE
2
3. COLLECTOR
1
4. EMITTER
1
5. EMITTER
2
6. COLLECTOR
2
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
4. SOURCE
5. DRAIN
6. DRAIN
5. EMITTER
6. COLLECTOR
1
6. DRAIN
1
6. DRAIN
1
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC
−
88/SC70
−
6/SOT
−
363
PAGE 2 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT
−
563, 6 LEAD
CASE 463A
6
ISSUE H
1
DATE 26 JAN 2021
SCALE 4:1
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON11126D
SOT
−
563, 6 LEAD
PAGE 1 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
SOT
−
563, 6 LEAD
CASE 463A
ISSUE H
DATE 26 JAN 2021
GENERIC
MARKING DIAGRAM*
XX M
G
1
XX =
Specific Device Code
M
= Month Code
G
= Pb
−
Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”, may
or may not be present. Some products may
not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON11126D
SOT
−
563, 6 LEAD
PAGE 2 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT
−
963
CASE 527AD
−
01
ISSUE E
DATE 09
FEB 2010
SCALE 4:1
NOTES:
D
X
Y
1. DIMENSIONING
AND TOLERANCING PER ASME
Y14.5M, 1994.
A
2. CONTROLLING
DIMENSION: MILLIMETERS
3. MAXIMUM
LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
4. DIMENSIONS
D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
6
5
4
3
H
E
E
1
2
MILLIMETERS
DIM MIN
NOM
0.37
0.15
0.12
1.00
0.80
0.35 BSC
1.00
0.19 REF
0.10
MAX
0.40
0.20
0.17
1.05
0.85
C
TOP VIEW
e
A
b
C
D
E
0.34
0.10
0.07
0.95
0.75
SIDE VIEW
6X
L
e
H
E
0.95
0.05
1.05
0.15
L
L2
GENERIC
MARKING DIAGRAM*
6X
b
6X
L2
0.08
X Y
XM
1
BOTTOM VIEW
STYLE 1:
PIN 1.
EMITTER 1
2. BASE
1
STYLE 2:
STYLE 3:
PIN 1.
CATHODE 1
2. CATHODE
1
X
M
= Specific Device Code
= Month Code
PIN 1.
EMITTER 1
2. EMITTER2
3. BASE
2
3. COLLECTOR
2
4. EMITTER
2
5. BASE
2
3. ANODE/ANODE
2
4. CATHODE
2
5. CATHODE
2
6. ANODE/ANODE
1
4. COLLECTOR
2
5. BASE
1
6. COLLECTOR
1
*This information is generic. Please refer
to device data sheet for actual part
marking.
6. COLLECTOR
1
STYLE 4:
STYLE 5:
STYLE 6:
PIN 1.
CATHODE
2. ANODE
Pb
−
Free indicator, “G” or microdot “
G
”,
PIN 1.
COLLECTOR
2. COLLECTOR
3. BASE
PIN 1.
CATHODE
2. CATHODE
3. ANODE
may or may not be present.
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
RECOMMENDED
4. EMITTER
5. COLLECTOR
6. COLLECTOR
4. ANODE
5. CATHODE
6. CATHODE
MOUNTING FOOTPRINT
6X
0.35
6X
0.20
STYLE 7:
PIN 1.
CATHODE
2. ANODE
STYLE 8:
STYLE 9:
PIN 1.
SOURCE 1
2. GATE
1
PIN 1.
DRAIN
2. DRAIN
3. GATE
3. CATHODE
4. CATHODE
5. ANODE
3. DRAIN
2
4. SOURCE
2
5. GATE
2
PACKAGE
OUTLINE
4. SOURCE
5. DRAIN
6. DRAIN
1.20
6. CATHODE
6. DRAIN
1
STYLE 10:
PIN 1.
CATHODE 1
2. N/C
0.35
PITCH
3. CATHODE
2
4. ANODE
2
5. N/C
DIMENSIONS: MILLIMETERS
6. ANODE
1
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON26456D
SOT
−
963, 1X1, 0.35P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMEN
T
:
TECHNICAL SUPPORT
North American Technical Support:
Voice Mail: 1 800
−
282
−
9855
T
o
ll Free USA/Canada
Phone: 011 421 33 790 2910
Europe, Middle East and Africa Technical Support:
Phone: 00421 33 790 2910
For additional information, please contact your local Sales Representative
◊
