onsemi-NSTB60BDW1T1G
| Part # | onsemi-NSTB60BDW1T1G |
Download  | onsemi-NSTB60BDW1T1G |
NSTB60BDW1
PNP General Purpose and
NPN Bias Resistor
Transistor Combination
•
Simplifies Circuit Design
•
Reduces Board Space
•
Reduces Component Count
(3)
Q
(2)
(1)
•
Available in 8 mm, 7 inch/3000 Unit Tape and Reel
•
ESD Rating − Human Body Model: Class 1B
ESD Rating
− Machine Model: Class B
2
•
NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
•
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Q
1
R
2
R
1
(4)
(5)
(6)
4
MAXIMUM RATINGS
5
(T =
25
°
C unless otherwise noted, common for Q
and Q
)
6
A
1
2
Rating
Symbol
Q
Q
Unit
Vdc
3
1
2
2
1
Collector-Emitter Voltage
Collector-Base Voltage
Emitter−Base Voltage
V
CEO
V
CBO
V
EBO
−
5
0
−
5
0
50
50
SOT−363
CASE 419B
STYLE 1
Vdc
−6.0
5.0
150
Vdc
Collector Current − Continuous
I
C
−150
mAdc
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
MARKING DIAGRAM
6
THERMAL CHARACTERISTICS
Characteristic
71 M
G
G
(One Junction Heated)
Symbol
Max
Unit
1
T
o
tal Device Dissipation
P
mW
D
71 =
Device Code
T =
25
°
C
A
M
= Date Code*
Derate above 25
°
C
mW/
°
C
°
C/W
G
= Pb−Free Package
(Note: Microdot may be in either location)
Thermal Resistance −
Junction-to-Ambient
R
θ
JA
*Date Code orientation may vary depending
upon manufacturing location.
Characteristic
(Both Junctions Heated)
Symbol
Max
Unit
T
o
tal Device Dissipation
P
mW
D
ORDERING INFORMATION
T =
25
°
C
A
†
Device
Package
Shipping
Derate above 25
°
C
mW/
°
C
°
C/W
°
C/W
°
C
NSTB60BDW1T1G
SOT−363
(Pb−Free)
3000 /
T
a
pe &
Reel
Thermal Resistance −
Junction-to-Ambient
R
θ
JA
NSVTB60BDW1T1G SOT−363
(Pb−Free)
3000 /
T
a
pe &
Reel
Thermal Resistance −
Junction-to-Lead
R
θ
JL
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our
T
a
pe and Reel Packaging Specification
Brochure, BRD8011/D.
Junction and Storage
T
e
mperature
T , T
−
5
5 to +150
J
stg
1. FR−4
@ Minimum Pad
2. FR−4
@ 1.0 x 1.0 inch Pad
©
Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
March, 2015 − Rev. 4
NSTB60BDW1T1/D
NSTB60BDW1
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
Q
1
Collector-Base Breakdown Voltage (I
= −50
μ
Adc, I
= 0)
V
−50
−50
−
−
−
−
Vdc
Vdc
C
E
(BR)CBO
Collector-Emitter Breakdown Voltage
(I =
−1.0 mAdc, I
= 0)
V
(BR)CEO
C
B
Emitter−Base Breakdown Voltage (I
= −50
m
Adc, I
= 0)
V
−6.0
−
−
−
−
−
−
Vdc
m
A
E
E
(BR)EBO
Collector−Base Cutoff Current (V
= −50 Vdc, I
= 0)
I
CBO
−0.1
−0.1
−0.5
CB
E
Emitter−Base Cutoff Current (V
= −6.0 Vdc, I
= 0)
I
EBO
−
m
A
EB
B
Collector-Emitter Saturation Voltage
V
−
Vdc
CE(sat)
C
B
h
120
−
−
560
−
−
CE
C
FE
Transition Frequency
(V =
−12 Vdc, I
= −2.0 mAdc, f = 100 MHz)
f
140
MHz
T
CE
C
Output Capacitance (V
= −12 Vdc, I
= 0 Adc, f = 1.0 MHz)
C
−
3.5
−
pF
CB
E
OB
Q
2
Collector-Base Breakdown Voltage (I
= 50
μ
A, I
= 0)
V
V
50
50
−
−
−
−
Vdc
Vdc
C
E
(BR)CBO
Collector-Emitter Breakdown Voltage
(BR)CEO
C
B
Collector−Base Cutoff Current (V
= 50
V
, I
=
0
)
I
I
−
−
−
−
−
−
−
−
100
500
nAdc
nAdc
mAdc
Vdc
CB
E
CBO
Collector−Emitter Cutoff Current (V
= 50
V
, I
=
0
)
CE
B
CEO
Emitter−Base Cutoff Current (V
= 6.0 V, I
= 0)
I
EBO
0.13
0.25
EB
C
Collector-Emitter Saturation Voltage
V
CE(sat)
C
B
h
FE
80
−
−
−
−
CE
C
V
OL
0.2
−
Vdc
Vdc
k
Ω
CC
B
L
V
OH
4.9
15.4
1.70
−
CC
B
L
R1
R2/R1
22
2.13
28.6
2.55
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse
T
e
st: Pulse Width < 300
μ
s, Duty Cycle < 2.0%
2
NSTB60BDW1
TYPICAL ELECTRICAL CHARACTERISTICS − PNP Transistor
2.0
1.5
-1.0
T =
25
°
C
A
V
= -10 V
-0.9
-0.8
-0.7
-0.6
-0.5
-0.4
CE
V
@ I
/I =
10
C B
BE(sat)
T =
25
°
C
A
1.0
V
BE(on)
@ V
= -10 V
CE
0.7
0.5
-0.3
-0.2
-0.1
0
0.3
0.2
V
@ I
/I =
10
C B
CE(sat)
-0.2 -0.5
-1.0 -2.0
-5.0 -10 -20
-50 -100
-200
-0.1 -0.2
-0.5 -1.0
-2.0
-5.0 -10
-20
-50 -100
I ,
COLLECTOR CURRENT (mAdc)
C
I ,
COLLECTOR CURRENT (mAdc)
C
Figure 1. Normalized DC Current Gain
Figure 2. “Saturation” and “On” Voltages
10
7.0
5.0
400
300
C
ib
200
150
V
CE
= -10 V
T =
25
°
C
A
T =
25
°
C
A
100
80
3.0
2.0
C
ob
60
40
30
20
1.0
-0.5
-1.0
-2.0 -3.0
-5.0
-10
-20 -30
-50
-0.4 -0.6
-1.0
-2.0
-4.0 -6.0
-10
-20 -30
-40
I ,
COLLECTOR CURRENT (mAdc)
C
V ,
REVERSE VOLTAGE (VOLTS)
R
Figure 3. Current−Gain − Bandwidth Product
Figure 4. Capacitances
1.0
150
140
0.5
0.3
V
= -10 V
f = 1.0 kHz
CE
V
= -10 V
f = 1.0 kHz
CE
T =
25
°
C
A
T =
25
°
C
A
130
120
110
100
0.1
0.05
0.03
0.01
-0.1
-0.2
-0.5
-1.0
-2.0
-5.0
-10
-0.1
-0.2 -0.3
-0.5
-1.0
-2.0 -3.0
-5.0
-10
I ,
COLLECTOR CURRENT (mAdc)
C
I ,
COLLECTOR CURRENT (mAdc)
C
Figure 5. Output Admittance
Figure 6. Base Spreading Resistance
3
NSTB60BDW1
TYPICAL ELECTRICAL CHARACTERISTICS − NPN Transistor
1
1000
V
CE
= 10 V
I /I
= 10
T =
−40
°
C
A
C
B
T =
85
°
C
A
25
°
C
85
°
C
−40
°
C
100
25
°
C
0.1
10
1
0.01
0
10
20
30
40
50
60
70
80
1
10
100
I ,
COLLECTOR CURRENT (mA)
C
I ,
COLLECTOR CURRENT (mA)
C
Figure 7. Maximum Collector Voltage versus
Collector Current
Figure 8. DC Current Gain
100
10
4
3.5
3
25
°
C
−40
°
C
T =
85
°
C
A
f = 1 MHz
I
E
= 0 A
T =
25
°
C
A
2.5
2
1
0.1
1.5
1
0.5
0
V
O
= 5 V
12
0.01
0
10
20
30
40
50
60
0
2
4
6
8
10
14
V ,
REVERSE BIAS VOLTAGE (V)
R
V ,
INPUT VOLTAGE (V)
in
Figure 9. Output Capacitance
Figure 10. Output Current versus Input
Voltage
100
T =
−40
°
C
A
10
1
25
°
C
85
°
C
V
O
= 0.2 V
50
0.1
0
10
20
30
40
60
I ,
COLLECTOR CURRENT (mA)
C
Figure 11. Input Voltage versus Output Current
4
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC
−
88/SC70
−
6/SOT
−
363
CASE 419B
−
02
ISSUE Y
1
DATE 11 DEC 2012
SCALE 2:1
2X
aaa H
D
NOTES:
D
H
1. DIMENSIONING
AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING
DIMENSION: MILLIMETERS.
A
3. DIMENSIONS
D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS
D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS
A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS
b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TI
P
.
7. DIMENSION
b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM
MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOO
T
.
D
GAGE
PLANE
6
1
5
2
4
3
L
L2
E1
E
DETAIL A
aaa
C
2X
2X 3 TIPS
bbb H
D
e
MILLIMETERS
DIM MIN
NOM MAX
−−−
INCHES
MIN
−−−
NOM MAX
−−−
0.043
−−−
0.004
6X
b
B
TOP VIEW
A
−−−
−−−
1.10
A1
0.00
A2
0.70
0.10 0.000
M
ddd
C A-B D
0.90
0.20
0.15
2.00
2.10
1.25
0.65 BSC
0.36
1.00 0.027 0.035 0.039
0.25 0.006 0.008 0.010
0.22 0.003 0.006 0.009
2.20 0.070 0.078 0.086
2.20 0.078 0.082 0.086
1.35 0.045 0.049 0.053
0.026 BSC
b
C
D
E
0.15
0.08
1.80
2.00
A2
DETAIL A
A
E1
1.15
e
L
0.26
0.46 0.010 0.014 0.018
0.006 BSC
L2
0.15 BSC
0.15
aaa
bbb
ccc
ddd
0.006
0.012
0.004
0.004
0.30
0.10
0.10
6X
ccc C
A1
SEATING
PLANE
c
C
SIDE VIEW
END VIEW
GENERIC
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT*
6
6X
0.30
XXXM
G
6X
0.66
G
1
2.50
XXX =
Specific Device Code
M
= Date Code*
G
= Pb
−
Free Package
0.65
(Note: Microdot may be in either location)
PITCH
*Date Code orientation and/or position may
vary depending upon manufacturing location.
DIMENSIONS: MILLIMETERS
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLES ON PAGE 2
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC
−
88/SC70
−
6/SOT
−
363
PAGE 1 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
SC
−
88/SC70
−
6/SOT
−
363
CASE 419B
−
02
ISSUE Y
DATE 11 DEC 2012
STYLE 1:
PIN 1.
EMITTER 2
2. BASE
2
STYLE 2:
CANCELLED
STYLE 3:
CANCELLED
STYLE 4:
STYLE 5:
STYLE 6:
PIN 1.
ANODE 2
2. N/C
PIN 1.
CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
PIN 1.
ANODE
2. ANODE
3. COLLECTOR
1
4. EMITTER
1
5. BASE
1
3. COLLECTOR
3. CATHODE
1
4. ANODE
1
5. N/C
4. EMITTER
5. BASE
6. COLLECTOR
2
6. ANODE
6. CATHODE
6. CATHODE
2
STYLE 7:
STYLE 8:
CANCELLED
STYLE 9:
STYLE 10:
STYLE 11:
STYLE 12:
PIN 1.
SOURCE 2
2. DRAIN
2
3. GATE
1
PIN 1.
EMITTER 2
2. EMITTER
1
3. COLLECTOR
1
4. BASE
1
PIN 1.
SOURCE 2
2. SOURCE
1
3. GATE
1
PIN 1.
CATHODE 2
2. CATHODE
2
3. ANODE
1
PIN 1.
ANODE 2
2. ANODE
2
3. CATHODE
1
4. ANODE
1
5. ANODE
1
6. CATHODE
2
4. SOURCE
1
5. DRAIN
1
6. GATE
2
4. DRAIN
1
5. DRAIN
2
6. GATE
2
4. CATHODE
1
5. CATHODE
1
6. ANODE
2
5. BASE
2
6. COLLECTOR
2
STYLE 13:
PIN 1.
ANODE
2. N/C
STYLE 14:
PIN 1.
VREF
2. GND
STYLE 15:
STYLE 16:
STYLE 17:
STYLE 18:
PIN 1.
VIN1
2. VCC
PIN 1.
ANODE 1
2. ANODE
2
PIN 1.
BASE 1
2. EMITTER
2
3. COLLECTOR
2
4. BASE
2
PIN 1.
BASE 1
2. EMITTER
1
3. COLLECTOR
2
4. BASE
2
3. COLLECTOR
4. EMITTER
5. BASE
3. GND
3. ANODE
3
3. VOUT2
4. VIN2
5. GND
6. VOUT1
4. IOUT
5. VEN
6. VCC
4. CATHODE
3
5. CATHODE
2
6. CATHODE
1
5. EMITTER
1
6. COLLECTOR
1
5. EMITTER
2
6. COLLECTOR
1
6. CATHODE
STYLE 19:
PIN 1.
I OUT
2. GND
STYLE 20:
STYLE 21:
PIN 1.
ANODE 1
2. N/C
STYLE 22:
PIN 1.
D1 (i)
2. GND
STYLE 23:
PIN 1.
Vn
2. CH1
3. Vp
STYLE 24:
PIN 1.
CATHODE
2. ANODE
PIN 1.
COLLECTOR
2. COLLECTOR
3. BASE
3. GND
3. ANODE
2
4. CATHODE
2
5. N/C
3. D2
(i)
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
4. V
CC
4. EMITTER
5. COLLECTOR
6. COLLECTOR
4. D2
(c)
5. VBUS
6. D1
(c)
4. N/C
5. V
EN
5. CH2
6. N/C
6. V
REF
6. CATHODE
1
STYLE 30:
STYLE 25:
STYLE 26:
PIN 1.
SOURCE 1
2. GATE
1
STYLE 27:
PIN 1.
BASE 2
2. BASE
1
STYLE 28:
PIN 1.
DRAIN
2. DRAIN
3. GATE
STYLE 29:
PIN 1.
ANODE
2. ANODE
PIN 1.
SOURCE 1
2. DRAIN
2
3. DRAIN
2
4. SOURCE
2
5. GATE
1
PIN 1.
BASE 1
2. CATHODE
3. COLLECTOR
2
4. BASE
2
3. DRAIN
2
4. SOURCE
2
5. GATE
2
3. COLLECTOR
1
4. EMITTER
1
5. EMITTER
2
6. COLLECTOR
2
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
4. SOURCE
5. DRAIN
6. DRAIN
5. EMITTER
6. COLLECTOR
1
6. DRAIN
1
6. DRAIN
1
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC
−
88/SC70
−
6/SOT
−
363
PAGE 2 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
onsemi
,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “
onsemi
” or its affiliates
and/or subsidiaries in the United States and/or other countries.
onsemi
owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of
onsemi
’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
.
onsemi
reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as
−
is” and
onsemi
makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does
onsemi
assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using
onsemi
products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by
onsemi
. “Typical” parameters which may be provided in
onsemi
data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
onsemi
does not convey any license
under any of its intellectual property rights nor the rights of others.
onsemi
products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use
onsemi
products for any such unintended or unauthorized application, Buyer shall indemnify and hold
onsemi
and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that
onsemi
was negligent regarding the design or manufacture of the part.
onsemi
is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMEN
T
:
TECHNICAL SUPPORT
North American Technical Support:
Voice Mail: 1 800
−
282
−
9855
T
o
ll Free USA/Canada
Phone: 011 421 33 790 2910
Europe, Middle East and Africa Technical Support:
Phone: 00421 33 790 2910
For additional information, please contact your local Sales Representative
◊
