onsemi-NSV40302PDR2G
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NSS40302PDR2G
Complementary 40
V
,
6
.0 A,
Low V
CE(sat)
Transistor
2
ON Semiconductor’s e
PowerEdge family of low V
CE(sat)
transistors are surface mount devices featuring ultra low saturation
voltage (V
) and high current gain capability. These are designed
for use in low voltage, high speed switching applications where
affordable efficient energy control is important.
CE(sat)
Typical applications are low voltage motor controls in mass storage
products such as disc drives and tape drives. In the automotive
industry they can be used in air bag deployment and in the instrument
cluster. The high current gain allows e PowerEdge devices to be
driven directly from PMU’s control outputs, and the Linear Gain
(Beta) makes them ideal components in analog amplifiers.
40 VOLTS, 6.0 AMPS
COMPLEMENTARY LOW
V
CE(sat)
TRANSISTOR
2
EQUIVALENT R
DS(on)
80 m
W
COLLECTOR
7,8
COLLECTOR
5,6
Features
•
NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
2
4
BASE
BASE
•
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
1
3
EMITTER
EMITTER
MAXIMUM RATINGS
(T =
25
°
C)
A
8
Rating
Symbol
Max
Unit
1
Collector-Emitter Voltage
NPN
PNP
V
V
V
40
−40
Vdc
CEO
CBO
EBO
SOIC−8
CASE 751
STYLE 16
Collector-Base Voltage
Emitter-Base Voltage
NPN
PNP
40
−40
Vdc
Vdc
A
DEVICE MARKING
NPN
PNP
6.0
−7.0
8
C40302
AYWW
G
Collector Current − Continuous
NPN
PNP
I
C
3.0
−3.0
G
Collector Current − Peak
NPN
PNP
I
6.0
−6.0
A
CM
1
C40302 =
Specific Device Code
Electrostatic Discharge
ESD
HBM Class 3B
MM Class C
A
Y
= Assembly Location
=
Y
e
ar
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
WW
G
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
†
Device
Package
Shipping
NSS40302PDR2G
SOIC−8
2500 /
(Pb−Free)
T
a
pe & Reel
NSV40302PDR2G
SOIC−8
2500 /
(Pb−Free)
T
a
pe & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our
T
a
pe and Reel Packaging Specification
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
May, 2015 − Rev. 2
NSS40302P/D
NSS40302PDR2G
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
SINGLE HEATED
P
D
576
mW
T =
25
°
C
A
Derate above 25
°
C
4.6
217
676
mW/
°
C
°
C/W
mW
R
q
JA
P
D
T =
25
°
C
A
Derate above 25
°
C
5.4
mW/
°
C
°
C/W
R
185
q
JA
P
D
653
mW
T =
25
°
C
A
Derate above 25
°
C
5.2
191
783
mW/
°
C
°
C/W
mW
R
q
JA
P
D
T =
25
°
C
A
Derate above 25
°
C
6.3
160
mW/
°
C
°
C/W
°
C
Junction and Storage
T
e
mperature Range
R
q
JA
T , T
−55 to +150
J
stg
2
1. FR
−
4
@
1
0 mm
, 1 oz. copper traces, still air.
2
2. FR
−
4
@
1
00 mm
, 1 oz. copper traces, still air.
3. Dual
heated values assume total power is the sum of two equally powered devices.
2
NSS40302PDR2G
NPN ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
A
Characteristic
OFF CHARACTERISTICS
Collecto
r
−
E
mitter Breakdown Voltage
Symbol
Min
Typ
Max
Unit
V
Vdc
Vdc
(BR)CEO
(BR)CBO
(BR)EBO
(I =
10 mAdc, I
= 0)
40
40
6.0
−
−
−
−
−
−
−
−
C
B
Collecto
r
−
B
ase Breakdown Voltage
(I =
0.1 mAdc, I
= 0)
V
V
C
E
Emitte
r
−
B
ase Breakdown Voltage
(I =
0.1 mAdc, I
= 0)
Vdc
−
E
C
Collector Cutoff Current
(V =
40 Vdc, I
= 0)
I
m
Adc
m
Adc
CBO
0.1
0.1
CB
E
Emitter Cutoff Current
(V =
6.0 Vdc)
EB
I
EBO
−
ON CHARACTERISTICS
h
FE
(I =
10 mA, V
= 2.0 V)
200
200
180
180
400
350
340
320
−
−
−
−
C
CE
(I =
500 mA, V
= 2.0 V)
C
CE
(I =
1.0 A, V
= 2.0 V)
C
CE
(I =
2.0 A, V
= 2.0 V)
C
CE
(I =
0.1 A, I
= 0.010 A)
V
V
CE(sat)
−
−
−
−
0.008
0.044
0.080
0.082
0.011
0.060
0.115
0.115
C
B
(I =
1.0 A, I
= 0.100 A)
C
B
(I =
1.0 A, I
= 0.010 A)
C
B
(I =
2.0 A, I
= 0.200 A)
C
B
(I =
1.0 A, I
= 0.01 A)
V
V
V
BE(sat)
−
−
0.780
0.650
0.900
0.750
C
B
(I =
0.1 A, V
= 2.0 V)
V
BE(on)
C
CE
Cutoff Frequency
(I =
100 mA, V
= 5.0
V
, f =
1
00 MHz)
f
MHz
T
100
−
−
−
C
CE
Input Capacitance (V
= 0.5
V
, f =
1
.0 MHz)
Cibo
320
40
450
50
pF
pF
EB
Output Capacitance (V
= 3.0
V
, f =
1
.0 MHz)
Cobo
−
CB
SWITCHING CHARACTERISTICS
Delay (V
= 30
V
, I
=
7
50 mA, I
= 15 mA)
t
−
−
−
−
−
−
−
−
100
100
780
110
ns
ns
ns
ns
CC
C
B1
d
Rise (V
= 30
V
, I
=
7
50 mA, I
= 15 mA)
t
CC
C
B1
r
Storage (V
= 30
V
, I
=
7
50 mA, I
= 15 mA)
t
CC
C
B1
s
Fall (V
= 30
V
, I
=
7
50 mA, I
= 15 mA)
t
f
CC
C
B1
4. Pulsed
Condition: Pulse Width = 300
m
sec, Duty Cycle
≤
2%.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3
NSS40302PDR2G
PNP ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
A
Characteristic
OFF CHARACTERISTICS
Collecto
r
−
E
mitter Breakdown Voltage
Symbol
Min
Typ
Max
Unit
V
Vdc
Vdc
(BR)CEO
(BR)CBO
(BR)EBO
(I =
−10 mAdc, I
= 0)
−40
−40
−7.0
−
−
−
−
−
−
−
−
C
B
Collecto
r
−
B
ase Breakdown Voltage
(I =
−0.1 mAdc, I
= 0)
V
V
C
E
Emitte
r
−
B
ase Breakdown Voltage
(I =
−0.1 mAdc, I
= 0)
Vdc
−
E
C
Collector Cutoff Current
(V =
−40 Vdc, I
= 0)
I
m
Adc
m
Adc
CBO
−0.1
−0.1
CB
E
Emitter Cutoff Current
(V =
−6.0 Vdc)
EB
I
EBO
−
ON CHARACTERISTICS
h
FE
(I =
−10 mA, V
= −2.0 V)
250
220
180
150
380
340
300
230
−
−
−
−
C
CE
(I =
−500 mA, V
= −2.0 V)
C
CE
(I =
−1.0 A, V
= −2.0 V)
C
CE
(I =
−2.0 A, V
= −2.0 V)
C
CE
(I =
−0.1 A, I
= −0.010 A)
V
V
CE(sat)
−
−
−
−
−0.013
−0.075
−0.130
−0.135
−0.017
−0.095
−0.170
−0.170
C
B
(I =
−1.0 A, I
= −0.100 A)
C
B
(I =
−1.0 A, I
= −0.010 A)
C
B
(I =
−2.0 A, I
= −0.200 A)
C
B
(I =
−1.0 A, I
= −0.01 A)
V
V
V
BE(sat)
−
−
−0.780
−0.660
−0.900
−0.750
C
B
(I =
−0.1 A, V
= −2.0 V)
V
BE(on)
C
CE
Cutoff Frequency
(I =
−100 mA, V
= −5.0
V
, f =
1
00 MHz)
f
MHz
T
100
−
−
−
C
CE
Input Capacitance (V
= −0.5
V
, f =
1
.0 MHz)
Cibo
250
50
300
65
pF
pF
EB
Output Capacitance (V
= −3.0
V
, f =
1
.0 MHz)
Cobo
−
CB
SWITCHING CHARACTERISTICS
Delay (V
= −30
V
, I
=
−
750 mA, I
= −15 mA)
t
−
−
−
−
−
−
−
−
60
ns
ns
ns
ns
CC
C
B1
d
Rise (V
= −30
V
, I
=
−
750 mA, I
= −15 mA)
t
120
400
130
CC
C
B1
r
Storage (V
= −30
V
, I
=
−
750 mA, I
= −15 mA)
t
CC
C
B1
s
Fall (V
= −30
V
, I
=
−
750 mA, I
= −15 mA)
t
f
CC
C
B1
5. Pulsed
Condition: Pulse Width = 300
m
sec, Duty Cycle
≤
2%.
4
NSS40302PDR2G
NPN TYPICAL CHARACTERISTICS
0.16
0.14
0.12
0.30
150
°
C
I /I
= 10
I /I
= 100
C
B
C
B
0.25
0.20
0.15
0.10
25
°
C
150
°
C
0.10
0.08
0.06
0.04
−55
°
C
25
°
C
−55
°
C
0.05
0
0.02
0
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
I ,
COLLECTOR CURRENT (A)
C
I ,
COLLECTOR CURRENT (A)
C
Figure 1. Collector Emitter Saturation Voltage
vs. Collector Current
Figure 2. Collector Emitter Saturation Voltage
vs. Collector Current
700
600
500
400
300
1.0
0.9
0.8
0.7
0.6
0.5
0.4
150
°
C (5.0 V)
I /I
= 10
C
B
150
°
C (2.0 V)
−55
°
C
25
°
C
25
°
C (5.0 V)
25
°
C (2.0 V)
150
°
C
−55
°
C (5.0 V)
−55
°
C (2.0 V)
200
100
0.3
0.2
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
I ,
COLLECTOR CURRENT (A)
C
I ,
COLLECTOR CURRENT (A)
C
Figure 3. DC Current Gain vs. Collector
Current
Figure 4. Base Emitter Saturation Voltage vs.
Collector Current
1.0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.9
0.8
0.7
0.6
0.5
0.4
V
CE
= +2.0 V
3 A
100 mA
2 A
1 A
−55
°
C
25
°
C
150
°
C
0.2
0.3
0.2
0.1
0
0.001
0.01
0.1
1
10
0.0001
0.001
0.01
0.1
I ,
COLLECTOR CURRENT (A)
C
I ,
BASE CURRENT (A)
b
Figure 5. Base Emitter Turn−On Voltage vs.
Collector Current
Figure 6. Saturation Region
5
NSS40302PDR2G
NPN TYPICAL CHARACTERISTICS
400
375
350
325
300
275
250
225
200
80
70
60
50
40
C
(pF)
ibo
C
V
(pF)
obo
30
20
10
175
150
0
1
2
3
4
5
6
0
5
10
, COLLECTOR−BASE VOLTAGE (V)
cb
15
20
25
30
35
40
V
, EMITTER−BASE VOLTAGE (V)
EB
Figure 7. Input Capacitance
Figure 8. Output Capacitance
10
1.0
0.1
3.5
1 ms
I
B
= 12 mA
1 s
10 ms
3.0
100 ms
10 mA
8 mA
2.5
2.0
1.5
1.0
6 mA
4 mA
Thermal Limit
0.01
2 mA
0.5
0
Single Pulse
T
e
st at T
= 25
°
C
A
0.001
0.01
0.1
1.0
(V
10
100
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
, COLLECTOR−EMITTER VOLTAGE (V)
V
)
V
CE
CE
dc
Figure 10. Collector Current as a Function of
Collector Emitter Voltage
Figure 9. Safe Operating Area
6
NSS40302PDR2G
PNP TYPICAL CHARACTERISTICS
−0.25
−0.20
−0.15
−0.10
−0.30
I /I
= 10
I /I
= 100
C B
−55
°
C
C
B
150
°
C
−0.25
−0.20
−0.15
−0.10
150
°
C
−55
°
C
25
°
C
25
°
C
−0.05
0
−0.05
0
−0.001
−0.01
−0.1
−1
−10
−0.001
−0.01
−0.1
−1
−10
I ,
COLLECTOR CURRENT (A)
C
I ,
COLLECTOR CURRENT (A)
C
Figure 11. Collector Emitter Saturation Voltage
vs. Collector Current
Figure 12. Collector Emitter Saturation Voltage
vs. Collector Current
800
700
600
−1.1
−1.0
−0.9
−0.8
−0.7
−0.6
−0.5
150
°
C (5.0 V)
150
°
C (2.0 V)
I /I
= 10
C
B
−55
°
C
25
°
C
25
°
C (5.0 V)
500
400
300
200
25
°
C (2.0 V)
−55
°
C (5.0 V)
−55
°
C (2.0 V)
150
°
C
100
0
−0.4
−0.3
−0.001
−0.01
−0.1
−1
−10
−0.001
−0.01
−0.1
−1
−10
I ,
COLLECTOR CURRENT (A)
C
I ,
COLLECTOR CURRENT (A)
C
Figure 13. DC Current Gain vs. Collector
Current
Figure 14. Base Emitter Saturation Voltage vs.
Collector Current
−1.0
−2.0
−1.8
−1.6
−1.4
−1.2
−1.0
−0.8
−0.6
−0.9
−0.8
−0.7
−0.6
−0.5
−0.4
V
CE
= −2.0 V
3 A
100 mA
2 A
1 A
−55
°
C
25
°
C
150
°
C
−0.4
−0.3
−0.2
−0.2
0
−0.001
−0.01
−0.1
−1
−10
−0.0001
−0.001
−0.01
−0.1
I ,
COLLECTOR CURRENT (A)
C
I ,
BASE CURRENT (A)
b
Figure 15. Base Emitter Turn−On Voltage vs.
Collector Current
Figure 16. Saturation Region
7
NSS40302PDR2G
PNP TYPICAL CHARACTERISTICS
350
300
250
100
90
80
70
60
50
200
C
(pF)
ibo
C
(pF)
obo
150
100
40
30
0
−1
−2
−3
−4
−5
−6
0
−5
−10 −15
V ,
COLLECTOR BASE VOLTAGE (V)
cb
−20 −25
−30 −35 −40
V
, EMITTER BASE VOLTAGE (V)
EB
Figure 17. Input Capacitance
Figure 18. Output Capacitance
−10
−1
−3.5
−3.0
−2.5
−2.0
−1.5
−1.0
1 ms
I
B
= −20 mA
−18 mA
1 s
10 ms
−16 mA
100 ms
−14 mA
−12 mA
−10 mA
−8 mA
−0.1
−0.01
−6 mA
−4 mA
Thermal Limit
−2 mA
−0.5
0
Single Pulse
T
e
st at T
= 25
°
C
A
−0.001
−0.01
−0.1
−1
(V
−10
−100
0
−0.2 −0.4 −0.6 −0.8 −1.0 −1.2 −1.4 −1.6
−1.8 −2.0
V
CE
)
V ,
COLLECTOR−EMITTER VOLTAGE (V)
CE
dc
Figure 19. Safe Operating Area
Figure 20. Output Capacitance
8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC
−
8 NB
CASE 751
−
07
ISSUE AK
8
1
DATE 16 FEB 2011
SCALE 1:1
NOTES:
1. DIMENSIONING
AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING
DIMENSION: MILLIMETER.
3. DIMENSION
A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−
X
−
A
4. MAXIMUM
MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION
D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751
−
01 THRU 751
−
06 ARE OBSOLETE. NEW
STANDARD IS 751
−
07.
S
M
M
Y
B
0.25 (0.010)
1
K
−
Y
−
MILLIMETERS
DIM MIN
MAX
INCHES
G
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N
X 45
_
SEATING
PLANE
1.27 BSC
0.050 BSC
−
Z
−
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
0.10 (0.004)
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
8
1
8
1
8
8
XXXXX
ALYWX
XXXXXX
AYWW
G
XXXXX
ALYWX
XXXXXX
AYWW
1.52
0.060
G
1
1
Discrete
Discrete
(Pb
−
Free)
IC
IC
(Pb
−
Free)
7.0
0.275
4.0
0.155
XXXXX = Specific Device Code
XXXXXX = Specific Device Code
A
L
= Assembly Location
= Wafer Lot
A
= Assembly Location
=
Y
e
ar
Y
Y
W
G
=
Y
e
ar
= Work Week
= Pb
−
Free Package
WW
G
= Work Week
= Pb
−
Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”, may
or may not be present. Some products may
not follow the Generic Marking.
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
STYLES ON PAGE 2
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42564B
SOIC
−
8 NB
PAGE 1 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
SOIC
−
8 NB
CASE 751
−
07
ISSUE AK
DATE 16 FEB 2011
STYLE 1:
STYLE 2:
STYLE 3:
STYLE 4:
PIN 1.
EMITTER
2. COLLECTOR
3. COLLECTOR
4. EMITTER
5. EMITTER
6. BASE
PIN 1.
COLLECTOR, DIE, #1
2. COLLECTOR,
#1
3. COLLECTOR,
#2
4. COLLECTOR,
#2
5. BASE,
#2
PIN 1.
DRAIN, DIE #1
2. DRAIN,
#1
3. DRAIN,
#2
4. DRAIN,
#2
5. GATE,
#2
PIN 1.
ANODE
2. ANODE
3. ANODE
4. ANODE
5. ANODE
6. ANODE
7. ANODE
6. EMITTER,
#2
7. BASE,
#1
6. SOURCE,
#2
7. GATE,
#1
7. BASE
8. EMITTER
8. EMITTER,
#1
8. SOURCE,
#1
8. COMMON
CATHODE
STYLE 5:
STYLE 6:
PIN 1.
SOURCE
2. DRAIN
STYLE 7:
STYLE 8:
PIN 1.
COLLECTOR, DIE #1
2. BASE,
#1
PIN 1.
DRAIN
2. DRAIN
3. DRAIN
4. DRAIN
5. GATE
PIN 1.
INPUT
2. EXTERNAL
BYPASS
3. THIRD
STAGE SOURCE
4. GROUND
5. DRAIN
6. GATE
3
7. SECOND
STAGE Vd
8. FIRST
STAGE Vd
3. DRAIN
3. BASE,
#2
4. SOURCE
5. SOURCE
6. GATE
7. GATE
8. SOURCE
4. COLLECTOR,
#2
5. COLLECTOR,
#2
6. EMITTER,
#2
7. EMITTER,
#1
8. COLLECTOR,
#1
6. GATE
7. SOURCE
8. SOURCE
STYLE 9:
STYLE 10:
PIN 1.
GROUND
2. BIAS
1
STYLE 11:
PIN 1.
SOURCE 1
2. GATE
1
STYLE 12:
PIN 1.
EMITTER, COMMON
2. COLLECTOR,
DIE #1
3. COLLECTOR,
DIE #2
4. EMITTER,
COMMON
5. EMITTER,
COMMON
6. BASE,
DIE #2
PIN 1.
SOURCE
2. SOURCE
3. SOURCE
4. GATE
3. OUTPUT
4. GROUND
5. GROUND
6. BIAS
2
7. INPUT
8. GROUND
3. SOURCE
2
4. GATE
2
5. DRAIN
2
6. DRAIN
2
7. DRAIN
1
8. DRAIN
1
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
7. BASE,
DIE #1
8. EMITTER,
COMMON
STYLE 13:
PIN 1.
N.C.
2. SOURCE
3. SOURCE
4. GATE
STYLE 14:
PIN 1.
N
−
SOURCE
2. N
−
GATE
STYLE 15:
PIN 1.
ANODE 1
2. ANODE
1
STYLE 16:
PIN 1.
EMITTER, DIE #1
2. BASE,
DIE #1
3. P
−
SOURCE
4. P
−
GATE
5. P
−
DRAIN
6. P
−
DRAIN
7. N
−
DRAIN
8. N
−
DRAIN
3. ANODE
1
4. ANODE
1
5. CATHODE,
COMMON
6. CATHODE,
COMMON
7. CATHODE,
COMMON
8. CATHODE,
COMMON
3. EMITTER,
DIE #2
4. BASE,
DIE #2
5. COLLECTOR,
DIE #2
6. COLLECTOR,
DIE #2
7. COLLECTOR,
DIE #1
8. COLLECTOR,
DIE #1
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 17:
PIN 1.
VCC
2. V2OUT
3. V1OUT
4. TXE
STYLE 18:
STYLE 19:
PIN 1.
SOURCE 1
2. GATE
1
STYLE 20:
PIN 1.
ANODE
2. ANODE
3. SOURCE
4. GATE
PIN 1.
SOURCE (N)
2. GATE
(N)
3. SOURCE
(P)
4. GATE
(P)
5. DRAIN
3. SOURCE
2
4. GATE
2
5. DRAIN
2
6. MIRROR
2
7. DRAIN
1
8. MIRROR
1
5. RXE
6. VEE
7. GND
8. ACC
5. DRAIN
6. DRAIN
7. CATHODE
8. CATHODE
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 21:
STYLE 22:
STYLE 23:
STYLE 24:
PIN 1.
CATHODE 1
2. CATHODE
2
3. CATHODE
3
4. CATHODE
4
5. CATHODE
5
6. COMMON
ANODE
7. COMMON
ANODE
8. CATHODE
6
PIN 1.
I/O LINE 1
PIN 1.
LINE 1 IN
PIN 1.
BASE
2. COMMON
CATHODE/VCC
3. COMMON
CATHODE/VCC
4. I/O
LINE 3
5. COMMON
ANODE/GND
6. I/O
LINE 4
7. I/O
LINE 5
8. COMMON
ANODE/GND
2. COMMON
ANODE/GND
3. COMMON
ANODE/GND
4. LINE
2 IN
2. EMITTER
3. COLLECTOR/ANODE
4. COLLECTOR/ANODE
5. CATHODE
6. CATHODE
7. COLLECTOR/ANODE
8. COLLECTOR/ANODE
5. LINE
2 OUT
6. COMMON
ANODE/GND
7. COMMON
ANODE/GND
8. LINE
1 OUT
STYLE 25:
PIN 1.
VIN
2. N/C
STYLE 26:
PIN 1.
GND
2. dv/dt
STYLE 27:
PIN 1.
ILIMIT
2. OVLO
STYLE 28:
PIN 1.
SW_TO_GND
2. DASIC_OFF
3. DASIC_SW_DET
4. GND
3. REXT
4. GND
5. IOUT
6. IOUT
7. IOUT
8. IOUT
3. ENABLE
4. ILIMIT
5. SOURCE
6. SOURCE
7. SOURCE
8. VCC
3. UVLO
4. INPUT+
5. SOURCE
6. SOURCE
7. SOURCE
8. DRAIN
5. V_MON
6. VBULK
7. VBULK
8. VIN
STYLE 30:
PIN 1.
DRAIN 1
2. DRAIN
1
STYLE 29:
PIN 1.
BASE, DIE #1
2. EMITTER,
#1
3. BASE,
#2
3. GATE
2
4. SOURCE
2
5. SOURCE
1/DRAIN 2
6. SOURCE
1/DRAIN 2
7. SOURCE
1/DRAIN 2
8. GATE
1
4. EMITTER,
#2
5. COLLECTOR,
#2
6. COLLECTOR,
#2
7. COLLECTOR,
#1
8. COLLECTOR,
#1
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42564B
SOIC
−
8 NB
PAGE 2 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
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