onsemi-NSV60200LT1G
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NSS60200L
60
V
,
4
.0 A, Low V
CE(sat)
PNP
T
r
ansistor
2
ON Semiconductor’s e
PowerEdge family of low V
CE(sat)
transistors are miniature surface mount devices featuring ultra low
saturation voltage (V
) and high current gain capability. These
are designed for use in low voltage, high speed switching applications
where affordable efficient energy control is important.
CE(sat)
−60 VOLTS, 4.0 AMPS
PNP LOW V
CE(sat)
TRANSISTOR
EQUIVALENT R
DS(on)
80 m
W
Typical applications are DC−DC converters and power management
in portable and battery powered products such as cellular and cordless
phones, PDAs, computers, printers, digital cameras and MP3 players.
Other applications are low voltage motor controls in mass storage
products such as disc drives and tape drives. In the automotive
industry they can be used in air bag deployment and in the instrument
COLLECTOR
3
2
cluster. The high current gain allows e PowerEdge devices to be
1
driven directly from PMU’s control outputs, and the Linear Gain
(Beta) makes them ideal components in analog amplifiers.
BASE
Features
2
•
NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
EMITTER
3
•
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
1
MAXIMUM RATINGS
(T =
25
°
C)
A
2
SOT−23 (TO−236)
CASE 318
Rating
Symbol
Max
−60
Unit
Vdc
Vdc
Vdc
A
Collector-Emitter Voltage
Collector-Base Voltage
Emitter-Base Voltage
V
CEO
V
CBO
V
EBO
STYLE 6
−80
MARKING DIAGRAM
−7.0
−2.0
−4.0
Collector Current − Continuous
Collector Current − Peak
I
C
I
A
CM
VG M
G
G
THERMAL CHARACTERISTICS
Characteristic
1
Symbol
Max
Unit
VG =
Specific Device Code
T
o
tal Device Dissipation
P
460
mW
D
M
= Date Code*
T =
25
°
C
A
G
= Pb−Free Package
(Note: Microdot may be in either location)
Derate above 25
°
C
3.7
mW/
°
C
°
C/W
*Date Code orientation and/or overbar may
vary depending upon manufacturing location.
Thermal Resistance,
Junction−to−Ambient
R
270
q
JA
T
o
tal Device Dissipation
P
540
mW
D
T =
25
°
C
A
ORDERING INFORMATION
Derate above 25
°
C
4.3
mW/
°
C
°
C/W
†
Device
Package
Shipping
Thermal Resistance,
Junction−to−Ambient
R
230
q
JA
NSS60200
L
T
1G
SOT−23
3000/
T
a
pe & Reel
(Pb−Free)
Junction and Storage
T
e
mperature Range
T , T
−55 to
+150
°
C
J
stg
NSV60200
L
T
1G
SOT−23
3000/
T
a
pe & Reel
(Pb−Free)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our
T
a
pe and Reel Packaging Specification
Brochure, BRD8011/D.
2
1. FR
−
4
@
1
00 mm
, 1 oz. copper traces.
2
2. FR
−
4
@
5
00 mm
, 1 oz. copper traces.
©
Semiconductor Components Industries, LLC, 2007
1
Publication Order Number:
October, 2016 − Rev. 3
NSS60200L/D
NSS60200L
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collecto
r
−
E
mitter Breakdown Voltage
V
V
V
Vdc
Vdc
(BR)CEO
(BR)CBO
(BR)EBO
(I =
−10 mAdc, I
= 0)
−60
−80
−7.0
−
−
−
−
−
−
−
−
C
B
Collecto
r
−
B
ase Breakdown Voltage
(I =
−0.1 mAdc, I
= 0)
C
E
Emitte
r
−
B
ase Breakdown Voltage
(I =
−0.1 mAdc, I
= 0)
Vdc
−
E
C
Collector Cutoff Current
(V =
−60 Vdc, I
= 0)
I
m
Adc
m
Adc
CBO
−0.1
−0.1
CB
E
Emitter Cutoff Current
(V =
−6.0 Vdc)
EB
I
EBO
−
ON CHARACTERISTICS
h
FE
(I =
−10 mA, V
= −2.0 V)
150
150
100
100
−
300
−
−
−
−
−
C
CE
(I =
−500 mA, V
= −2.0 V)
C
CE
(I =
−1.0 A, V
= −2.0 V)
C
CE
(I =
−2.0 A, V
= −2.0 V)
−
C
CE
(I =
−0.1 A, I
= −0.010 A)
V
V
CE(sat)
−
−
−
−
−0.017
−0.095
−0.180
−0.170
−0.030
−0.120
−0.270
−0.220
C
B
(I =
−1.0 A, I
= −0.100 A)
C
B
(I =
−1.0 A, I
= −0.010 A)
C
B
(I =
−2.0 A, I
= −0.200 A)
C
B
(I =
−1.0 A, I
= −0.010 A)
V
V
V
BE(sat)
−
−
−
−
−0.900
−0.850
C
B
(I =
−1.0 A, V
= −2.0 V)
V
BE(on)
C
CE
Cutoff Frequency
(I =
−100 mA, V
= −5.0
V
, f =
1
00 MHz)
f
MHz
T
100
−
−
−
−
−
C
CE
Input Capacitance (V
= 0.5
V
, f =
1
.0 MHz)
Cibo
325
62
pF
pF
EB
Output Capacitance (V
= 3.0
V
, f =
1
.0 MHz)
Cobo
−
CB
SWITCHING CHARACTERISTICS
Delay (V
= −30
V
, I
=
7
50 mA, I
= 15 mA)
t
−
−
−
−
−
−
−
−
60
ns
ns
ns
ns
CC
C
B1
d
Rise (V
= −30
V
, I
=
7
50 mA, I
= 15 mA)
t
120
400
130
CC
C
B1
r
Storage (V
= −30
V
, I
=
7
50 mA, I
= 15 mA)
t
CC
C
B1
s
Fall (V
= −30
V
, I
=
7
50 mA, I
= 15 mA)
t
f
CC
C
B1
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulsed
Condition: Pulse Width = 300 msec, Duty Cycle
≤
2%.
2
NSS60200L
TYPICAL CHARACTERISTICS
0.50
0.2
0.15
0.1
V
= 150
°
C
−55
°
C
CE(sat)
IC/IB = 100
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
IC/IB = 10
25
°
C
−55
°
C
V
= 150
°
C
CE(sat)
25
°
C
0.05
0
0.05
0
0.001
0.01
0.1
1.0
10
0.001
0.01
0.1
1.0
10
10
10
I ,
COLLECTOR CURRENT (A)
C
I ,
COLLECTOR CURRENT (A)
C
Figure 1. Collector Emitter Saturation Voltage
vs. Collector Current
Figure 2. Collector Emitter Saturation Voltage
vs. Collector Current
400
1.1
1.0
0.9
0.8
0.7
0.6
0.5
150
°
C (5.0 V)
150
°
C (2.0 V)
IC/IB = 10
350
300
−55
°
C
25
°
C
25
°
C (5.0 V)
25
°
C (2.0 V)
250
200
150
−55
°
C (5.0 V)
−55
°
C (2.0 V)
150
°
C
100
50
0.4
0.3
0.001
0.01
0.1
1.0
10
0.001
0.01
0.1
1.0
I ,
COLLECTOR CURRENT (A)
C
I ,
COLLECTOR CURRENT (A)
C
Figure 3. DC Current Gain vs. Collector
Current
Figure 4. Base Emitter Saturation Voltage vs.
Collector Current
1.0
1.0
0.9
0.8
0.7
V
CE
= −2.0 V
IC/IB = 100
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
−55
°
C
25
°
C
−55
°
C
25
°
C
0.6
0.5
0.4
150
°
C
150
°
C
0.3
0.2
0.001
0.01
0.1
1.0
10
0.001
0.01
0.1
1.0
I ,
COLLECTOR CURRENT (A)
C
I ,
COLLECTOR CURRENT (A)
C
Figure 5. Base Emitter Saturation Voltage vs.
Collector Current
Figure 6. Base Emitter Turn−On Voltage vs.
Collector Current
3
NSS60200L
TYPICAL CHARACTERISTICS
375
1.0
0.8
0.6
0.4
V
CE
(V) I
= 500 mA
10 mA
C
C
(pF)
ibo
350
325
300
275
250
225
100 mA
300 mA
10
200
175
150
0.2
0
0.01
0.1
1.0
100
0
1.0
2.0
3.0
4.0
5.0
6.0
I ,
BASE CURRENT (mA)
B
V
EB
, EMITTER BASE VOLTAGE (V)
Figure 7. Saturation Region
Figure 8. Input Capacitance
10
1.0
0.1
90
100 ms
10 ms
85
80
75
70
65
60
C
(pF)
1 ms
obo
1 s
Thermal Limit
55
50
45
40
0.01
35
30
25
20
Single Pulse
T
e
st
at T
= 25
°
C
amb
0.001
0.1
1.0
10
100
0
5.0
V
10
15
20
25
30
35
V
CE
(V )
dc
, COLLECTOR BASE VOLTAGE (V)
CB
Figure 10. Safe Operating Area
Figure 9. Output Capacitance
4
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT
−
23 (TO
−
236)
CASE 318
−
08
ISSUE AS
DATE 30 JAN 2018
SCALE 4:1
NOTES:
D
1. DIMENSIONING
AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING
DIMENSION: MILLIMETERS.
3. MAXIMUM
LEAD THICKNESS INCLUDES LEAD FINISH.
MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF
THE BASE MATERIAL.
0.25
3
4. DIMENSIONS
D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
T
H
E
E
1
2
MILLIMETERS
INCHES
DIM
A
A1
b
c
D
E
e
L
MIN
0.89
0.01
0.37
0.08
2.80
1.20
1.78
0.30
0.35
2.10
0
°
NOM
1.00
0.06
0.44
0.14
2.90
1.30
1.90
0.43
0.54
2.40
−−−
MAX
MIN
0.035
0.000
0.015
0.003
0.110
0.047
0.070
0.012
0.014
0.083
0
°
NOM
0.039
0.002
0.017
0.006
0.114
0.051
0.075
0.017
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.008
0.120
0.055
0.080
0.022
0.027
0.104
10
°
L
1.11
0.10
0.50
0.20
3.04
1.40
2.04
0.55
0.69
2.64
10
°
3X
b
L1
VIEW C
e
TOP VIEW
L1
A
H
E
T
c
A1
SEE VIEW C
SIDE VIEW
GENERIC
MARKING DIAGRAM*
END VIEW
RECOMMENDED
SOLDERING FOOTPRINT
XXXM
G
G
1
3X
0.90
XXX = Specific Device Code
2.90
M
= Date Code
G
= Pb
−
Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”,
may or may not be present.
3X
0.95
0.80
PITCH
DIMENSIONS: MILLIMETERS
STYLE 1 THRU 5:
CANCELLED
STYLE 6:
STYLE 7:
PIN 1.
EMITTER
2. BASE
STYLE 8:
PIN 1.
BASE
2. EMITTER
3. COLLECTOR
PIN 1.
ANODE
2. NO
CONNECTION
3. CATHODE
3. COLLECTOR
STYLE 9:
PIN 1.
ANODE
2. ANODE
STYLE 10:
STYLE 11:
STYLE 12:
STYLE 13:
PIN 1.
SOURCE
2. DRAIN
STYLE 14:
PIN 1.
CATHODE
2. GATE
PIN 1.
DRAIN
2. SOURCE
3. GATE
PIN 1.
ANODE
PIN 1.
CATHODE
2. CATHODE
3. ANODE
2. CATHODE
3. CATHODE
−
ANODE
3. CATHODE
3. GATE
3. ANODE
STYLE 15:
STYLE 16:
STYLE 17:
PIN 1.
NO CONNECTION
2. ANODE
STYLE 18:
STYLE 19:
STYLE 20:
PIN 1.
GATE
2. CATHODE
3. ANODE
PIN 1.
ANODE
2. CATHODE
3. CATHODE
PIN 1.
NO CONNECTION
PIN 1.
CATHODE
PIN 1.
CATHODE
2. ANODE
3. GATE
2. CATHODE
3. ANODE
2. ANODE
3. CATHODE
−
ANODE
3. CATHODE
STYLE 21:
STYLE 22:
STYLE 23:
PIN 1.
ANODE
2. ANODE
STYLE 24:
STYLE 25:
STYLE 26:
PIN 1.
GATE
2. SOURCE
3. DRAIN
PIN 1.
RETURN
2. OUTPUT
3. INPUT
PIN 1.
GATE
2. DRAIN
PIN 1.
ANODE
2. CATHODE
3. GATE
PIN 1.
CATHODE
2. ANODE
3. SOURCE
3. NO
CONNECTION
3. CATHODE
STYLE 27:
STYLE 28:
PIN 1.
CATHODE
2. CATHODE
3. CATHODE
PIN 1.
ANODE
2. ANODE
3. ANODE
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42226B
SOT
−
23 (TO
−
236)
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
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©
Semiconductor Components Industries, LLC, 2019
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,
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onsemi
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onsemi
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