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NTB082N65S3F
MOSFET
– N‐Channel,
SUPERFET III, FRFET
650
V
,
4
0 A, 82 m
W
Description
SUPERFET III MOSFET is ON Semiconductor’s brand-new high
voltage super-junction (SJ) MOSFET family that is utilizing charge
balance technology for outstanding low on-resistance and lower gate
charge performance. This advanced technology is tailored to minimize
conduction loss, provide superior switching performance, and
withstand extreme dv/dt rate.
V
R
MAX
I MAX
D
DSS
DS(ON)
650 V
82 m
W
@ 10 V
40 A
Consequently, SUPERFET III MOSFET is very suitable for the
various power system for miniaturization and higher efficiency.
SUPERFET III FRFET MOSFET’s optimized reverse recovery
performance of body diode can remove additional component and
improve system reliability.
D
G
Features
•
700 V @ T
= 150
°
C
J
•
Typ. R
= 70 m
W
S
DS(on)
•
Ultra Low Gate Charge (Typ. Q
= 81 nC)
g
•
Low Effective Output Capacitance (Typ. C
•
100% Avalanche Tested
= 722 pF)
oss(eff.)
D
•
These Devices are Pb
−
Free and are RoHS Compliant
G
S
Applications
2
D PAK
−
3
CASE 418AJ
•
Telecom / Server Power Supplies
•
Industrial Power Supplies
•
EV Charger
MARKING DIAGRAM
•
UPS / Solar
$Y&Z&3&K
NTB
082N65S3F
$Y
= ON Semiconductor Logo
= Assembly Plant Code
= Data Code (
Y
e
ar & Week)
= Lot
&Z
&3
&K
NTB082N65S3F =
Specific Device Code
ORDERING INFORMATION
this data sheet.
©
Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
August, 2019
−
Rev. 4
NTB082N65S3F/D
NTB082N65S3F
ABSOLUTE MAXIMUM RATINGS
(T =
25
°
C, Unless otherwise specified)
C
Symbol
Parameter
Value
650
Unit
V
V
DSS
V
GSS
Drain to Source Voltage
Gate to Source Voltage
DC
30
V
AC (f > 1 Hz)
30
V
I
D
Drain Current
Continuous (T
= 25
°
C)
40
A
C
Continuous (T
= 100
°
C)
25.5
100
C
I
Drain Current
A
mJ
A
DM
E
MOSFET dv/dt
510
AS
AS
I
4.8
E
3.13
100
mJ
V/ns
AR
dv/dt
Power Dissipation
50
P
(T =
25
°
C)
313
W
W/
°
C
°
C
D
C
Derate Above 25
°
C
2.5
T , T
Operating and Storage
T
e
mperature Range
−
55 to +150
300
J
STG
T
Maximum Lead
T
e
mperature for Soldering, 1/8
″
from Case for 5 s
°
C
L
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Repetitive
rating: pulse-width limited by maximum junction temperature.
2. I
= 4.8 A, R
= 25
W
, starting T
= 25
°
C.
AS
G
J
3. I
£
20 A, di/dt
≤
100 A/
m
s, V
≤
400 V, starting T
= 25
°
C.
SD
DD
J
THERMAL CHARACTERISTICS
Symbol
Parameter
Value
0.4
Unit
R
Thermal Resistance, Junction to Case, Max.
q
JC
JA
_
C/W
2
R
Thermal Resistance, Junction to Ambient (1 in
Pad of 2
−
oz Copper), Max.
62.5
q
PACKAGE MARKING AND ORDERING INFORMATION
Part Number
Top Marking
Package
Packing Method
Reel Size
Tape Width
Quantity
2
†
NTB082N65S3F
NTB082N65S3F
D PAK
T
a
pe and Reel
330 mm
24 mm
800 Units
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
2
NTB082N65S3F
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
C
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
650
700
−
−
−
−
−
−
V
V
V
V
I
= 0
V
, I
= 1 mA, T
= 25
_
C
DSS
GS
D
J
= 0
V
, I
= 1 mA, T
= 150
_
C
GS
D
J
D
BV
/
D
T
Breakdown Voltage
T
e
mperature
Coefficient
= 10 mA, Referenced to 25
_
C
0.7
V/
_
C
DSS
J
D
I
Zero Gate Voltage Drain Current
V
DS
V
DS
V
GS
= 650
V
, V
= 0 V
−
−
−
−
124
−
10
−
m
A
DSS
GS
= 520
V
, T
=
1
25
_
C
C
I
Gate to Body Leakage Current
=
30
V
, V
= 0 V
100
nA
GSS
DS
ON CHARACTERISTICS
V
Gate Threshold Voltage
V
GS
V
GS
V
DS
= V
, I
= 1.0 mA
3.0
−
−
5.0
82
−
V
m
W
S
GS(th)
DS(on)
DS
D
R
Static Drain to Source On Resistance
Forward Transconductance
= 10
V
, I
=
2
0 A
70
24
D
g
FS
= 20
V
, I
=
2
0 A
−
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 400
V
, V
= 0 V, f = 1
M
Hz
−
−
−
−
−
−
−
−
3410
70
−
−
−
−
−
−
−
−
pF
pF
pF
pF
nC
nC
nC
W
iss
DS
GS
C
Output Capacitance
oss
C
Effective Output Capacitance
Energy Related Output Capacitance
T
o
tal Gate Charge at 10V
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
Equivalent Series Resistance
V
DS
V
DS
V
DS
= 0 V to 400 V, V
= 0 V
722
126
81
oss(eff.)
GS
C
= 0 V to 400 V, V
= 0 V
GS
oss(er.)
Q
= 400
V
, I
=
2
0 A, V
= 10 V
D GS
g(tot)
Q
24
gs
Q
32
gd
ESR
f = 1 MHz
1.9
SWITCHING CHARACTERISTICS
t
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
V
V
= 400
V
, I
=
2
0 A,
−
−
−
−
27
27
79
5
−
−
−
−
ns
ns
ns
ns
d(on)
DD
GS
D
= 10
V
, R
= 3
W
g
t
r
t
d(off)
t
f
SOURCE-DRAIN DIODE CHARACTERISTICS
I
Maximum Continuous Source to Drain Diode Forward Current
Maximum Pulsed Source to Drain Diode Forward Current
−
−
−
−
−
−
40
100
1.3
A
A
V
S
I
SM
V
SD
Source to Drain Diode Forward
Voltage
V
GS
= 0
V
, I
=
2
0 A
SD
t
Reverse Recovery Time
V
= 0
V
, I
=
2
0 A,
−
−
108
410
−
−
ns
rr
GS
F
SD
dI /dt
= 100 A/
m
s
Q
Reverse Recovery Charge
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially
independent of operating temperature typical characteristics.
3
NTB082N65S3F
TYPICAL PERFORMANCE CHARACTERISTICS
200
100
200
V
GS
= 10.0
V
*Notes:
1. V
= 20 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
DS
100
2. 250
m
s Pulse Test
10
1
150
o
C
10
25
o
C
o
*Notes:
−
55 C
ms Pulse Test
1. 250
C
= 25
o
C
2. T
0.1
1
0.1
1
10 20
2
3
4
5
6
7
8
9
V
DS
, Drain
−
Source Voltage [V]
V
GS
, Gate
−
Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
0.20
0.15
0.10
0.05
0.00
1000
100
10
*Note: T
C
= 25
o
C
*Notes:
1. V
GS
= 0 V
2. 250
m
s Pulse Test
150
o
C
25
o
C
1
V
GS
= 10 V
V
GS
= 20 V
o
−
55 C
0.1
0.01
0.001
0
20
40
60
80
100
120
0.0
0.5
1.0
1.5
2.0
I
D
, Drain Current [A]
V
SD
, Body Diode Forward Voltage [V]
Figure 3. On-Resistance Variation vs. Drain
Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current and Temperature
10
100000
*Note: I
D
= 20 A
10000
1000
100
10
C
iss
V
DS
= 130 V
8
6
4
2
0
V
DS
= 400 V
C
oss
*Note:
1. V
= 0 V
GS
2. f = 1 MHz
C
C
C
= C
+ C
(C =
shorted)
gs gd
ds
C
rss
iss
1
= C
+ C
oss
rss
ds
gd
= C
gd
0.1
0.1
0
20
40
60
80
100
1
10
100
1000
Q
g
, Total Gate Charge [nC]
V
DS
, Drain
−
Source Voltage [V]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
4
NTB082N65S3F
TYPICAL PERFORMANCE CHARACTERISTICS
(Continued)
1.2
1.1
1.0
0.9
0.8
3.0
*Notes:
1. V
*Notes:
1. V
= 0 V
= 10 V
GS
GS
2.5
2.0
1.5
1.0
0.5
0.0
D
= 20 A
2. I
2. I
D
= 10 mA
−
50
0
50
100
150
−
50
0
50
100
150
T
J
, Junction Temperature
[
o
C]
T
J
, Junction Temperature
[
o
C]
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variant vs. Temperature
50
40
30
20
10
0
200
100
10
1
30ms
100ms
1ms
10ms
DC
Operation in This Area
is Limited by R
DS(on)
*Notes:
1. T
C
= 25
o
C
J
= 150
o
C
3. Single Pulse
2. T
0.1
1
10
100
1000
25
50
75
100
125
150
T
C
, Case Temperature [
o
C]
V
DS
, Drain
−
Source Voltage [V]
Figure 9. Maximum Safe Operation Area
Figure 10. Maximum Drain Current
vs. Case Temperature
20
16
12
8
4
0
0
130
260
390
520
650
V
DS
, Drain to Source Voltage [V]
Figure 11. E
OSS
vs. Drain to Source Voltage
5
NTB082N65S3F
TYPICAL PERFORMANCE CHARACTERISTICS
(Continued)
2
1
DUTY CYCLE
−
DESCENDING ORDER
D = 0.5
0.2
0.1
P
DM
0.1
0.01
0.05
0.02
0.01
t
1
t
2
NOTES:
(t) = r(t) x R
o
Z
R
q
JC
q
JC
= 0.4
C/W
q
JC
Peak T
= P
Duty Cycle, D = t
/ t
x Z
(t) + T
SINGLE PULSE
10
−
4
J
DM
q
JC C
1
2
0.001
10
−
5
10
−
3
10
−
2
10
−
1
10
0
10
1
10
2
t, RECTANGULAR PULSE DURATION (sec)
Figure 12. Transient Thermal Response Curve
6
NTB082N65S3F
V
GS
R
Q
Q
L
G
V
DS
Q
GS
GD
V
GS
DUT
I
G
= Const.
Charge
Figure 13. Gate Charge Test Circuit & Waveform
R
L
V
DS
GS
90%
90%
10%
90%
V
DS
V
DD
V
GS
R
G
10%
V
DUT
V
GS
t
r
t
f
t
t
d(off)
d(on)
t
on
t
off
Figure 14. Resistive Switching Test Circuit & Waveforms
L
2
1
2
E
AS
+
@
LI
AS
V
DS
BV
DSS
I
D
I
AS
R
G
V
DD
I (t)
D
DUT
V
DD
10 V
V
DS
(t)
t
p
Time
t
p
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms
7
NTB082N65S3F
+
DUT
V
SD
−
I
SD
L
Driver
R
G
Same Type
as DUT
V
DD
V
GS
−
dv/dt controlled by R
G
−
I controlled
by pulse period
SD
Gate Pulse Width
D
+
Gate Pulse Period
V
GS
10 V
(Driver)
I
, Body Diode Forward Current
FM
I
di/dt
SD
(DUT)
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
DS
V
DD
V
SD
(DUT)
Body Diode
Forward Voltage Drop
Figure 16. Peak Diode Recovery dt/dt Test Circuit & Waveforms
SUPERFET and FRFET are a registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United
States and/or other countries.
8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
D
2
PAK
−
3 (TO
−
263, 3
−
LEAD)
CASE 418AJ
ISSUE F
DATE 11 MAR 2021
SCALE 1:1
XXXXXX = Specific Device Code
A
= Assembly Location
WL
Y
= Wafer Lot
=
Y
e
ar
GENERIC MARKING DIAGRAMS*
WW
W
M
G
AKA
= Work Week
= Week Code (SSG)
= Month Code (SSG)
= Pb
−
Free Package
= Polarity Indicator
XX
AYWW
XXXXXXXXG
AKA
XXXXXXXXG
AYWW
XXXXXX
XXYMW
XXXXXXXXX
AWLYWWG
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”,
may or may not be present. Some products
may not follow the Generic Marking.
IC
Standard
Rectifier
SSG
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
98AON56370E
D
2
PAK
−
3 (TO
−
263, 3
−
LEAD)
PAGE 1 OF 1
DESCRIPTION:
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2018
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
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−
Marking.pdf
. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
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PUBLICATION ORDERING INFORMATION
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T
:
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o
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