onsemi-NTD14N03RT4G
| Part # | onsemi-NTD14N03RT4G |
Download  | onsemi-NTD14N03RT4G |
NTD14N03R, NVD14N03R
N-Channel, DPAK
14 A, 25 V
Features
•
Planar HD3e Process for Fast Switching Performance
14 AMPERES, 25 VOLTS
R
DS(on)
= 70.4 m
W
(Typ)
•
Low R
to Minimize Conduction Loss
DS(on)
•
Low C
to Minimize Driver Loss
iss
•
Low Gate Charge
D
•
Optimized for High Side Switching Requirements in
High
−
Efficiency DC
−
DC Converters
•
NVD and SVD Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC
−
Q101 Qualified and P
P
A
P Capable
N
−
CHANNEL
G
•
These Devices are Pb
−
Free and are RoHS Compliant
S
4
MAXIMUM RATINGS
(T =
25
°
C unless otherwise specified)
J
2
1
Parameter
Drain
−
to
−
Source Voltage
Symbol Value Unit
3
DPAK
V
DSS
25
20
Vdc
Vdc
CASE 369C
(Surface Mount)
STYLE 2
Gate
−
to
−
Source Voltage
−
Continuous
Thermal Resistance
−
Junction
−
to
−
Case
V
GS
R
6.0
20.8
14
11.4
28
°
C/W
W
q
JC
T
o
tal Power Dissipation @ T
= 25
°
C
P
D
A
Drain Current
−
Continuous @ T
= 25
°
C, Chip
I
I
I
A
A
D
D
D
MARKING DIAGRAM
& PIN ASSIGNMENTS
−
Continuous @ T
= 25
°
C, Limited by Package
A
A
−
Single Pulse (tp
≤
10
m
s)
A
Thermal Resistance, Junction
−
to
−
Ambient
R
80
°
C/W
q
JA
4 Drain
T
o
tal Power Dissipation @ T
= 25
°
C
P
I
1.56
3.1
W
A
A
D
D
Drain Current
−
Continuous @ T
= 25
°
C
A
Thermal Resistance, Junction
−
to
−
Ambient
R
120
°
C/W
q
JA
T
o
tal Power Dissipation @ T
= 25
°
C
P
I
1.04
2.5
W
A
1
Gate
3
A
D
D
2
Drain Current
−
Continuous @ T
= 25
°
C
A
Source
Drain
Operating and Storage
T
e
mperature Range
T , T
−
55 to
150
°
C
J
stg
A
Y
= Assembly Location*
=
Y
e
ar
Maximum Lead
T
e
mperature for Soldering
Purposes, 1/8
″
from case for 10 seconds
T
L
260
°
C
WW
= Work Week
14N03 =
Device Code
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. When
surface mounted to an FR4 board using 0.5 sq. in pad size.
2. When
surface mounted to an FR4 board using minimum recommended pad
size.
G
= Pb
−
Free Package
* The Assembly Location code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package, the front side assembly
code may be blank.
ORDERING INFORMATION
this data sheet.
©
Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
May, 2019
−
Rev. 9
NTD14N03R/D
NTD14N03R, NVD14N03R
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise specified)
J
Characteristics
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
V(br)
Vdc
DSS
(V =
0 Vdc, I
= 250
m
Adc)
25
28
−
−
GS
D
T
e
mperature Coefficient (Positive)
−
−
mV/
°
C
m
Adc
Zero Gate Voltage Drain Current
I
DSS
(V =
20 Vdc, V
= 0 Vdc)
−
−
−
−
1.0
10
DS
GS
(V =
20 Vdc, V
= 0 Vdc, T
= 150
°
C)
DS
GS
J
Gate
−
Body Leakage Current
(V 20
Vdc, V
= 0 Vdc)
I
nAdc
GSS
=
−
−
100
GS
DS
V
Vdc
GS(th)
(V =
V ,
I =
250
m
Adc)
1.0
1.5
2.0
DS
GS
D
Threshold
T
e
mperature Coefficient (Negative)
−
−
−
mV/
°
C
m
W
R
DS(on)
(V =
4.5 Vdc, I
= 5 Adc)
−
−
117
70.4
130
95
GS
D
(V =
10 Vdc, I
= 5 Adc)
GS
D
(V =
10 Vdc, I
= 5 Adc)
g
Mhos
pF
FS
−
7.0
−
DS
D
DYNAMIC CHARACTERISTICS
Input Capacitance
C
−
−
−
115
62
−
−
−
iss
Output Capacitance
C
oss
(V =
20 Vdc, V
= 0
V
, f = 1
M
Hz)
DS
GS
Transfer Capacitance
C
33
rss
Turn
−
On Delay Time
t
−
−
−
−
−
−
−
3.8
27
−
−
−
−
−
−
−
ns
d(on)
Rise Time
t
r
(V =
10 Vdc, V
= 10 Vdc,
GS
D
DD
G
I
= 5 Adc, R
= 3
W
)
Turn
−
Off Delay Time
Fall Time
t
9.6
2.0
1.8
0.8
0.7
d(off)
t
f
Gate Charge
Q
T
Q
1
Q
2
nC
(V =
5 Vdc, I
= 5 Adc,
GS
D
V
DS
SOURCE
−
DRAIN DIODE CHARACTERISTICS
Forward On
−
Voltage
V
SD
V
dc
S
GS
−
−
0.93
0.82
1.2
−
S
GS
J
Reverse Recovery Time
t
−
−
−
−
6.6
4.75
1.88
0.002
−
−
−
−
ns
rr
t
a
(I =
5 Adc, V
= 0 Vdc,
S
S
GS
t
b
Reverse Recovery Stored Charge
Q
m
C
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse
T
e
st: Pulse
Width
≤
300
m
s, Duty Cycle
≤
2%.
4. Switching
characteristics are independent of operating junction temperatures.
2
NTD14N03R, NVD14N03R
TYPICAL CHARACTERISTICS
14
12
10
8
14
10 V
8 V
5 V
V
DS
≥
10 V
12
10
8
7 V
6 V
4.5 V
4 V
6
6
3.5 V
T =
25
°
C
J
4
2
0
4
3 V
T =
125
°
C
2
0
J
T =
−
55
°
C
J
V
= 2.5 V
GS
0
2
4
6
8
10
0
1
2
3
4
5
6
V
V
, DRAIN
−
TO
−
SOURCE VOLTAGE (VOLTS)
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (VOLTS)
DS
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
0.20
0.16
0.12
0.08
0.20
0.16
0.12
0.08
= 10 V
T =
125
°
C
J
GS
T =
25
°
C
J
T =
125
°
C
J
T =
−
55
°
C
J
T =
25
°
C
J
T =
−
55
°
C
J
0.04
0
0.04
0
V
GS
= 4.5 V
2
0
2
4
6
8
10
12
14
0
4
6
8
10
12
14
I ,
DRAIN CURRENT (AMPS)
D
I ,
DRAIN CURRENT (AMPS)
D
Figure 3. On
−
Resistance versus Drain Current
Figure 4. On
−
Resistance versus Drain Current
and Temperature
and Temperature
1000
1.8
1.6
1.4
1.2
1
V
GS
= 0 V
I
V
= 5 A
D
= 10 V
GS
T =
150
°
C
J
100
10
T =
125
°
C
J
0.8
0.6
−
50
−
25
0
25
50
75
100
125
150
0
5
10
15
20
25
T , JUNCTION TEMPERATURE (
°
C)
J
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (VOLTS)
Figure 5. On
−
Resistance Variation with
Figure 6. Drain
−
to
−
Source Leakage Current
Temperature
versus Voltage
3
NTD14N03R, NVD14N03R
TYPICAL CHARACTERISTICS
8
200
160
120
80
T =
25
°
C
V
DS
= 0 V
V =
0 V
GS
J
C
C
iss
6
Q
T
rss
C
C
iss
V
GS
Q
Q
2
1
4
oss
2
0
C
rss
40
0
I
= 5 A
D
T =
25
°
C
J
V
GS
V
DS
10
5
0
5
10
15
20
0
0.4
0.8
1.2
1.6
2.0
Q ,
TOTAL GATE CHARGE (nC)
g
GATE
−
TO
−
SOURCE OR DRAIN
−
TO
−
SOURCE VOLTAGE
(VOLTS)
Figure 8. Gate
−
to
−
Source and
Figure 7. Capacitance Variation
Drain
−
to
−
Source Voltage versus Total Charge
100
70
60
50
40
30
20
V
= 10 V
= 5 A
= 10 V
DS
V
GS
= 0 V
I
D
V
GS
t
r
10
t
d(off)
T =
150
°
C
J
t
d(on)
t
f
10
0
T =
25
°
C
J
1
1
10
R ,
GATE RESISTANCE (
W
)
100
0
0.2
0.4
0.6
0.8
1.0
V
SD
, SOURCE
−
TO
−
DRAIN VOLTAGE (VOLTS)
G
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
Figure 10. Diode Forward Voltage versus
Current
100
10
1
10
m
s
100
m
s
1 ms
10 ms
0 V < V
< 20 V
GS
Single Pulse
T =
25
°
C
A
0.1
R
Limit
Thermal Limit
Package Limit
DS(on)
dc
0.01
0.1
1
10
100
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
4
NTD14N03R, NVD14N03R
TYPICAL CHARACTERISTICS
1000
100
10
D = 0.5
0.2
0.1
0.05
0.02
1
0.01
0.1
0.01
SINGLE PULSE
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
t, TIME (s)
Figure 12. Thermal Response
ORDERING INFORMATION
Device
†
Package
Shipping
NTD14N03RT4G
DPAK
2500 /
T
a
pe & Reel
2500 /
T
a
pe & Reel
2500 /
T
a
pe & Reel
(Pb
−
Free)
NVD14N03RT4G*
SVD14N03RT4G*
DPAK
(Pb
−
Free)
DPAK
(Pb
−
Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
*NVD and SVD Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC
−
Q101 Qualified
and PPAP Capable.
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C
4
ISSUE F
2
1
DATE 21 JUL 2015
3
SCALE 1:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
A
D
E
C
A
b3
B
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BOD
Y
.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
c2
4
2
L3
Z
DETAIL A
H
1
3
7. OPTIONAL MOLD FEATURE.
INCHES
DIM MIN
MAX
0.086 0.094
A1
0.000 0.005
0.025 0.035
b2
0.028 0.045
b3
0.180 0.215
MILLIMETERS
L4
b2
e
NOTE 7
MIN
2.18
0.00
0.63
0.72
4.57
0.46
0.46
5.97
6.35
MAX
2.38
0.13
0.89
1.14
5.46
0.61
0.61
6.22
6.73
c
BOTTOM VIEW
A
SIDE VIEW
b
b
M
0.005 (0.13)
C
TOP VIEW
c
0.018 0.024
c2
0.018 0.024
Z
Z
D
E
e
0.235 0.245
0.250 0.265
0.090 BSC
H
2.29 BSC
9.40 10.41
1.40 1.78
2.90 REF
0.51 BSC
0.89 1.27
GAUGE
SEATING
PLANE
H
L
L1
L2
0.370 0.410
0.055 0.070
0.114 REF
L2
PLANE
C
0.020 BSC
L3
0.035 0.050
L
BOTTOM VIEW
A1
L4
Z
−−−
0.040
0.155
−−−
−−−
3.93
1.01
−−−
L1
ALTERNATE
CONSTRUCTIONS
DETAIL A
ROTATED 9
0
5
CW
GENERIC
MARKING DIAGRAM*
STYLE 1:
PIN 1.
BASE
STYLE 2:
PIN 1.
GATE
2. DRAIN
STYLE 3:
PIN 1.
ANODE
STYLE 4:
STYLE 5:
PIN 1.
GATE
PIN 1.
CATHODE
2. ANODE
2. COLLECTOR
2. CATHODE
3. ANODE
4. CATHODE
2. ANODE
3. CATHODE
4. ANODE
3. EMITTER
3. SOURCE
4. DRAIN
3. GATE
XXXXXXG
ALYWW
AYWW
XXX
4. COLLECTOR
4. ANODE
STYLE 6:
PIN 1.
MT1
2. MT2
STYLE 7:
STYLE 8:
PIN 1.
N/C
STYLE 9:
PIN 1.
ANODE
2. CATHODE
STYLE 10:
PIN 1.
CATHODE
2. ANODE
XXXXXG
PIN 1.
GATE
2. COLLECTOR
2. CATHODE
3. GATE
4. MT2
3. EMITTER
3. ANODE
4. CATHODE
3. RESISTOR
ADJUST
4. CATHODE
3. CATHODE
4. ANODE
4. COLLECTOR
IC
Discrete
SOLDERING FOOTPRINT*
XXXXXX =
Device Code
A
L
Y
WW
G
= Assembly Location
= Wafer Lot
=
Y
e
ar
= Work Week
= Pb
−
Free Package
6.20
0.244
3.00
0.118
2.58
0.102
5.80
0.228
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”, may
or may not be present. Some products may
not follow the Generic Marking.
1.60
0.063
6.17
0.243
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON10527D
DPAK (SINGLE GAUGE)
PAGE 1 OF 1
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.
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T
:
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o
ll Free USA/Canada
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