onsemi-NTD3055-150
| Part # | onsemi-NTD3055-150 |
Download  | onsemi-NTD3055-150 |
NTD3055-150,
NVD3055-150
N-Channel, DPAK/IPAK
9.0 A, 60 V
Designed for low voltage, high speed switching applications in
power supplies, converters and power motor controls and bridge
circuits.
9.0 AMPERES, 60 VOLTS
R
DS(on)
= 122 m
W
(Typ)
Features
D
•
NVD Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC
−
Q101
Qualified and PPAP Capable
N
−
Channel
•
These Devices are Pb
−
Free and are RoHS Compliant
G
Typical Applications
•
Power Supplies
•
Converters
•
Power Motor Controls
•
Bridge Circuits
S
4
4
1
2
1
2
MAXIMUM RATINGS
(T =
25
°
C unless otherwise noted)
J
3
3
Rating
Symbol
Value
60
Unit
Vdc
Vdc
Vdc
DPAK
IPAK
CASE 369D
(STRAIGHT LEAD)
STYLE 2
CASE 369C
(SURFACE MOUNT)
STYLE 2
Drain
−
to
−
Source Voltage
V
DSS
DGR
Drain
−
to
−
Gate Voltage (R
= 10 M
W
)
V
60
GS
Gate
−
to
−
Source Voltage
−
Continuous
MARKING DIAGRAMS
& PIN ASSIGNMENTS
V
“
20
“
30
GS
GS
−
Non
−
repetitive (t
v
10 ms)
V
p
Drain Current
Adc
Apk
4
4
−
Continuous @ T
= 25
°
C
I
9.0
3.0
27
Drain
Drain
A
D
D
−
Continuous @ T
= 100
°
C
−
Single Pulse (t
v
10
m
s)
I
A
I
p
DM
T
o
tal Power Dissipation @ T
= 25
°
C
P
D
28.8
0.19
2.1
W
W/
°
C
W
A
Derate above 25
°
C
A
1.5
W
A
2
1
Gate
3
Operating and Storage
T
e
mperature Range
T , T
−
55 to 175
°
C
Drain
J
stg
Source
1
2
3
Single Pulse Drain
−
to
−
Source Avalanche
E
AS
30
mJ
Gate Drain Source
Energy
−
Starting T
= 25
°
C
J
(V =
25 Vdc, V
= 10 Vdc,
DD
GS
A
= Assembly Location*
L = 1.0 mH, I (pk) = 7.75 A, V
= 60 Vdc)
L
DS
3150
Y
WW
G
= Device Code
=
Y
e
ar
Thermal Resistance
°
C/W
°
C
−
Junction
−
to
−
Case
R
R
R
5.2
71.4
100
q
JC
JA
JA
= Work Week
= Pb
−
Free Package
q
q
* The Assembly Location code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package, the front side assembly
code may be blank.
Maximum Lead
T
e
mperature for Soldering
Purposes, 1/8
″
from case for 10 seconds
T
L
260
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. When
surface mounted to an FR4 board using 0.5 sq in pad size.
2. When
surface mounted to an FR4 board using minimum recommended
pad size.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
©
Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
May, 2019
−
Rev. 7
NTD3055
−
150/D
NTD3055
−
150, NVD3055
−
150
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
J
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
(V =
0 Vdc, I
= 250
m
Adc)
V
Vdc
mV/
°
C
m
Adc
(BR)DSS
60
−
−
−
GS
D
−
70.2
T
e
mperature Coefficient (Positive)
Zero Gate Voltage Drain Current
I
DSS
−
−
−
−
1.0
10
(V =
60 Vdc, V
= 0 Vdc)
DS
GS
(V =
60 Vdc, V
= 0 Vdc, T
= 150
°
C)
DS
GS
J
Gate
−
Body Leakage Current (V
=
20 Vdc, V
= 0 Vdc)
I
−
−
100
nAdc
GS
DS
GSS
V
Vdc
mV/
°
C
m
W
GS(th)
2.0
3.0
6.4
4.0
(V =
V ,
I =
250
m
Adc)
DS
GS
D
−
−
Threshold
T
e
mperature Coefficient (Negative)
R
V
DS(on)
−
122
150
(V =
10 Vdc, I
= 4.5 Adc)
GS
D
(V =
10 Vdc, I
= 9.0 Adc)
Vdc
DS(on)
−
−
1.4
1.1
1.9
−
GS
D
(V =
10 Vdc, I
= 4.5 Adc, T
= 150
°
C)
GS
D
J
g
FS
−
5.4
−
mhos
pF
DS
D
DYNAMIC CHARACTERISTICS
Input Capacitance
C
−
−
−
200
70
280
100
40
iss
(V =
25 Vdc, V
= 0 Vdc,
DS
GS
Output Capacitance
Transfer Capacitance
C
oss
f = 1.0 MHz)
C
26
rss
Turn
−
On Delay Time
t
−
−
−
−
−
−
−
11.2
37.1
12.2
23
25
80
25
50
15
−
ns
d(on)
(V =
48 Vdc, I
= 9.0 Adc,
DD
Rise Time
t
r
D
V
GS
= 10 Vdc,
Turn
−
Off Delay Time
Fall Time
t
d(off)
R
G
t
f
Gate Charge
Q
T
Q
1
Q
2
7.1
nC
(V =
48 Vdc, I
= 9.0 Adc,
DS
D
1.7
V
GS
3.5
−
SOURCE
−
DRAIN DIODE CHARACTERISTICS
Forward On
−
Voltage
V
SD
−
−
0.98
0.86
1.20
Vdc
ns
S
GS
(I =
19 Adc, V
= 0 Vdc, T
=
−
S
GS
150
°
C)
J
Reverse Recovery Time
t
rr
−
−
−
−
28.9
21.6
7.3
−
−
−
−
(I =
9.0 Adc, V
= 0 Vdc,
S
GS
t
a
S
t
b
Reverse Recovery Stored Charge
Q
0.036
m
C
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse
T
e
st: Pulse Width
≤
300
m
s, Duty Cycle
≤
2%.
4. Switching
characteristics are independent of operating junction temperatures.
2
NTD3055
−
150, NVD3055
−
150
20
16
12
8
20
V
≥
10 V
V
GS
= 10 V
DS
16
12
8
V
V
= 9 V
= 8 V
GS
V
= 7 V
GS
GS
V
V
= 6 V
= 5 V
GS
T =
25
°
C
J
4
0
4
0
GS
T =
100
°
C
J
T =
−
55
°
C
J
0
1
2
3
4
5
6
7
8
3
0
0
4
5
6
7
8
9
V
, DRAIN
−
TO
−
SOURCE VOLTAGE (VOLTS)
V
, GATE
−
TO
−
SOURCE VOLTAGE (VOLTS)
DS
GS
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
0.5
0.4
0.3
0.2
0.5
0.4
0.3
0.2
V
= 10 V
V
= 15 V
GS
GS
T =
100
°
C
J
T =
100
°
C
J
T =
25
°
C
J
T =
25
°
C
J
T =
−
55
°
C
J
0.1
0
0.1
0
T =
−
55
°
C
J
0
4
8
12
16
20
24
4
8
12
16
20
24
I ,
DRAIN CURRENT (AMPS)
D
I ,
DRAIN CURRENT (AMPS)
D
Figure 3. On
−
Resistance versus
Gate
−
To
−
Source Voltage
Figure 4. On
−
Resistance versus Drain Current
and Gate Voltage
1000
100
2.2
2
V
= 0 V
GS
I
D
= 4.5 A
V
= 10 V
GS
T =
150
°
C
J
1.8
1.6
1.4
1.2
1
T =
125
°
C
J
10
1
T =
100
°
C
J
0.8
0.6
−
50
−
25
0
25
50
75 100
125 150 175
10
20
30
40
50
60
T , JUNCTION TEMPERATURE (
°
C)
J
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (VOLTS)
Figure 5. On
−
Resistance Variation with
Figure 6. Drain
−
To
−
Source Leakage
Temperature
Current versus Voltage
3
NTD3055
−
150, NVD3055
−
150
560
480
400
320
240
160
12
V
= 0 V
V
GS
= 0 V
DS
T =
25
°
C
J
Q
T
C
iss
10
8
V
GS
Q
Q
2
1
C
rss
6
C
iss
4
C
oss
I
= 9 A
2
0
D
80
0
T =
25
°
C
J
C
rss
V
GS
V
DS
10
5
0
5
10
15
20
25
0
1
2
3
4
5
6
7
8
GATE
−
TO
−
SOURCE OR DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Q ,
TOTAL GATE CHARGE (nC)
g
Figure 7. Capacitance Variation
Figure 8. Gate
−
to
−
Source and
Drain
−
to
−
Source Voltage versus Total Charge
100
10
8
V
= 0 V
GS
V
= 30 V
= 9 A
= 10 V
DS
T =
25
°
C
J
I
D
V
GS
t
r
6
t
f
4
t
d(off)
2
0
t
d(on)
10
1
10
R ,
GATE RESISTANCE (
W
)
100
0.6
0.68
0.76
0.84
0.92
1
V
SD
, SOURCE
−
TO
−
DRAIN VOLTAGE (VOLTS)
G
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
Figure 10. Diode Forward Voltage versus
Current
100
10
32
24
16
V
= 20 V
GS
I
D
= 7.75 A
SINGLE PULSE
= 25
°
C
T
C
10
m
s
100
m
s
1 ms
10 ms
1
8
0
R
LIMIT
THERMAL LIMIT
DS(on)
PACKAGE LIMIT
dc
0.1
0.1
1
10
100
25
50
75
100
125
150
175
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (VOLTS)
T , STARTING JUNCTION TEMPERATURE (
°
C)
J
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy versus
Starting Junction Temperature
4
NTD3055
−
150, NVD3055
−
150
10
D = 0.5
0.2
1
0.1
P
(pk)
0.05
t
1
0.01
t
2
SINGLE PULSE
DUTY CYCLE, D = t
/t
1 2
0.1
0.00001
0.0001
0.001
0.01
t, TIME (s)
0.1
1
10
Figure 13. Thermal Response
ORDERING INFORMATION
Device
†
Package
Shipping
NTD3055
−
150G
DPAK
75 Units / Rail
75 Units / Rail
(Pb
−
Free)
NTD3055
−
150
−
1G
NTD3055
−
150T4G
NTD3055
−
150T4H
NVD3055
−
150T4G*
NVD3055
−
150T4G
−
VF01
IPAK
(Pb
−
Free)
DPAK
(Pb
−
Free)
2500 /
T
a
pe & Reel
2500 /
T
a
pe & Reel
2500 /
T
a
pe & Reel
2500 /
T
a
pe & Reel
DPAK
(Halide
−
Free)
DPAK
(Pb
−
Free)
DPAK
(Pb
−
Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
*NVD Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC
−
Q101 Qualified and PPAP
Capable.
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
IPAK
CASE 369D
−
01
ISSUE C
DATE 15 DEC 2010
C
B
NOTES:
SCALE 1:1
1. DIMENSIONING
AND TOLERANCING PER
ANSI Y14.5M, 1982.
V
E
R
2. CONTROLLING
DIMENSION: INCH.
INCHES
DIM MIN
MAX
MILLIMETERS
4
MIN
5.97
6.35
2.19
0.69
0.46
0.94
MAX
6.35
6.73
2.38
0.88
0.58
1.14
Z
A
B
C
D
E
F
G
H
J
K
R
S
V
Z
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
A
S
1
2
3
−
T
−
SEATING
PLANE
2.29 BSC
K
0.87
0.46
8.89
4.45
0.63
0.89
3.93
1.01
0.58
9.65
5.45
1.01
1.27
−−−
J
F
H
0.155
−−−
D
3 PL
G
M
T
0.13 (0.005)
MARKING
DIAGRAMS
STYLE 1:
PIN 1.
BASE
STYLE 2:
STYLE 3:
PIN 1.
ANODE
STYLE 4:
PIN 1.
CATHODE
2. ANODE
Integrated
Circuits
PIN 1.
GATE
2. DRAIN
3. SOURCE
4. DRAIN
2. COLLECTOR
3. EMITTER
4. COLLECTOR
2. CATHODE
3. ANODE
4. CATHODE
Discrete
3. GATE
4. ANODE
xxxxx
ALYWW
x
YWW
xxxxxxxx
STYLE 5:
PIN 1.
GATE
2. ANODE
STYLE 6:
PIN 1.
MT1
2. MT2
STYLE 7:
PIN 1.
GATE
2. COLLECTOR
3. CATHODE
4. ANODE
3. GATE
4. MT2
3. EMITTER
4. COLLECTOR
xxxxxxxxx =
Device Code
A
= Assembly Location
lL
Y
= Wafer Lot
=
Y
e
ar
WW
= Work Week
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON10528D
IPAK (DPAK INSERTION MOUNT)
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
4
DPAK (SINGLE GAUGE)
CASE 369C
ISSUE G
2
1
DATE 31 MAY 2023
3
SCALE 1:1
GENERIC
MARKING DIAGRAM*
XXXXXXG
ALYWW
AYWW
XXX
XXXXXG
IC
Discrete
XXXXXX =
Device Code
A
= Assembly Location
L
= Wafer Lot
STYLE 1:
STYLE 2:
PIN 1.
GATE
2. DRAIN
STYLE 3:
STYLE 4:
STYLE 5:
Y
WW
G
=
Y
e
ar
= Work Week
= Pb
−
Free Package
PIN 1.
BASE
PIN 1.
ANODE
2. CATHODE
3. ANODE
PIN 1.
CATHODE
2. ANODE
3. GATE
PIN 1.
GATE
2. ANODE
3. CATHODE
4. ANODE
2. COLLECTOR
3. EMITTER
3. SOURCE
4. DRAIN
4. COLLECTOR
4. CATHODE
4. ANODE
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLE 6:
PIN 1.
MT1
2. MT2
STYLE 7:
PIN 1.
GATE
STYLE 8:
PIN 1.
N/C
STYLE 9:
PIN 1.
ANODE
2. CATHODE
STYLE 10:
PIN 1.
CATHODE
2. ANODE
2. COLLECTOR
2. CATHODE
3. GATE
4. MT2
3. EMITTER
4. COLLECTOR
3. ANODE
4. CATHODE
3. RESISTOR
ADJUST
4. CATHODE
3. CATHODE
4. ANODE
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON10527D
DPAK (SINGLE GAUGE)
PAGE 1 OF 1
onsemi
and
are trademarks of Semiconductor Components Industries, LLC dba
onsemi
or its subsidiaries in the United States and/or other countries.
onsemi
reserves
the right to make changes without further notice to any products herein.
onsemi
makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does
onsemi
assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages.
onsemi
does not convey any license under its patent rights nor the rights of others.
©
Semiconductor Components Industries, LLC, 2018
onsemi
,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “
onsemi
” or its affiliates
and/or subsidiaries in the United States and/or other countries.
onsemi
owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of
onsemi
’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
.
onsemi
reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as
−
is” and
onsemi
makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does
onsemi
assume any liability arising out of the application or use
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and applications using
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provided by
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. “Typical” parameters which may be provided in
onsemi
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