onsemi-NTD4809NT4G
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NTD4809N, NVD4809N
Power MOSFET
30
V
,
5
8 A, Single N−Channel, DPAK/IPAK
Features
•
Low R
to Minimize Conduction Losses
DS(on)
•
Low Capacitance to Minimize Driver Losses
•
Optimized Gate Charge to Minimize Switching Losses
•
AEC Q101 Qualified − NVD4809N
V
R
MAX
I MAX
D
(BR)DSS
DS(on)
•
These Devices are Pb−Free and are RoHS Compliant
9.0 m
W
@ 10 V
14 m
W
@ 4.5 V
30 V
58 A
Applications
•
CPU Power Delivery
•
DC−DC Converters
•
Low Side Switching
D
N−Channel
MAXIMUM RATINGS
(T =
25
°
C unless otherwise noted)
J
G
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Symbol
Value
30
Unit
V
V
DSS
S
4
V
GS
“
20
13.1
10.1
2.63
V
4
Continuous Drain
I
D
A
T =
25
°
C
A
q
JA
4
T =
85
°
C
A
Power Dissipation
T =
25
°
C
A
P
D
W
A
1
2
3
2
q
JA
1
1
2
3
3
Continuous Drain
I
T =
25
°
C
9.6
7.4
1.4
D
A
DPAK
IPAK
CASE 369AD
IPAK
CASE 369D
(Straight Lead)
(Straight Lead
STYLE 2
DPAK) STYLE 2
q
JA
T =
85
°
C
A
Steady
State
CASE 369AA
(Bent Lead)
STYLE 2
Power Dissipation
T =
25
°
C
A
P
I
W
A
D
q
JA
Continuous Drain
T
C
T
C
T
C
= 25
°
C
= 85
°
C
= 25
°
C
58
45
52
D
MARKING DIAGRAMS
& PIN ASSIGNMENTS
Current (R
)
q
JC
4
Power Dissipation
P
W
D
Drain
4
4
q
JC
Drain
Drain
Pulsed Drain Current
t =10
m
s T
= 25
°
C
I
DM
130
45
A
A
p
A
Current Limited by Package
T =
25
°
C
A
I
DmaxPkg
Operating Junction and Storage
T
e
mperature
T , T
−
5
5 to
175
°
C
J
stg
2
Source Current (Body Diode)
Drain to Source dV/dt
I
43
6.0
A
S
1
2
3
Drain
1
3
Gate Drain Source
dV/dt
V/ns
mJ
Gate Source
1
2
3
Gate Drain Source
Single Pulse Drain−to−Source Avalanche
E
AS
91.0
Energy (V
= 24
V
, V
=
1
0
V
,
DD
GS
A
Y
WW
= Assembly Location*
=
Y
e
ar
= Work Week
L = 1.0 mH, I
= 13.5 A, R
= 25
W
)
L(pk)
G
Lead
T
e
mperature for Soldering Purposes
(1/8
″
from case for 10 s)
T
L
260
°
C
4809N =
Device Code
G
= Pb−Free Package
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
* The Assembly Location code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package, the front side assembly
code may be blank.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
©
Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
June, 2014 − Rev. 14
NTD4809N/D
NTD4809N, NVD4809N
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Junction−to−Case (Drain)
Junction−to−
T
A
B (Drain)
R
2.9
3.5
°
C/W
q
JC
R
q
JC−TAB
R
R
57.1
107.2
q
q
JA
JA
1. Surface−mounted
on FR4 board using 1 in sq pad size, 1 oz Cu.
2. Surface−mounted
on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
J
Parameter
OFF CHARACTERISTICS
Symbol
Test Condition
Min
Typ
Max
Unit
Drain−to−Source Breakdown Voltage
V
V
GS
= 0
V
, I
=
2
50
m
A
30
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
T
e
mperature Coefficient
V
/T
J
25
mV/
°
C
(BR)DSS
Zero Gate Voltage Drain Current
I
T =
25
°
C
1.0
10
m
A
DSS
J
V
V
= 0
V
,
= 24 V
GS
DS
T =
125
°
C
J
Gate−to−Source Leakage Current
Gate Threshold Voltage
I
V
= 0
V
, V
=
GS
20 V
100
nA
GSS
DS
GS
V
V
= V
, I
= 250
m
A
1.5
2.5
9.0
14
V
GS(TH)
DS
D
Negative Threshold
T
e
mperature Coefficient
Drain−to−Source On Resistance
V
/T
J
5.7
7.0
7.0
12
mV/
°
C
m
W
GS(TH)
R
V
= 10 to
I
D
I
D
I
D
I
D
= 30 A
= 15 A
= 30 A
= 15 A
DS(on)
GS
11.5 V
V
= 4.5 V
GS
11
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
gFS
V
= 15
V
, I
=
1
5 A
9.0
S
DS
D
C
1456
315
200
11
pF
iss
V
GS
= 0
V
, f =
1
.0 MHz,
Output Capacitance
C
oss
V
DS
= 12 V
Reverse Transfer Capacitance
T
o
tal Gate Charge
C
rss
Q
13
nC
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
T
o
tal Gate Charge
Q
2.5
4.8
5.0
25
G(TH)
V
= 4.5
V
, V
=
1
5
V
,
DS
GS
I
D
= 30 A
Q
GS
Q
GD
Q
V
GS
= 11.5 V, V
= 15 V,
nC
ns
G(TOT)
DS
I
D
= 30 A
Turn−On Delay Time
Rise Time
t
12.3
21.3
15.1
5.3
d(on)
t
r
V
GS
= 4.5
V
, V
=
1
5
V
,
DS
= 15 A, R
= 3.0
W
G
I
D
Turn−Off Delay Time
Fall Time
t
d(off)
t
f
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4.
Switching characteristics are independent of operating junction temperatures.
2
NTD4809N, NVD4809N
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted) (continued)
J
Parameter
Turn−On Delay Time
Symbol
Test Condition
Min
Typ
7.0
Max
Unit
t
ns
d(on)
Rise Time
t
22.7
25.3
2.8
r
V
= 11.5 V, V
= 15 V,
DS
= 15 A, R
= 3.0
W
G
GS
I
D
Turn−Off Delay Time
Fall Time
t
d(off)
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
T =
25
°
C
0.95
0.83
19.5
10.7
8.8
1.2
V
SD
J
V
= 0
V
,
= 30 A
GS
I
S
T =
125
°
C
J
Reverse Recovery Time
Charge Time
t
ns
RR
ta
V
GS
= 0
V
,
d
Is/dt = 100 A/
m
s,
I
S
= 30 A
Discharge Time
tb
Reverse Recovery Time
PACKAGE PARASITIC VALUES
Source Inductance
Q
9.2
nC
nH
RR
L
2.49
0.0164
1.88
S
D
D
G
Drain Inductance, DPAK
Drain Inductance, IPAK
Gate Inductance
L
L
L
T =
25
°
C
A
3.46
Gate Resistance
R
2.4
W
G
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse
T
e
st: Pulse Width
≤
300
m
s, Duty Cycle
≤
2%.
4. Switching
characteristics are independent of operating junction temperatures.
3
NTD4809N, NVD4809N
TYPICAL PERFORMANCE CURVES
120
110
120
6 V
7 V
T =
25
°
C
V
DS
≥
10 V
J
6.5 V
5.5 V
5 V
100
90
80
70
60
50
40
30
20
10
0
100
80
4.5 V
4.2 V
60
4 V
3.8 V
3.6 V
40
T =
125
°
C
J
T =
25
°
C
J
20
0
3.4 V
3.2 V
T =
−55
°
C
J
0
1
2
3
4
5
0
1
2
3
4
5
6
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.045
0.040
0.035
0.030
0.025
0.020
0.015
0.010
T =
25
°
C
J
I
= 30 A
D
T =
25
°
C
J
V
GS
= 4.5 V
0.020
0.015
0.010
V
= 11.5 V
GS
0.005
0
0.005
0
3
4
5
6
7
8
9
10
10 15
20 25 30
35 40 45 50 55
60
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
I ,
DRAIN CURRENT (AMPS)
D
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
100,000
10,000
2.0
1.5
1.0
0.5
V
GS
= 0 V
I
V
= 30 A
D
= 10 V
GS
T =
175
°
C
J
1000
100
10
T =
125
°
C
J
−50 −25
0
25
50
75 100 125 150 175
5
10
15
20
25
T , JUNCTION TEMPERATURE (
°
C)
J
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Drain Voltage
4
NTD4809N, NVD4809N
TYPICAL PERFORMANCE CURVES
2500
2000
1500
1000
12
V
= 0 V
V
GS
= 0 V
Q
DS
T
T =
25
°
C
J
11
10
9
C
C
iss
8
C
iss
7
6
5
rss
Q
Q
2
1
4
3
500
0
I
= 30 A
D
2
C
oss
0 V < V
< 11.5 V
T =
25
°
C
GS
1
0
C
J
rss
10
5
0
5
10
15
20
25
0 1 2 3 4 5 6 7 8 9
1
0
11
1
21
3
1
4
1
51
6
1
7
1
8
1
9
2
0212
2
2
3
2
4
2
5
2
6
V
GS
V
DS
Q ,
TOTAL GATE CHARGE (nC)
G
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 8. Gate−To−Source and Drain−To−Source
Voltage vs. Total Charge
Figure 7. Capacitance Variation
30
25
20
15
10
1000
V
= 15 V
= 30 A
= 11.5 V
V
= 0 V
DD
GS
I
D
T =
25
°
C
J
V
GS
100
t
d(off)
t
r
10
1
t
d(on)
t
f
5
0
1
10
100
0.5
0.6
0.7
0.8
0.9
1.0
R ,
GATE RESISTANCE (OHMS)
G
V
SD
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
10
120
100
80
I
D
= 15 A
10
m
s
100
m
s
1 ms
60
V
= 20 V
10 ms
GS
1
SINGLE PULSE
40
T =
25
°
C
A
0.1
R
LIMIT
dc
DS(on)
THERMAL LIMIT
PACKAGE LIMIT
20
0
0.01
0.01
0.1
1
10
100
25
50
75
100
125
150
175
T , JUNCTION TEMPERATURE (
°
C)
J
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
5
NTD4809N, NVD4809N
TYPICAL PERFORMANCE CURVES
100
10
25
°
C
100
°
C
125
°
C
1
0.1
1
10
100
1000
PULSE WIDTH (
m
s)
Figure 13. Avalanche Characteristics
100
10
D = 0.5
0.2
0.1
0.05
0.02
0.01
1
0.1
0.01
SINGLE PULSE
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
t, TIME (s)
Figure 14. Thermal Response
ORDERING INFORMATION
Order Number
†
Package
Shipping
NTD4809NT4G
DPAK
(Pb−Free)
2500 /
T
a
pe & Reel
75 Units/Rail
NTD4809N−1G
NTD4809N−35G
IPAK
(Pb−Free)
IPAK Trimmed Lead
(3.5 0.15
mm)
(Pb−Free)
75 Units/Rail
NVD4809NT4G
DPAK
(Pb−Free)
2500 /
T
a
pe & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
6
NTD4809N, NVD4809N
PACKAGE DIMENSIONS
DPAK (SINGLE GUAGE)
CASE 369AA
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BOD
Y
.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
C
A
D
A
E
c2
b3
B
4
2
L3
L4
Z
H
DETAIL A
1
3
INCHES
DIM MIN
MAX
0.086 0.094
A1
0.000 0.005
0.025 0.035
MILLIMETERS
MIN
2.18
0.00
0.63
0.76
4.57
0.46
0.46
5.97
6.35
MAX
2.38
0.13
0.89
1.14
5.46
0.61
0.61
6.22
6.73
A
b2
c
b
b
b2
0.030 0.045
b3
0.180 0.215
M
0.005 (0.13)
C
H
e
c
0.018 0.024
c2
0.018 0.024
GAUGE
SEATING
PLANE
L2
PLANE
C
D
E
e
0.235 0.245
0.250 0.265
0.090 BSC
2.29 BSC
9.40 10.41
1.40 1.78
2.74 REF
0.51 BSC
0.89 1.27
H
L
L1
L2
0.370 0.410
0.055 0.070
0.108 REF
L
A1
L1
0.020 BSC
DETAIL A
ROTATED 9
0
5
CW
L3
0.035 0.050
L4
Z
−−− 0.040
0.155 −−−
−−−
3.93
1.01
−−−
STYLE 2:
PIN 1.
GATE
2. DRAIN
SOLDERING FOOTPRINT*
3. SOURCE
4. DRAIN
6.20
3.00
0.244
0.118
2.58
0.102
5.80
1.60
0.063
6.17
0.228
0.243
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
7
NTD4809N, NVD4809N
PACKAGE DIMENSIONS
3.5 MM IPAK, STRAIGHT LEAD
CASE 369AD
ISSUE B
NOTES:
E
A
1.. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2.. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION
b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30mm FROM TERMINAL TI
P
.
E3
E2
A1
L2
L1
4. DIMENSIONS
D AND E DO NOT INCLUDE
MOLD GATE OR MOLD FLASH.
D2
D
L
MILLIMETERS
DIM MIN
MAX
2.38
0.60
1.10
0.89
1.10
6.22
−−−
A
A1
A2
b
b1
D
D2
E
E2
E3
e
2.19
0.46
0.87
0.69
0.77
5.97
4.80
6.35
4.57
4.45
T
SEATING
PLANE
b1
A1
e
2X
A2
E2
6.73
5.45
5.46
3X
b
M
0.13
T
2.28 BSC
D2
L
L1
L2
3.40
−−−
0.89
3.60
2.10
1.27
STYLE 2:
PIN 1.
GATE
2. DRAIN
3. SOURCE
4. DRAIN
OPTIONAL
CONSTRUCTION
8
NTD4809N, NVD4809N
PACKAGE DIMENSIONS
IPAK
CASE 369D
ISSUE C
C
B
R
NOTES:
1. DIMENSIONING
AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING
DIMENSION: INCH.
V
S
E
INCHES
DIM MIN
MAX
MILLIMETERS
4
2
MIN
5.97
6.35
2.19
0.69
0.46
0.94
MAX
6.35
6.73
2.38
0.88
0.58
1.14
Z
A
B
C
D
E
F
G
H
J
K
R
S
V
Z
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
A
K
1
3
−T−
SEATING
PLANE
2.29 BSC
0.87
0.46
8.89
4.45
0.63
0.89
3.93
1.01
0.58
9.65
5.45
1.01
1.27
−−−
J
F
H
0.155
−−−
D
3 PL
STYLE 2:
PIN 1.
GATE
G
M
T
0.13 (0.005)
2. DRAIN
3. SOURCE
4. DRAIN
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and actual performance may vary over time.
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ll Free USA/Canada
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: 303−675−2176 or 800−344−3867
T
o
ll Free USA/Canada
Email
: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
NTD4809N/D
