onsemi-NTD4965N-1G
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ypical” parameters which may be provided in
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NTD4965N
N-Channel, DPAK/IPAK
30
V
,
6
8 A
Features
•
Low R
to Minimize Conduction Losses
DS(on)
•
Low Capacitance to Minimize Driver Losses
V
R
MAX
I
D
MAX
(BR)DSS
DS(ON)
•
Optimized Gate Charge to Minimize Switching Losses
4.7 m
W
@ 10 V
10 m
W
@ 4.5 V
•
Three Package
V
a
riations for Design Flexibility
•
These Devices are Pb
−
Free, Halogen Free/BFR Free and are RoHS
Compliant
30 V
68 A
D
Applications
•
CPU Power Delivery
•
DC
−
DC Converters
G
MAXIMUM RATINGS
(T =
25
°
C unless otherwise stated)
J
Parameter
Drain
−
to
−
Source Voltage
Gate
−
to
−
Source Voltage
Symbol
Value
30
Unit
S
V
DSS
V
V
A
N
−
CHANNEL MOSFET
V
GS
20
Continuous Drain
Current R
I
D
T =
25
°
C
17.8
A
4
4
q
JA
T =
100
°
C
A
12.6
2.6
4
Power
T =
25
°
C
A
P
W
A
D
D
D
Dissipation R
q
JA
2
1
1
1
2
3
3
2
Continuous Drain
Current R
I
D
T =
25
°
C
A
13.0
9.2
3
q
JA
CASE 369AC
3 IPAK
(Straight Lead)
CASE 369AA
DPAK
(Bent Lead)
STYLE 2
CASE 369D
IPAK
(Straight Lead
DPAK)
T =
100
°
C
A
Steady
State
Power
T =
25
°
C
A
P
I
1.39
W
A
Dissipation R
q
JA
Continuous Drain
Current R
T
= 25
°
C
= 100
°
C
= 25
°
C
68
48
D
C
MARKING DIAGRAMS
& PIN ASSIGNMENTS
q
JC
T
C
4
Drain
Power
T
C
P
38.5
W
A
4
4
Dissipation R
q
JC
Drain
Drain
Pulsed Drain
Current
t =10
m
s
p
T =
25
°
C
A
I
DM
248
76
Current Limited by Package
T =
25
°
C
A
I
A
DmaxPkg
Operating Junction and Storage
T
e
mperature
T ,
STG
−
55 to
°
C
J
2
T
+175
1
2
3
Drain
1
3
Gate Drain Source
Source Current (Body Diode)
Drain to Source dV/dt
I
S
35
6.0
47
A
Gate Source
1
2
3
dV/dt
EAS
V/ns
mJ
Gate Drain Source
Single Pulse Drain
−
to
−
Source Avalanche
Energy (T
= 25
°
C, V
= 24
V
, V
=
1
0
V
,
A
Y
= Assembly Location
=
Y
e
ar
J
DD
GS
I =
31 A
, L = 0.1 mH, R
= 25
W)
L
pk
G
WW
= Work Week
Lead
T
e
mperature for Soldering Purposes
(1/8” from case for 10 s)
T
260
°
C
L
4965N =
Device Code
G
= Pb
−
Free Package
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Surface
−
mounted on FR4 board using 1 sq
−
in pad, 1 oz Cu.
2. Surface
−
mounted on FR4 board using the minimum recommended pad size.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
©
Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
May, 2019
−
Rev. 3
NTD4965N/D
NTD4965N
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
3.9
Unit
Junction
−
to
−
Case (Drain)
R
°
C/W
q
JC
Junction
−
to
−
TAB (Drain)
R
4.3
q
JC
−
TAB
R
R
57.6
107.6
q
q
JA
JA
3. Surface
−
mounted on FR4 board using 1 sq
−
in pad, 1 oz Cu.
4. Surface
−
mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain
−
to
−
Source Breakdown Voltage
V
V
GS
= 0
V
, I
=
2
50
m
A
30
V
(BR)DSS
D
Drain
−
to
−
Source Breakdown Voltage
T
e
mperature Coefficient
V
/
21.5
(BR)DSS
mV/
°
C
T
J
Zero Gate Voltage Drain Current
I
V
= 0
V
,
= 24 V
T =
25
°
C
1.0
10
DSS
GS
DS
J
V
m
A
T =
125
°
C
J
Gate
−
to
−
Source Leakage Current
Gate Threshold Voltage
I
V
= 0
V
, V
=
20 V
100
nA
GSS
DS
GS
V
V
= V
, I
= 250
m
A
1.5
1.8
4.1
2.5
V
GS(TH)
GS
DS
D
Negative Threshold
T
e
mperature
Coefficient
V
/T
GS(TH) J
mV/
°
C
Drain
−
to
−
Source On Resistance
R
V
= 10 V
I
= 30 A
= 15 A
= 30 A
= 15 A
3.4
3.4
5.4
5.3
52
4.7
10
DS(on)
GS
D
I
D
m
W
V
GS
= 4.5 V
I
D
I
D
Forward Transconductance
g
FS
V
= 1.5
V
, I
=
3
0 A
S
DS
D
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
C
1710
664
340
17.2
2.7
ISS
Output Capacitance
Reverse Transfer Capacitance
T
o
tal Gate Charge
C
OSS
C
RSS
V
= 0
V
, f =
1
.0 MHz, V
= 15 V
pF
GS
DS
Q
G(TOT)
Threshold Gate Charge
Gate
−
to
−
Source Charge
Gate
−
to
−
Drain Charge
T
o
tal Gate Charge
Q
G(TH)
V
= 4.5
V
, V
=
1
5
V
, I
=
3
0 A
nC
nC
GS
DS
D
Q
5.1
GS
GD
Q
8.5
Q
t
V
= 10
V
, V
=
1
5
V
, I
=
3
0 A
28.2
G(TOT)
GS
DS
D
Turn
−
On Delay Time
Rise Time
12.1
34.2
18.9
14.2
d(ON)
t
r
V
= 4.5
V
, V
=
1
5
V
,
DS
GS
D
ns
I
= 15 A, R
= 3.0
W
G
Turn
−
Off Delay Time
Fall Time
t
d(OFF)
t
f
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6.
Switching characteristics are independent of operating junction temperatures.
7.
Assume terminal length of 110 mils.
2
NTD4965N
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise specified)
J
Parameter
Turn
−
On Delay Time
Symbol
Test Condition
Min
Typ
Max
Unit
t
8.3
21.5
24.4
7.8
d(ON)
Rise Time
t
r
V
= 10
V
, V
=
1
5
V
,
DS
GS
D
ns
I
= 15 A, R
= 3.0
W
G
Turn
−
Off Delay Time
t
d(OFF)
Fall Time
t
f
DRAIN
−
SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
T =
25
°
C
0.86
0.74
28.3
13.3
15
1.1
SD
J
V
S
= 0
V
,
GS
V
I
= 30 A
T =
125
°
C
J
Reverse Recovery Time
Charge Time
t
RR
t
ns
nC
nH
a
V
= 0
V
,
d
IS/dt = 100 A/
m
s,
GS
I
S
= 30 A
Discharge Time
t
b
Reverse Recovery Charge
PACKAGE PARASITIC VALUES
Drain Inductance, DPAK
Gate Resistance
Q
16
RR
L
L
L
2.85
0.0164
1.88
4.9
S
D
D
G
T =
25
°
C
A
L
R
1.0
2.2
W
G
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Pulse
T
e
st: pulse width
v
300
m
s, duty cycle
v
2%.
6. Switching
characteristics are independent of operating junction temperatures.
7. Assume
terminal length of 110 mils.
ORDERING INFORMATION
†
Device
Package
Shipping
NTD4965NT4G
NTD4965N
−
1G
NTD4965N
−
35G
DPAK
2500 /
T
a
pe & Reel
(Pb
−
Free)
IPAK
(Pb
−
Free)
75 Units / Rail
75 Units / Rail
IPAK Trimmed Lead
(Pb
−
Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
3
NTD4965N
TYPICAL PERFORMANCE CURVES
90
90
80
70
60
50
40
30
20
10
0
10 V thru 4.5 V
V
DS
= 10 V
V
= 3.7 V
3.5 V
80
70
60
50
40
30
20
10
0
GS
T =
25
°
C
J
3.3 V
3.1 V
T =
25
°
C
J
2.9 V
2.7 V
T =
125
°
C
J
T =
−
55
°
C
J
0
1
2
3
4
5
1
2
3
4
5
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
8.0
15
14
13
12
11
10
9
8
7
6
5
I
= 30 A
T =
25
°
C
J
D
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
T =
25
°
C
J
V
GS
= 4.5 V
V
GS
= 10 V
4
3
2
3
4
5
6
7
8
9
10
10
20
30
40
50
60
70
80
90
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
I ,
DRAIN CURRENT (A)
D
Figure 3. On
−
Resistance vs. Gate
−
to
−
Source
Figure 4. On
−
Resistance vs. Drain Current and
Voltage
Gate Voltage
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
10000
1000
100
T =
150
°
C
I
V
= 30 A
J
D
= 10 V
GS
T =
125
°
C
J
T =
85
°
C
J
V
= 0 V
GS
10
−
50
−
25
0
25
50
75 100
125 150 175
5
10
V ,
DRAIN
−
TO
−
SOURCE VOLTAGE (V)
DS
15
20
25
30
T , JUNCTION TEMPERATURE (
°
C)
J
Figure 5. On
−
Resistance Variation with
Figure 6. Drain
−
to
−
Source Leakage Current
Temperature
vs. Voltage
4
NTD4965N
TYPICAL PERFORMANCE CURVES
2400
2200
2000
1800
1600
1400
1200
1000
800
10
Q
T =
25
°
C
T
J
9
V
GS
= 0 V
8
7
6
5
4
3
2
C
C
iss
Q
Q
gd
gs
oss
I
= 30 A
D
600
T =
25
°
C
V
V
J
400
= 15 V
= 10 A
DD
GS
C
1
0
200
rss
0
0
5
10
15
20
25
30
0
2
4
6
8
10 12 14 16 18 20 22 24 26 28
V ,
DRAIN
−
TO
−
SOURCE VOLTAGE (V)
DS
Q ,
TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate
−
to
−
Source and Drain
−
to
−
Source
Voltage vs. Total Charge
1000
100
10
30
25
20
15
10
5
V
= 15 V
= 15 A
= 10 V
DD
V
GS
= 0 V
I
D
V
GS
T =
125
°
C
J
T =
25
°
C
J
t
r
t
d(off)
t
f
t
d(on)
0
1
1
10
R ,
GATE RESISTANCE (
W
)
100
0.4
0.5
0.6
0.7
0.8
0.9
1.0
V
SD
, SOURCE
−
TO
−
DRAIN VOLTAGE (V)
G
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
48
44
40
36
32
28
24
20
16
12
8
1000
100
10
I
= 31 A
D
10
m
s
100
m
s
1 ms
10 ms
1
0 V < V
< 10 V
Single Pulse
GS
T
C
= 25
°
C
0.1
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
dc
4
0
0.01
0.01
0.1
1
10
100
25
50
75
100
125
150
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
T , STARTING JUNCTION TEMPERATURE (
°
C)
J
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
5
NTD4965N
PACKAGE DIMENSIONS
DPAK (SINGLE GUAGE)
CASE 369AA
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BOD
Y
.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
C
A
D
A
E
c2
b3
B
4
2
L3
L4
Z
H
DETAIL A
1
3
INCHES
DIM MIN
MAX
0.086 0.094
A1
0.000 0.005
0.025 0.035
MILLIMETERS
MIN
2.18
0.00
0.63
0.76
4.57
0.46
0.46
5.97
6.35
MAX
2.38
0.13
0.89
1.14
5.46
0.61
0.61
6.22
6.73
A
b2
c
b
b
b2
0.030 0.045
b3
0.180 0.215
M
0.005 (0.13)
C
H
e
c
0.018 0.024
c2
0.018 0.024
GAUGE
SEATING
L2
PLANE
C
D
E
e
0.235 0.245
0.250 0.265
0.090 BSC
PLANE
2.29 BSC
9.40 10.41
1.40 1.78
2.74 REF
0.51 BSC
0.89 1.27
H
L
L1
L2
0.370 0.410
0.055 0.070
0.108 REF
L
A1
L1
0.020 BSC
DETAIL A
L3
0.035 0.050
ROTATED 9
0
5
CW
L4
Z
−−−
0.040
0.155
−−−
−−−
3.93
1.01
−−−
STYLE 2:
PIN 1.
GATE
2. DRAIN
SOLDERING FOOTPRINT*
3. SOURCE
4. DRAIN
6.20
0.244
3.00
0.118
2.58
0.102
5.80
0.228
1.60
0.063
6.17
0.243
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
6
NTD4965N
PACKAGE DIMENSIONS
3 IPAK, STRAIGHT LEAD
CASE 369AC
ISSUE O
NOTES:
1.. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2.. CONTROLLING DIMENSION: INCH.
3. SEATING
PLANE IS ON TOP OF
DAMBAR POSITION.
4. DIMENSION
A DOES NOT INCLUDE
DAMBAR POSITION OR MOLD GATE.
B
R
C
V
E
INCHES
DIM MIN
MAX
MILLIMETERS
MIN
5.97
6.35
2.19
0.69
0.46
0.94
MAX
6.22
6.73
2.38
0.88
0.58
1.09
A
B
C
D
E
F
G
H
J
K
R
V
W
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.043
0.090 BSC
0.034 0.040
0.018 0.023
0.134 0.142
0.180 0.215
0.035 0.050
A
K
SEATING PLANE
W
2.29 BSC
F
0.87
0.46
3.40
4.57
0.89
1.01
0.58
3.60
5.46
1.27
0.25
J
G
H
D
3 PL
0.000 0.010 0.000
0.13 (0.005)
W
IPAK
CASE 369D
ISSUE C
C
B
R
NOTES:
1. DIMENSIONING
AND TOLERANCING PER
ANSI Y14.5M, 1982.
V
E
2. CONTROLLING
DIMENSION: INCH.
INCHES
DIM MIN
MAX
MILLIMETERS
4
2
MIN
5.97
6.35
2.19
0.69
0.46
0.94
MAX
6.35
6.73
2.38
0.88
0.58
1.14
Z
A
B
C
D
E
F
G
H
J
K
R
S
V
Z
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
A
K
S
1
3
−
T
−
SEATING
PLANE
2.29 BSC
0.87
0.46
8.89
4.45
0.63
0.89
3.93
1.01
0.58
9.65
5.45
1.01
1.27
−−−
J
F
H
0.155
−−−
D
3 PL
STYLE 2:
PIN 1.
GATE
2. DRAIN
G
M
T
0.13 (0.005)
3. SOURCE
4. DRAIN
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