onsemi-NTD5867NLT4G
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NTD5867NL
N-Channel Power MOSFET
60
V
,
2
0 A, 39 m
W
Features
•
Low R
DS(on)
•
High Current Capability
•
100% Avalanche Tested
•
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
V
R
MAX
I MAX
D
(BR)DSS
DS(on)
Compliant
39 m
W
@ 10 V
50 m
W
@ 4.5 V
20 A
18 A
60 V
MAXIMUM RATINGS
(T =
25
°
C unless otherwise noted)
J
Parameter
Drain−to−Source Voltage
Symbol
Value
60
Unit
V
D
V
DSS
Gate−to−Source Voltage − Continuous
V
20
V
GS
GS
N−Channel
Gate−to−Source Voltage
V
30
V
− Non−Repetitive (t
< 10
m
s)
G
p
Continuous Drain
Current (R
T
= 25
°
C
= 100
°
C
= 25
°
C
I
20
13
36
A
C
D
)
S
q
JC
Steady
State
T
C
4
Power Dissipation
(R
T
C
P
W
D
)
q
JC
4
Pulsed Drain Current
t =
10
m
s
p
I
76
A
DM
Operating Junction and Storage
T
e
mperature
T , T
−
5
5 to
150
°
C
J
stg
1
2
1
2
3
3
Source Current (Body Diode)
I
S
20
18
A
DPAK
IPAK
Single Pulse Drain−to−Source Avalanche
E
AS
mJ
CASE 369AA
(Surface Mount)
STYLE 2
CASE 369D
(Straight Lead)
STYLE 2
Energy (V
= 50
V
, V
=
1
0
V
, R
=
2
5
W
,
DD
GS
G
I
= 19 A, L = 0.1 mH, T
= 25
°
C)
L(pk)
J
Lead
T
e
mperature for Soldering Purposes
(1/8
″
from case for 10 s)
T
260
°
C
L
MARKING DIAGRAMS
& PIN ASSIGNMENT
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
4
Drain
4
THERMAL RESISTANCE MAXIMUM RATINGS
Drain
Parameter
Symbol
Value
Unit
Junction−to−Case (Drain)
R
3.5
45
°
C/W
q
q
JC
R
JA
1. Surface−mounted
on FR4 board using 1 in sq pad size
(Cu area = 1.127 in sq [2 oz] including traces.
2
Drain
1
3
1
2
3
Gate Source
Gate Drain Source
A
= Assembly Location*
Y
=
Y
e
ar
WW
= Work Week
5867NL = Device Code
= Pb−Free Package
G
* The Assembly Location code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package, the front side assembly
code may be blank.
ORDERING INFORMATION
this data sheet.
©
Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
September, 2014 − Rev. 3
NTD5867NL/D
NTD5867NL
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
J
Parameter
OFF CHARACTERISTICS
Symbol
Test Condition
Min
Typ
Max
Unit
Drain−to−Source Breakdown Voltage
V
V
GS
= 0
V
, I
=
2
50
m
A
60
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
T
e
mperature Coefficient
V
/T
J
60
mV/
°
C
(BR)DSS
Zero Gate Voltage Drain Current
I
m
A
T =
25
°
C
1.0
100
100
DSS
J
V
V
= 0
V
,
= 60 V
GS
DS
T =
125
°
C
J
Gate−to−Source Leakage Current
Gate Threshold Voltage
I
V
V
= 0
V
, V
=
GS
20 V
nA
GSS
DS
V
= V
, I
= 250
m
A
1.5
1.8
5.2
26
2.5
V
GS(TH)
GS
DS
D
Negative Threshold
T
e
mperature Coefficient
Drain−to−Source On Resistance
V
/T
J
mV/
°
C
m
W
GS(TH)
R
V
= 10
V
, I
=
1
0 A
39
50
DS(on)
GS
D
V
= 4.5
V
, I
=
1
0 A
33
GS
D
Forward Transconductance
g
FS
V
DS
= 15
V
, I
=
1
0 A
8.0
S
D
CHARGES, CAPACITANCES AND GATE RESISTANCES
pF
Input Capacitance
C
675
68
iss
V
GS
= 0
V
, f =
1
.0 MHz,
Output Capacitance
C
oss
V
DS
= 25 V
Reverse Transfer Capacitance
T
o
tal Gate Charge
C
47
rss
nC
Q
Q
15
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
T
o
tal Gate Charge
Q
1.0
2.2
4.3
7.6
G(TH)
V
= 10
V
, V
=
4
8
V
,
DS
GS
I
D
= 20 A
Q
GS
Q
GD
V
GS
= 4.5
V
, V
=
4
8
V
,
nC
G(TOT)
DS
I
D
= 20 A
Gate Resistance
R
1.3
W
G
Turn−On Delay Time
ns
t
6.5
12.6
18.2
2.4
d(on)
Rise Time
t
r
V
I
= 10
V
, V
=
4
8
V
,
DD
GS
= 20 A, R
= 2.5
W
D
G
Turn−Off Delay Time
t
d(off)
Fall Time
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
V
T =
25
°
C
0.87
0.78
17
1.2
SD
J
V
= 0
V
,
= 10 A
GS
I
S
T =
100
°
C
J
ns
Reverse Recovery Time
Charge Time
t
RR
ta
13
V
GS
= 0
V
,
d
Is/dt = 100 A/
m
s,
I
S
= 20 A
Discharge Time
tb
4.0
12
Reverse Recovery Charge
Q
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Pulse
T
e
st: Pulse Width
≤
300
m
s, Duty Cycle
≤
2%.
3. Switching
characteristics are independent of operating junction temperatures.
2
NTD5867NL
TYPICAL PERFORMANCE CURVES
40
35
30
25
20
15
10
5
40
4.5 V
T =
25
°
C
10V
J
V
≥
10 V
DS
35
30
25
20
15
10
5
4 V
3.8 V
3.6 V
3.4 V
T =
125
°
C
J
3.2 V
3.0 V
T =
25
°
C
J
T =
−55
°
C
2.8 V
J
0
0
0
1
2
3
4
5
2
3
4
5
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.040
0.035
0.030
0.025
0.020
0.060
0.050
0.040
0.030
0.020
T =
25
°
C
J
I
= 20 A
D
T =
25
°
C
J
V
= 4.5 V
= 10 V
GS
V
GS
3
4
5
6
7
8
9
10
5
10
15
20
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
I ,
DRAIN CURRENT (AMPS)
D
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
10000
1000
V
GS
= 0 V
I
V
= 20 A
D
= 10 V
GS
T =
150
°
C
J
100
10
T =
125
°
C
J
−50
−25
0
25
50
75
100
125
150
10
20
30
40
50
60
T , JUNCTION TEMPERATURE (
°
C)
J
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Drain Voltage
3
NTD5867NL
TYPICAL PERFORMANCE CURVES
1000
900
800
700
600
500
400
300
200
100
0
10
Q
V
= 0 V
T
GS
T =
25
°
C
J
8
6
4
2
0
C
iss
V
GS
Q
Q
gs
gd
V
DS
= 48 V
C
oss
I
D
= 20 A
T =
25
°
C
J
C
rss
0
10
20
30
40
50
60
0
5
10
15
DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Q ,
TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate−To−Source Voltage vs.
Total Charge
1000
20
V
= 48 V
= 20 A
= 10 V
DD
V
= 0 V
GS
I
D
T =
25
°
C
J
V
GS
15
10
5
100
10
1
t
f
t
t
d(off)
t
r
d(on)
0
1
10
100
0.5
0.6
0.7
0.8
0.9
1.0
R ,
GATE RESISTANCE (OHMS)
G
V
SD
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
100
10
1
20
I
= 20 A
D
10
m
s
15
10
100
m
s
1 ms
10 ms
V
= 10 V
GS
SINGLE PULSE
= 25
°
C
T
C
dc
5
0
R
LIMIT
DS(on)
THERMAL LIMIT
PACKAGE LIMIT
0.1
1
10
100
25
50
75
100
125
150
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
T , JUNCTION TEMPERATURE (
°
C)
J
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
4
NTD5867NL
TYPICAL PERFORMANCE CURVES
10
1.0
D = 0.5
0.2
P
(pk)
R
(t) = r(t) R
q
JC
0.1
0.05
0.02
q
JC
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
0.1
t
1
1
t
0.01
SINGLE PULSE
0.00001
2
T
J(pk)
− T
= P
R
q
(t)
JC
C
(pk)
DUTY CYCLE, D = t
/t
1
2
0.01
0.000001
0.0001
t, TIME (s)
0.001
0.01
0.1
Figure 13. Thermal Response
ORDERING INFORMATION
Order Number
†
Package
Shipping
NTD5867NL−1G
IPAK (Straight Lead)
(Pb−Free)
75 Units / Rail
2500 /
T
a
pe & Reel
NTD5867NLT4G
DPAK
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
5
NTD5867NL
PACKAGE DIMENSIONS
DPAK (SINGLE GUAGE)
CASE 369AA
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BOD
Y
.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
C
A
D
A
E
c2
b3
B
4
2
L3
L4
Z
H
DETAIL A
1
3
INCHES
DIM MIN
MAX
0.086 0.094
A1
0.000 0.005
0.025 0.035
MILLIMETERS
MIN
2.18
0.00
0.63
0.76
4.57
0.46
0.46
5.97
6.35
MAX
2.38
0.13
0.89
1.14
5.46
0.61
0.61
6.22
6.73
A
b2
c
b
b
b2
0.030 0.045
b3
0.180 0.215
M
0.005 (0.13)
C
H
e
c
0.018 0.024
c2
0.018 0.024
GAUGE
SEATING
PLANE
L2
PLANE
C
D
E
e
0.235 0.245
0.250 0.265
0.090 BSC
2.29 BSC
9.40 10.41
1.40 1.78
2.74 REF
0.51 BSC
0.89 1.27
H
L
L1
L2
0.370 0.410
0.055 0.070
0.108 REF
L
A1
L1
0.020 BSC
DETAIL A
ROTATED 9
0
5
CW
L3
0.035 0.050
L4
Z
−−− 0.040
0.155 −−−
−−−
3.93
1.01
−−−
SOLDERING FOOTPRINT*
STYLE 2:
PIN 1.
GATE
2. DRAIN
3. SOURCE
4. DRAIN
6.20
0.244
3.0
0.118
2.58
0.101
5.80
0.228
1.6
0.063
6.172
0.243
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
6
NTD5867NL
PACKAGE DIMENSIONS
IPAK (STRAIGHT LEAD DPAK)
CASE 369D
ISSUE C
C
B
R
NOTES:
1. DIMENSIONING
AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING
DIMENSION: INCH.
V
S
E
INCHES
DIM MIN
MAX
MILLIMETERS
4
2
MIN
5.97
6.35
2.19
0.69
0.46
0.94
MAX
6.35
6.73
2.38
0.88
0.58
1.14
Z
A
B
C
D
E
F
G
H
J
K
R
S
V
Z
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
A
K
1
3
−T−
SEATING
PLANE
2.29 BSC
0.87
0.46
8.89
4.45
0.63
0.89
3.93
1.01
0.58
9.65
5.45
1.01
1.27
−−−
J
F
H
0.155
−−−
D
3 PL
STYLE 2:
PIN 1.
GATE
G
M
T
0.13 (0.005)
2. DRAIN
3. SOURCE
4. DRAIN
ON Semiconductor and the
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at
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. SCILLC
reserves the right to make changes without further notice to any products herein.
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or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time.
All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts.
SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended,
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the failure of the SCILLC product could create a situation where personal injury or death may occur.
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expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
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NTD5867NL/D
