onsemi-NTD5C434NT4G

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onsemi-NTD5C434NT4G
NTD5C434N  

MOSFET

– Powe
r
,
S
ingle,  
N-Channel  
40
V
,
2
.1 m
W
, 160 A  
Features  
•
Low R  
to Minimize Conduction Losses  
DS(on)  
•
Low Q
 
and Capacitance to Minimize Driver Losses  
G
•
These Devices are Pb
−
Free, Halogen Free/BFR Free and are RoHS  
V
R
I
D
(BR)DSS  
DS(on)  
Compliant  
40 V  
2.1 m
W
@ 10 V  
160 A  
MAXIMUM RATINGS
(T =
 
25
°
C unless otherwise noted)  
J
Parameter  
Drain
−
to
−
Source Voltage  
Symbol  
Value  
40  
Unit  
V
D
V
DSS  
Gate
−
to
−
Source Voltage  
V
“
20  
160  
120  
120  
59  
V
GS  
Continuous Drain Cur-  
T
= 25
°
C  
= 100
°
C  
= 25
°
C  
I
A
C
D
rent R  
G
q
JC  
T
C
Steady  
State  
Power Dissipation R  
T
C
P
W
A
q
D
JC  
JA  
S
T
C
= 100
°
C  
N
−
CHANNEL MOSFET  
Continuous Drain  
T =
 
25
°
C  
A
I
33  
D
Current R  
q
4
JA  
T =
 
100
°
C  
A
23  
Steady  
State  
Power Dissipation R  
T =
 
25
°
C  
A
P
4.7  
W
q
D
2
1
3
T =
 
100
°
C  
A
2.4  
Pulsed Drain Current  
T =
 
25
°
C, t
 
= 10
m
s  
I
DM  
900  
A
DPAK  
A
p
CASE 369C  
STYLE 2  
Operating Junction and Storage
T
e
mperature  
T , T  
−
55 to  
175  
°
C  
J
stg  
Source Current (Body Diode)  
I
130  
420  
A
S
MARKING DIAGRAM  
& PIN ASSIGNMENT  
Single Pulse Drain
−
to
−
Source Avalanche  
E
AS  
mJ  
Energy (I  
= 25 A)  
L(pk)  
4
Lead
T
e
mperature for Soldering Purposes  
(1/8
″
from case for 10 s)  
T
L
260  
°
C  
Drain  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
THERMAL RESISTANCE MAXIMUM RATINGS  
2
Parameter  
Symbol  
Value  
1.3  
Unit  
Drain  
1
3
Gate Source  
Junction
−
to
−

Junction
−
to
−
Ambient
−

R
°
C/W  
q
JC  
A
Y
WW  
= Assembly Location  
=
Y
e
ar  
= Work Week  
R
32  
q
JA  
1. The
 
entire application environment impacts the thermal resistance values shown,  
they are not constants and are only valid for the particular conditions noted.  
5C434N= Device Code  
2
2. Surface
−
mounted on FR4 board using a 650 mm
 
, 2 oz. Cu pad.  
G
= Pb
−
Free Package  
3. Maximum
 
current for pulses as long as 1 second is higher but is dependent  
on pulse duration and duty cycle.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
©
Semiconductor Components Industries, LLC, 2015  
1
Publication Order Number:  
May, 2019
−
Rev. 0  
NTD5C434N/D  
 

NTD5C434N  
ELECTRICAL CHARACTERISTICS
(T =
 
25
°
C unless otherwise noted)  
J
Parameter  
OFF CHARACTERISTICS  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
Drain
−
to
−
Source Breakdown Voltage  
V
V
GS  
= 0
V
, I
 
=
2
50
m
A  
40  
V
(BR)DSS  
D
Drain
−
to
−
Source Breakdown Voltage  
T
e
mperature Coefficient  
V
/T  
J
18  
mV/
°
C  
(BR)DSS  
Zero Gate Voltage Drain Current  
I
m
A  
T =
 
25
°
C  
10  
DSS  
J
V
= 0
V
,  
GS  
DS  
V
= 40 V  
T =
 
125
°
C  
J
250  
100  
Gate
−
to
−
Source Leakage Current  
ON CHARACTERISTICS

Gate Threshold Voltage  
I
V
= 0
V
, V
 
=
2
0 V  
nA  
GSS  
DS  
GS  
V
V
= V
 
, I
 
= 250
m
A  
2.0  
4.0  
2.1  
V
mV/
°
C  
m
W  
S
GS(TH)  
GS  
DS  
D
Negative Threshold
T
e
mperature Coefficient  
Drain
−
to
−
Source On Resistance  
Forward Transconductance  
V
/T  
J
7.9  
1.7  
155  
GS(TH)  
R
V
= 10
V
, I
 
=
5
0 A  
DS(on)  
GS D  
g
V
= 3
V
, I
 
=
5
0 A  
FS  
DS D  
CHARGES, CAPACITANCES AND GATE RESISTANCES  
pF  
nC  
Input Capacitance  
C
5400  
3000  
71  
iss  
V
= 0
V
, f =
1
.0 MHz,  
DS  
GS  
Output Capacitance  
C
oss  
V
= 25 V  
Reverse Transfer Capacitance  
T
o
tal Gate Charge  
C
rss  
Q
80.6  
15.2  
25.2  
15.4  
4.8  
G(TOT)  
Threshold Gate Charge  
Gate
−
to
−
Source Charge  
Gate
−
to
−
Drain Charge  
Plateau Voltage  
Q
G(TH)  
V
GS  
= 10
V
, V
 
=
2
0
V
,  
DS  
Q
GS  
GD  
GP  
I
D
= 50 A  
Q
V
V
SWITCHING CHARACTERISTICS

Turn
−
On Delay Time  
ns  
t
15  
78  
43  
14  
d(on)  
Rise Time  
t
r
V
= 10
V
, V
 
=
2
0
V
,  
GS  
D
DS  
I
= 50 A, R
 
= 2.5
W  
G
Turn
−
Off Delay Time  
t
d(off)  
Fall Time  
t
f
DRAIN
−
SOURCE DIODE CHARACTERISTICS  
Forward Diode Voltage  
V
V
T =
 
25
°
C  
0.8  
0.7  
73  
1.2  
SD  
J
V
S
= 0
V
,  
GS  
I
= 50 A  
T =
 
125
°
C  
J
ns  
Reverse Recovery Time  
Charge Time  
t
RR  
ta  
36  
V
GS  
= 0
V
,
d
Is/dt = 100 A/
m
s,  
I
S
= 50 A  
Discharge Time  
tb  
37  
Reverse Recovery Charge  
Q
120  
nC  
RR  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
4. Pulse
 
T
e
st: Pulse Width
≤
300
m
s, Duty Cycle
≤
2%.  
5. Switching
 
characteristics are independent of operating junction temperatures.  
2
 

NTD5C434N  
TYPICAL CHARACTERISTICS  
400  
350  
300  
250  
200  
150  
400  
V
= 8 V  
6.0 V  
GS  
V
DS  
= 3 V  
to 10 V  
350  
300  
250  
200  
150  
100  
5.4 V  
5.2 V  
5.0 V  
4.8 V  
T =
 
25
°
C  
J
100  
50  
0
.
4.6 V  
4.4 V  
50  
0
T =
 
125
°
C  
J
T =
 
−
55
°
C  
J
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
0
1
2
3
4
5
6
7
V
DS  
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)  
V
GS  
, GATE
−
TO
−
SOURCE VOLTAGE (V)  
Figure 1. On
−
Region Characteristics  
Figure 2. Transfer Characteristics  
12  
10  
8
2.0  
1.8  
1.6  
1.4  
T =
 
25
°
C  
J
T =
 
25
°
C  
D
J
I
= 50 A  
V
GS  
= 10 V  
6
4
1.2  
1.0  
2
0
3
4
5
6
7
8
9
10  
0
20  
40  
60  
80  
100  
120  
140  
V
GS  
, GATE
−
TO
−
SOURCE VOLTAGE (V)  
I ,
 
DRAIN CURRENT (A)  
D
Figure 3. On
−
Resistance vs. Gate
−
to
−
Source  
Figure 4. On
−
Resistance vs. Drain Current and  
Voltage  
Gate Voltage  
100000  
10000  
1000  
100  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
T =
 
150
°
C  
J
V
= 10 V  
= 50 A  
GS  
I
D
T =
 
125
°
C  
J
T =
 
85
°
C  
J
T =
 
25
°
C  
J
10  
1
0.8  
0.6  
0.1  
0.01  
5
10  
15  
20  
25  
30  
35  
40  
−
50
−
25  
0
25  
50  
75 100
 
125 150  
175  
T , JUNCTION TEMPERATURE (
°
C)  
J
V
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)  
DS  
Figure 5. On
−
Resistance Variation with  
Figure 6. Drain
−
to
−
Source Leakage Current  
Temperature  
vs. Voltage  
3

NTD5C434N  
TYPICAL CHARACTERISTICS  
10  
10000  
1000  
C
ISS  
9
8
7
6
5
4
3
2
C
OSS  
Q
Q
GD  
GS  
100  
10  
C
V
DS  
= 20 V  
RSS  
V
= 0 V  
GS  
T =
 
25
°
C  
J
T =
 
25
°
C  
J
1
0
I
D
= 50 A  
f = 1 MHz  
0
5
10  
15  
20  
25  
30  
35  
40  
0
10  
20  
30  
40  
50  
60  
70  
80  
V
DS  
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)  
Q ,
 
TOTAL GATE CHARGE (nC)  
G
Figure 7. Capacitance Variation  
Figure 8. Gate
−
to
−
Source vs. Total Charge  
1000  
100  
100  
V
V
= 10 V  
= 20 V  
= 50 A  
V
= 0 V  
GS  
GS  
DS  
I
D
t
t
r
d(off)  
d(on)  
10  
t
t
10  
1
f
T =
 
125
°
C  
T =
 
25
°
C T
 
=
−
55
°
C  
J
J
J
1
1
10  
R ,
 
GATE RESISTANCE (
W
)  
100  
0.3  
0.4  
0.5  
0.6  
0.7  
0.8  
0.9  
1.0  
V
SD  
, SOURCE
−
TO
−
DRAIN VOLTAGE (V)  
G
Figure 9. Resistive Switching Time Variation  
vs. Gate Resistance  
Figure 10. Diode Forward Voltage vs. Current  
100  
1000  
T
V
= 25
°
C  
C
≤
10 V  
GS  
Single Pulse  
T (initial)
 
= 25
°
C  
J
100  
10  
T (initial)
 
= 100
°
C  
J
10  
10
m
s  
0.5 ms  
1 ms  
1
R
Limit  
DS(on)  
10 ms  
Thermal Limit  
Package Limit  
1
0.1  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
V
DS  
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)  
TIME IN AVALANCHE (s)  
Figure 11. Maximum Rated Forward Biased  
Safe Operating Area  
Figure 12. I

PEAK

vs. Time in Avalanche  
4

NTD5C434N  
TYPICAL CHARACTERISTICS  
10  
1
50% Duty Cycle  
20%  
10%  
5%  
0.1  
2%  
1%  
0.01  
Single Pulse  
0.001  
0.000001 0.00001
 
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
10000  
PULSE TIME (sec)  
Figure 13. Thermal Characteristics  
ORDERING INFORMATION  
Order Number  
†
Package  
Shipping  
NTD5C434NT4G  
DPAK  
(Pb
−
Free)  
2500 /
T
a
pe & Reel  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging  
Specifications Brochure, BRD8011/D.  
5

MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
4
DPAK (SINGLE GAUGE)  
CASE 369C  
ISSUE G  
2
1
DATE 31 MAY 2023  
3
SCALE 1:1  
GENERIC  
MARKING DIAGRAM*  
XXXXXXG  
ALYWW  
AYWW  
XXX  
XXXXXG  
IC  
Discrete  
XXXXXX =
 
Device Code  
A
= Assembly Location  
L
= Wafer Lot  
STYLE 1:  
STYLE 2:  
PIN 1.
 
GATE  
2. DRAIN  
STYLE 3:  
STYLE 4:  
STYLE 5:  
Y
WW  
G
=
Y
e
ar  
= Work Week  
= Pb
−
Free Package  
PIN 1.
 
BASE  
PIN 1.
 
ANODE  
2. CATHODE  
3. ANODE  
PIN 1.
 
CATHODE  
2. ANODE  
3. GATE  
PIN 1.
 
GATE  
2. ANODE  
3. CATHODE  
4. ANODE  
2. COLLECTOR  
3. EMITTER  
3. SOURCE  
4. DRAIN  
4. COLLECTOR  
4. CATHODE  
4. ANODE  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
Pb
−
Free indicator, “G” or microdot “
G
”, may  
or may not be present. Some products may  
not follow the Generic Marking.  
STYLE 6:  
PIN 1.
 
MT1  
2. MT2  
STYLE 7:  
PIN 1.
 
GATE  
STYLE 8:  
PIN 1.
 
N/C  
STYLE 9:  
PIN 1.
 
ANODE  
2. CATHODE  
STYLE 10:  
PIN 1.
 
CATHODE  
2. ANODE  
2. COLLECTOR  
2. CATHODE  
3. GATE  
4. MT2  
3. EMITTER  
4. COLLECTOR  
3. ANODE  
4. CATHODE  
3. RESISTOR
 
ADJUST  
4. CATHODE  
3. CATHODE  
4. ANODE  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions
 
are uncontrolled
 
except when stamped
 
“CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON10527D  
DPAK (SINGLE GAUGE)  
PAGE 1 OF 1  
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and  
are trademarks of Semiconductor Components Industries, LLC dba
onsemi
or its subsidiaries in the United States and/or other countries.
onsemi
reserves  
the right to make changes without further notice to any products herein.
onsemi
makes no warranty, representation or guarantee regarding the suitability of its products for any particular  
purpose, nor does
onsemi
assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation  
special, consequential or incidental damages.
onsemi
does not convey any license under its patent rights nor the rights of others.  
©
Semiconductor Components Industries, LLC, 2018  

onsemi
,  
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “
onsemi
” or its affiliates  
and/or subsidiaries in the United States and/or other countries.
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’s product/patent coverage may be accessed at

.
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reserves the right to make changes at any time to any  
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−
is” and
onsemi
makes no warranty, representation or guarantee regarding the accuracy of the  
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does
onsemi
assume any liability arising out of the application or use  
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and applications using
onsemi
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provided by
onsemi
. “Typical” parameters which may be provided in
onsemi
data sheets and/or specifications can and do vary in different applications and actual performance may  
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
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