onsemi-NTGS3136PT1G
| Part # | onsemi-NTGS3136PT1G |
| Download | onsemi-NTGS3136PT1G |
NTGS3136P, NVGS3136P
P-Channel, TSOP-6
-20
V
,
–
5.8 A
Features
•
Low R
•
1.8 V Gate Rating
•
Fast Switching
•
NV Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC
−
Q101 Qualified and
PPAP Capable
in TSOP
−
6 Package
DS(on)
V
R
TYP
I MAX
D
(BR)DSS
DS(ON)
25 m
W
@
−
4.5 V
32 m
W
@
−
2.5 V
41 m
W
@
−
1.8 V
−
5.1 A
−
4.5 A
−
2.5 A
−
20 V
•
These Devices are Pb
−
Free, Halogen Free/BFR Free and are RoHS
P
−
Channel
Compliant
1 2 5 6
Applications
•
Optimized for Battery and Load Management Applications in
Portable Equipment
3
•
High Side Load Switch
•
Switching Circuits for Game Consoles, Camera Phone, etc.
4
MAXIMUM RATINGS
(T =
25
°
C unless otherwise stated)
J
MARKING
DIAGRAM
Parameter
Drain
−
to
−
Source Voltage
Symbol Value
Unit
V
V
−
20
$
8.0
−
5.1
−
3.6
−
5.8
1.25
DSS
Gate
−
to
−
Source Voltage
V
V
GS
TSOP
−
6
CASE 318G
STYLE 1
XXX M
G
Continuous Drain
T =
25
°
C
I
D
A
Steady
State
G
1
T =
85
°
C
A
A
1
t
v
5 s
T =
25
°
C
Steady
State
A
XXX
M
G
= Device Code
= Date Code
Power Dissipation
P
D
= Pb
−
Free Package
T =
25
°
C
A
W
(Note: Microdot may be in either location)
t
v
5 s
1.6
−
3.7
−
2.7
0.7
Continuous Drain
T =
25
°
C
A
I
D
A
PIN ASSIGNMENT
T =
85
°
C
A
Steady
State
Drain Drai
n
S
ource
Power Dissipation
P
D
W
T =
25
°
C
A
6
5
4
Pulsed Drain Current
t =
10
m
s
p
I
−
20
A
DM
Operating Junction and Storage
T
e
mperature
T ,
STG
−
55 to
150
°
C
J
T
1
2
3
Lead
T
e
mperature for Soldering Purposes
(1/8” from case for 10 s)
T
L
260
°
C
Drain Drain
Gate
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Surface
−
mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq
[2 oz] including traces)
2. Surface
−
mounted on FR4 board using the minimum recommended pad size
(Cu area = 0.0775 in sq).
ORDERING INFORMATION
See detailed ordering and shipping information in the package
©
Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
May, 2019
−
Rev. 2
NTGS3136P/D
NTGS3136
P
,
N
VGS3136P
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
100
77
Unit
R
q
JA
R
°
C/W
q
JA
R
185
q
JA
3. Surface
−
mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces)
4. Surface
−
mounted on FR4 board using the minimum recommended pad size (Cu area = 0.0775 in sq).
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise specified)
J
Parameter
OFF CHARACTERISTICS
Symbol
Test Condition
Min
Typ
Max
Unit
Drain
−
to
−
Source Breakdown Voltage
V
V
GS
= 0
V
, I
=
−
250
m
A
−
20
V
(BR)DSS
D
Drain
−
to
−
Source Breakdown Voltage
T
e
mperature Coefficient
V
/T
J
−
13
mV/
°
C
(BR)DSS
ID =
−
250
m
A, Reference 25
°
C
T =
25
°
C
−
1.0
−
5.0
Zero Gate Voltage Drain Current
I
m
A
m
A
J
DSS
V
DS
= 0
V
,
GS
V
=
−
20 V
T =
85
°
C
J
Gate
−
to
−
Source Leakage Current
Gate Threshold Voltage
I
V
= 0
V
, V
=
GS
8.0 V
$
0.1
GSS
DS
V
V
V
= V
, I
=
−
250
m
A
−
0.4
−
1.0
V
GS(TH)
GS
DS
D
Negative Threshold
T
e
mperature Coefficient
Drain
−
to
−
Source On Resistance
V
/T
J
3
mV/
°
C
m
W
GS(TH)
=
−
4.5
V
, I
=
−
5.1 A
25
32
41
22
33
40
51
R
GS
GS
GS
DS
D
DS(on)
V
V
V
=
−
2.5
V
, I
=
−
4.5 A
D
=
−
1.8
V
, I
=
−
2.5 A
D
Forward Transconductance
g
=
−
5.0
V
, I
=
−
5.1 A
S
FS
D
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
C
1901
274
175
18
pF
ISS
Output Capacitance
C
OSS
C
RSS
V
GS
= 0
V
, f = 1
M
Hz, V
=
−
10 V
DS
Reverse Transfer Capacitance
T
o
tal Gate Charge
Q
29
nC
G(TOT)
Threshold Gate Charge
Gate
−
to
−
Source Charge
Gate
−
to
−
Drain Charge
Gate Resistance
Q
0.7
2.4
4.3
7.6
G(TH)
V
GS
=
−
4.5
V
, V
=
−
10 V;
DS
I
=
−
5.1 A
D
Q
GS
Q
GD
R
W
G
Turn
−
On Delay Time
t
9
9
19
19
ns
d(ON)
Rise Time
T
r
V
V
=
−
4.5
V
, V
=
−
10
V
,
DD
GS
D
I
=
−
1.0 A, R
= 6.0
W
G
Turn
−
Off Delay Time
t
99
48
160
79
d(OFF)
Fall Time
T
f
DRAIN
−
SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
T =
25
°
C
−
0.7
−
0.6
37
−
1.2
V
SD
= 0
V
,
GS
=
−
1.7 A
V
J
I
S
T =
125
°
C
J
Reverse Recovery Time
t
V
GS
= 0
V
, d
/
d =
100 A/
m
s,
60
ns
RR
IS
t
I
S
=
−
1.7 A
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Pulse
T
e
st: pulse width
v
300
m
s, duty cycle
v
2%
6. Switching
characteristics are independent of operating junction temperatures
2
NTGS3136
P
,
N
VGS3136P
TYPICAL PERFORMANCE CURVES
(T =
25
°
C unless otherwise noted)
J
20
16
12
8.0
4.0
0
20
V
=
−
4.5 V
T =
25
°
C
J
GS
V
=
−
5 V
DS
−
1.8 V
−
2 V
15
10
5
−
2.5 V
−
1.5 V
T =
25
°
C
J
T =
−
55
°
C
J
T =
125
°
C
J
0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
0.5
0.75
1
1.25 1.5
1.75
2
2.25 2.5
−
V ,
DRAIN
−
TO
−
SOURCE VOLTAGE (V)
DS
−
V ,
GATE
−
TO
−
SOURCE VOLTAGE (V)
GS
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
0.10
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
T =
25
°
C
J
I
=
−
5.1 A
D
−
1.8 V
−
2 V
T =
125
°
C
J
−
2.5 V
V
=
−
4.5 V
GS
T =
25
°
C
J
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0
4.0
8.0
12
16
20
−
V ,
GATE
−
TO
−
SOURCE VOLTAGE (V)
GS
−
I DRAIN
CURRENT (A)
D,
Figure 3. On
−
Resistance vs. Gate
−
to
−
Source
Figure 4. On
−
Resistance vs. Drain Current and
Voltage
Gate Voltage
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
2800
2600
2400
2200
2000
1800
1600
1400
1200
1000
800
V
= 0 V
GS
I
V
=
−
4.5 A
D
T =
25
°
C
J
=
−
5.1 V
GS
C
f = 1 MHz
iss
C
oss
600
400
200
0
C
rss
−
50
−
25
0
25
50
75
100
125
150
0
2
4
6
8
10
12
T , JUNCTION TEMPERATURE (
°
C)
J
DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Figure 5. On
−
Resistance Variation with
Figure 6. Capacitance Variation
Temperature
3
NTGS3136
P
,
N
VGS3136P
TYPICAL PERFORMANCE CURVES
(T =
25
°
C unless otherwise noted)
J
30
10
5
4
3
2
1
0
12
10
8
Q
V
GS
= 0 V
T
−
V
DS
−
V
GS
T =
150
°
C
J
6
Q
Q
GS
GD
4
T =
25
°
C
J
V
=
−
10 V
DS
2
I
D
=
−
5.1 A
T =
25
°
C
J
0
18
1.0
0
2
4
6
8
10
12
14
16
0
0.2
0.4
0.6
0.8
1.0
1.2
−
V ,
SOURCE
−
TO
−
DRAIN VOLTAGE (V)
SD
Q ,
TOTAL GATE CHARGE (nC)
G
Figure 7. Gate
−
to
−
Source and
Figure 8. Diode Forward Voltage vs. Current
Drain
−
to
−
Source Voltage vs. Total Charge
0.8
0.7
0.6
0.5
0.4
80
70
60
50
40
30
20
10
0
I
=
−
250
m
A
D
0.3
0.2
−
50
−
25
0
25
50
75
100
125 150
1E
−
3 1E
−
2
1E
−
1
1
1E+1
1E+2 1E+3
T , JUNCTION TEMPERATURE (
°
C)
J
SINGLE PULSE TIME (s)
Figure 9. Threshold Voltage
Figure 10. Single Pulse Maximum Power
Dissipation
1
100
100
m
s
Duty Cycle =
0.5
10
1
1 ms
0.2
0.1
0.1
10 ms
V
GS
=
−
8.0 V
SINGLE PULSE
0.05
T
C
= 25
°
C
0.1
0.01
dc
R
LIMIT
DS(on)
0.01
0.02
0.01
1E
−
04 1E
−
03 1E
−
02 1E
−
01
t, TIME (s)
Thermal Limit
Package Limit
0.1
1
10
100
1
1E+01 1E+02 1E+03
−
V ,
DRAIN
−
TO
−
SOURCE VOLTAGE (V)
DS
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. FET Thermal Response
4
NTGS3136
P
,
N
VGS3136P
ORDERING INFORMATION
Device
†
Marking
SD
Package
Shipping
NTGS3136PT1G
NVGS3136PT1G*
TSOP
−
6
(Pb
−
Free)
3000 /
T
a
pe & Reel
VSD
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
*NV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC
−
Q101 Qualified and PPAP
Capable.
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSOP
−
6
CASE 318G
−
02
ISSUE V
1
DATE 12 JUN 2012
SCALE 2:1
NOTES:
D
1. DIMENSIONING
AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING
DIMENSION: MILLIMETERS.
H
3. MAXIMUM
LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM
LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS
D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR
GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D
AND E1 ARE DETERMINED AT DATUM H.
6
1
5
4
L2
GAUGE
PLANE
E1
E
5. PIN
ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.
2
3
L
MILLIMETERS
SEATING
C
M
NOTE 5
DIM
A
A1
b
c
D
E
E1
e
MIN
0.90
0.01
0.25
0.10
2.90
2.50
1.30
0.85
0.20
NOM
1.00
MAX
1.10
0.10
0.50
0.26
3.10
3.00
1.70
1.05
0.60
PLANE
b
DETAIL Z
e
0.06
0.38
0.18
3.00
c
2.75
A
0.05
1.50
0.95
L
0.40
A1
L2
M
0.25 BSC
−
DETAIL Z
0
°
1
0
°
STYLE 1:
STYLE 2:
PIN 1.
EMITTER 2
2. BASE
1
STYLE 3:
PIN 1.
ENABLE
2. N/C
STYLE 4:
PIN 1.
N/C
2. V
in
STYLE 5:
PIN 1.
EMITTER 2
2. BASE
2
STYLE 6:
PIN 1.
DRAIN
2. DRAIN
PIN 1.
COLLECTOR
2. COLLECTOR
3. BASE
3. GATE
3. COLLECTOR
1
4. EMITTER
1
5. BASE
2
3. R
BOOST
4. Vz
5. V
in
6. V
out
3. NOT
USED
4. GROUND
5. ENABLE
6. LOAD
3. COLLECTOR
1
4. EMITTER
1
5. BASE
1
4. SOURCE
5. DRAIN
6. DRAIN
4. EMITTER
5. COLLECTOR
6. COLLECTOR
6. COLLECTOR
2
6. COLLECTOR
2
STYLE 7:
STYLE 8:
PIN 1.
Vbus
2. D(in)
STYLE 9:
STYLE 10:
PIN 1.
D(OUT)+
2. GND
STYLE 11:
STYLE 12:
PIN 1.
I/O
2. GROUND
3. I/O
PIN 1.
COLLECTOR
2. COLLECTOR
3. BASE
PIN 1.
LOW VOLTAGE GATE
2. DRAIN
PIN 1.
SOURCE 1
2. DRAIN
2
3. D(in)+
4. D(out)+
5. D(out)
6. GND
3. SOURCE
3. D(OUT)
−
4. D(IN)
−
5. VBUS
6. D(IN)+
3. DRAIN
2
4. N/C
5. COLLECTOR
6. EMITTER
4. DRAIN
4. SOURCE
2
5. GATE
1
4. I/O
5. DRAIN
5. VCC
6. I/O
6. HIGH
VOLTAGE GATE
6. DRAIN
1/GATE 2
STYLE 13:
STYLE 14:
PIN 1.
ANODE
2. SOURCE
3. GATE
STYLE 15:
PIN 1.
ANODE
2. SOURCE
3. GATE
STYLE 16:
STYLE 17:
PIN 1.
EMITTER
2. BASE
PIN 1.
GATE 1
2. SOURCE
2
3. GATE
2
PIN 1.
ANODE/CATHODE
2. BASE
3. EMITTER
3. ANODE/CATHODE
4. ANODE
5. CATHODE
6. COLLECTOR
4. DRAIN
2
5. SOURCE
1
6. DRAIN
1
4. CATHODE/DRAIN
4. DRAIN
4. COLLECTOR
5. ANODE
5. CATHODE/DRAIN
6. CATHODE/DRAIN
5. N/C
6. CATHODE
6. CATHODE
GENERIC
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.60
XXXAYW
G
XXX M
G
G
G
1
1
6X
0.95
3.20
IC
STANDARD
XXX =
Specific Device Code
XXX =
Specific Device Code
A
Y
W
G
=Assembly Location
=
Y
e
ar
= Work Week
M
G
= Date Code
= Pb
−
Free Package
0.95
PITCH
= Pb
−
Free Package
DIMENSIONS: MILLIMETERS
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
*This information is generic. Please refer to device data sheet
for actual part marking. Pb
−
Free indicator, “G” or microdot “
G
”, may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB14888C
TSOP
−
6
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMEN
T
:
TECHNICAL SUPPORT
North American Technical Support:
Voice Mail: 1 800
−
282
−
9855
T
o
ll Free USA/Canada
Phone: 011 421 33 790 2910
Europe, Middle East and Africa Technical Support:
Phone: 00421 33 790 2910
For additional information, please contact your local Sales Representative
◊
