onsemi-NTJD4105CT1G
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NTJD4105C
MOSFET
– Small Signal,
Complementar
y
,
S
C-88
20 V / -8.0
V
,
+
0.63 A / -0.775 A
Features
•
Complementary N and P Channel Device
•
Leading
−
8.0 V Trench for Low R
Performance
DS(on)
•
ESD Protected Gate
−
ESD Rating: Class 1
•
SC
−
88 Package for Small Footprint (2 x 2 mm)
•
Pb
−
Free Packages are Available
V
R
TYP
I Max
D
(BR)DSS
DS(on)
0.29
W
@ 4.5 V
0.36
W
@ 2.5 V
N
−
Ch 20 V
0.63 A
Applications
0.22
W
@
−
4.5 V
0.32
W
@
−
2.5 V
•
DC
−
DC Conversion
•
Load/Power Switching
•
Single or Dual Cell Li
−
Ion Battery Supplied Devices
•
Cell Phones, MP3s, Digital Cameras, PDAs
P
−
Ch
−
8.0 V
−
0.775 A
0.51
W
@
−
1.8 V
MAXIMUM RATINGS
(T =
25
°
C unless otherwise noted)
J
SOT
−
363
SC
−
88 (6
−
LEADS)
Parameter
Drain
−
to
−
Source Voltage
Symbol Value
Unit
N
−
Ch
P
−
Ch
N
−
Ch
P
−
Ch
V
20
−
8.0
12
V
DSS
S
G
D
1
6
5
4
D
1
1
1
2
Gate
−
to
−
Source Voltage
V
V
A
GS
8.0
Continuous Drain Current
N
−
Ch T
= 25
°
C
I
0.63
0.46
−
0.775
−
0.558
0.91
0.65
−
1.1
−
0.8
1.2
A
D
2
3
G
2
−
Steady State
T =
85
°
C
A
(Based on R
)
q
JA
P
−
Ch T
= 25
°
C
A
T =
85
°
C
A
S
2
Continuous Drain Current
N
−
Ch T
= 25
°
C
A
−
Steady State
T =
85
°
C
A
(Based on R
)
q
JL
T
o
p View
P
−
Ch T
= 25
°
C
A
T =
85
°
C
A
Pulsed Drain Current
tp
≤
10
m
s
I
A
DM
MARKING DIAGRAM &
PIN ASSIGNMENT
D1 G2 S2
Power Dissipation
−
Steady State
T =
25
°
C
P
D
0.27
0.14
0.55
0.29
W
A
(Based on R
)
q
JA
T =
85
°
C
A
Power Dissipation
−
Steady State
T =
25
°
C
A
6
(Based on R
)
q
JL
T =
85
°
C
A
1
TC M
G
Operating Junction and Storage
T
e
mperature
T ,
STG
−
55 to
150
°
C
J
SC
−
88/SOT
−
363
CASE 419B
G
T
STYLE 28
Source Current (Body Diode)
N
−
Ch
P
−
Ch
I
0.63
−
0.775
260
A
S
1
S1 G1 D2
Lead
T
e
mperature for Soldering Purposes
(1/8” from case for 10 s)
T
°
C
L
TC
M
G
= Device Code
= Date Code
= Pb
−
Free Package
Junction
−
to
−
Ambient
Typ
Max
Typ
R
400
460
194
226
°
C/W
q
JA
(Note: Microdot may be in either location)
– Steady State
Junction
−
to
−
Lead (Drain)
R
q
JL
ORDERING INFORMATION
See detailed ordering and shipping information in the package
– Steady State
Max
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface
mounted on FR4 board using 1 oz Cu area = 0.9523 in sq.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
May, 2019
−
Rev. 2
NTJD4105C/D
NTJD4105C
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
J
Parameter
Symbol N/P
Test Condition
Min
Typ
Max
Units
OFF CHARACTERISTICS
Drain
−
to
−
Source
V
N
P
N
I
= 250
m
A
=
−
250
m
A
20
−
8.0
27
−
10.5
22
V
(BR)DSS
D
V
GS
= 0 V
Breakdown Voltage
I
D
Drain
−
to
−
Source Breakdown
Voltage
T
e
mperature Coeffi-
cient
V
mV/
°
C
(BR)DSS
/ T
J
P
−
6.0
Zero Gate Voltage Drain Cur-
rent
I
m
A
m
A
N
P
N
P
V
= 0
V
, V
=
1
6 V
= 0
V
, V
=
−
6.4 V
DS
1.0
1.0
10
DSS
GSS
GS
DS
T =
25
°
C
J
V
GS
Gate
−
to
−
Source
I
V
GS
=
12 V
8.0
V
DS
= 0 V
Leakage Current
V
GS
=
10
Gate Threshold Voltage
V
V
−
mV/
°
C
W
N
P
N
P
N
P
N
P
P
N
P
I
= 250
m
A
=
−
250
m
A
0.6
−
0.45
0.92
−
0.83
−
2.1
2.2
0.29
0.22
0.36
0.32
0.51
2.0
1.5
−
1.0
GS(TH)
D
V
= V
DS
GS
I
D
Gate Threshold
V
/
GS(TH)
T
e
mperature Coefficient
T
J
Drain
−
to
−
Source On Resist-
ance
R
DS(on)
V
= 4.5 V I
= 0.63 A
=
−
4.5
V
, I
=
−
0.57 A
D
= 2.5
V
, I
=
0
.40 A
=
−
2.5
V
, I
=
−
0.48 A
D
=
−
1.8
V
, I
=
−
0.20 A
= 4.0 V I
= 0.63 A
=
−
4.0
V
, I
=
−
0.57 A
0.375
0.30
0.445
0.46
GS
D
V
V
V
V
GS
GS
D
GS
0.90
GS
D
Forward Transconductance
g
FS
S
V
DS
D
V
2.0
DS
D
CHARGES AND CAPACITANCES
Input Capacitance
C
pF
N
P
N
P
N
P
N
P
N
P
N
P
N
P
V
= 20 V
=
−
8.0V
= 20 V
=
−
8.0 V
= 20 V
=
−
8.0 V
33
160
13
38
2.8
28
1.3
2.2
0.1
0.1
0.2
0.5
0.4
0.5
46
225
22
55
5.0
40
ISS
DS
V
DS
Output Capacitance
C
OSS
C
RSS
V
DS
f = 1 MHz, V
= 0 V
GS
V
DS
Reverse Transfer Capacitance
T
o
tal Gate Charge
V
DS
V
DS
Q
nC
V
GS
= 4.5
V
, V
=
1
0 V, I
= 0.7 A
3.0
4.0
G(TOT)
DS
D
V
GS
=
−
4.5
V
, V
=
−
5.0
V
, I
=
−
0.6 A
DS D
Threshold Gate Charge
Gate
−
to
−
Source Charge
Gate
−
to
−
Drain Charge
Q
G(TH)
V
GS
= 4.5
V
, V
=
1
0 V, I
= 0.7 A
DS D
V
V
V
=
−
4.5
V
, V
=
−
5.0
V
, I
=
−
0.6 A
DS D
GS
Q
V
GS
= 4.5
V
, V
=
1
0 V, I
= 0.7 A
DS D
GS
GD
=
−
4.5
V
, V
=
−
5.0
V
, I
=
−
0.6 A
GS
DS
D
Q
V
GS
= 4.5
V
, V
=
1
0 V, I
= 0.7 A
DS D
=
−
4.5
V
, V
=
−
5.0
V
, I
=
−
0.6 A
GS
DS
D
N
m
s
Turn
−
On Delay Time
Rise Time
Turn
−
Off Delay Time
Fall Time
Turn
−
On Delay Time
Rise Time
Turn
−
Off Delay Time
Fall Time
t
0.083
0.227
0.786
0.506
0.013
0.023
0.050
0.036
d(ON)
t
r
V
= 4.5
V
, V
=
1
0
V
,
DD
GS
D
I
= 0.5 A, R
= 20
W
t
G
d(OFF)
t
f
P
t
d(ON)
t
r
V
=
−
4.5
V
, V
=
−
4.0
V
,
DD
GS
I
=
−
0.5 A, R
= 8.0
W
t
D
G
d(OFF)
t
f
DRAIN
−
SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
V
N
P
N
P
N
P
I
= 0.23 A
0.76
0.76
0.63
0.63
0.410
0.078
1.1
1.1
SD
S
V
= 0
V
, T
=
2
5
°
C
J
GS
I
I
I
=
−
0.23 A
= 0.23 A
=
−
0.23 A
= 0.23 A
=
−
0.23 A
S
I
S
V
GS
= 0
V
, T
=
1
25
°
C
J
S
Reverse Recovery Time
t
m
s
I
S
RR
V
IS
= 0
V
,
GS
t
d /d
= 90 A/
m
s
S
2. Pulse
T
e
st: pulse width
≤
300
m
s, duty cycle
≤
2%.
3. Switching
characteristics are independent of operating junction temperatures.
2
NTJD4105C
TYPICAL N
−
CHANNEL PERFORMANCE CURVES
(T =
25
°
C unless otherwise noted)
J
1.4
1.2
1
1.2
V
= 4.5 V to 2.2 V
= 2 V
GS
T =
25
°
C
J
V
DS
≥
10 V
V
GS
1
0.8
0.6
0.4
1.8 V
1.6 V
0.8
0.6
0.4
T =
125
°
C
J
1.4 V
1.2 V
0.2
0
25
°
C
0.2
0
T =
−
55
°
C
J
0
2
4
6
8
10
0
0.4
0.8
1.2
1.6
2
2.4
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (VOLTS)
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (VOLTS)
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
0.7
0.6
0.5
0.4
0.3
0.2
0.7
0.6
0.5
0.4
0.3
0.2
V
GS
= 4.5 V
V
GS
= 2.5 V
T =
125
°
C
J
T =
125
°
C
J
T =
25
°
C
J
T =
25
°
C
J
T =
−
55
°
C
J
T =
−
55
°
C
J
0.1
0
0.1
0
0
0.2
0.4
0.6
0.8
1
1.2
1.4
0
0.2
0.4
I DRAIN
CURRENT (AMPS)
D,
0.6
0.8
1
1.2
1.4
I
DRAIN CURRENT (AMPS)
D,
Figure 4. On
−
Resistance vs. Drain Current and
Figure 3. On
−
Resistance vs. Drain Current and
Temperature
Temperature
2
80
60
40
I
V
= 0.63 A
= 4.5 V
T =
25
°
C
D
J
1.8
1.6
1.4
1.2
1
GS
V
GS
= 0 V
and 2.5 V
C
iss
20
0
C
C
oss
0.8
0.6
rss
−
50
−
25
0
25
50
75
100
125 150
0
5
10
15
20
T , JUNCTION TEMPERATURE (
°
C)
J
DRAIN
−
TO
−
SOURCE VOLTAGE (VOLTS)
Figure 5. On
−
Resistance Variation with
Figure 6. Capacitance Variation
Temperature
3
NTJD4105C
TYPICAL N
−
CHANNEL PERFORMANCE CURVES
(T =
25
°
C unless otherwise noted)
J
0.7
5
4
Q
V
GS
= 0 V
G(TOT)
0.6
0.5
0.4
0.3
0.2
V
GS
3
2
Q
Q
GD
GS
1
0
T =
150
°
C
J
I
= 0.63 A
0.1
0
D
T =
25
°
C
T =
25
°
C
J
J
0
0.2
0.4
0.6
0.8
1
1.2
1.4
0
0.2
0.4
0.6
0.8
1
Q ,
TOTAL GATE CHARGE (nC)
g
V
SD
, SOURCE
−
TO
−
DRAIN VOLTAGE (VOLTS)
Figure 7. Gate
−
to
−
Source and
Drain
−
to
−
Source Voltage vs. Total Charge
Figure 8. Diode Forward Voltage vs. Current
4
NTJD4105C
TYPICAL P
−
CHANNEL PERFORMANCE CURVES
(T =
25
°
C unless otherwise noted)
J
1.4
1.2
1
1.4
V
=
−
4.5 V to
−
2.6 V
=
−
2.2 V
GS
T =
25
°
C
J
V
DS
≥
−
10 V
V
GS
1.2
1
−
1.8 V
−
1.6 V
−
2 V
0.8
0.6
0.4
0.8
0.6
0.4
T =
125
°
C
J
−
1.4 V
−
1.2 V
25
°
C
0.2
0
0.2
0
T =
−
55
°
C
J
0
2
4
6
8
0
0.4
0.8
1.2
1.6
2
2.4
−
V ,
GATE
−
TO
−
SOURCE VOLTAGE (VOLTS)
GS
−
V ,
DRAIN
−
TO
−
SOURCE VOLTAGE (VOLTS)
DS
Figure 9. On
−
Region Characteristics
Figure 10. Transfer Characteristics
0.5
0.4
0.3
0.2
0.5
0.4
0.3
0.2
V
GS
=
−
4.5 V
V
GS
=
−
2.5 V
T =
125
°
C
J
T =
25
°
C
J
T =
125
°
C
J
T =
−
55
°
C
J
T =
25
°
C
J
T =
−
55
°
C
J
0.1
0
0.1
0
0
0.2
0.4
0.6
0.8
1
1.2
1.4
0
0.2
0.4
0.6
0.8
1
1.2
1.4
−
I DRAIN
CURRENT (AMPS)
D,
−
I DRAIN
CURRENT (AMPS)
D,
Figure 12. On
−
Resistance vs. Drain Current
Figure 11. On
−
Resistance vs. Drain Current
and Temperature
and Temperature
1.6
1.4
1.2
1
300
240
180
120
T =
25
°
C
I
V
=
−
0.7 A
J
D
=
−
4.5 V
V
GS
= 0 V
GS
and
−
2.5 V
C
iss
C
oss
0.8
0.6
60
0
C
rss
−
50
−
25
0
25
50
75
100
125 150
−
8
−
6
−
4
−
2
0
T , JUNCTION TEMPERATURE (
°
C)
J
GATE
−
TO
−
SOURCE OR DRAIN
−
TO
−
SOURCE
VOLTAGE (VOLTS)
Figure 13. On
−
Resistance Variation with
Figure 14. Capacitance Variation
Temperature
5
NTJD4105C
TYPICAL P
−
CHANNEL PERFORMANCE CURVES
(T =
25
°
C unless otherwise noted)
J
0.7
5
4
Q
V
GS
= 0 V
G(TOT)
0.6
0.5
0.4
0.3
0.2
V
GS
3
2
Q
Q
GD
GS
1
0
T =
150
°
C
J
I
=
−
0.6 A
0.1
0
D
T =
25
°
C
T =
25
°
C
J
J
0
0.4
0.8
1.2
1.6
2
2.4
0
0.2
0.4
0.6
0.8
1
Q ,
TOTAL GATE CHARGE (nC)
g
−
V ,
SOURCE
−
TO
−
DRAIN VOLTAGE (VOLTS)
SD
Figure 15. Gate
−
to
−
Source and
Drain
−
to
−
Source Voltage vs. Total Charge
Figure 16. Diode Forward Voltage vs. Current
6
NTJD4105C
ORDERING INFORMATION
Device
†
Package
Shipping
NTJD4105CT1
SOT
−
363
3000 /
T
a
pe & Reel
3000 /
T
a
pe & Reel
NTJD4105CT1G
SOT
−
363
(Pb
−
Free)
NTJD4105CT2
SOT
−
363
3000 /
T
a
pe & Reel
3000 /
T
a
pe & Reel
NTJD4105CT2G
SOT
−
363
(Pb
−
Free)
NTJD4105CT4
SOT
−
363
10,000 /
T
a
pe & Reel
10,000 /
T
a
pe & Reel
NTJD4105CT4G
SOT
−
363
(Pb
−
Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC
−
88/SC70
−
6/SOT
−
363
CASE 419B
−
02
ISSUE Y
1
DATE 11 DEC 2012
SCALE 2:1
2X
aaa H
D
NOTES:
D
H
1. DIMENSIONING
AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING
DIMENSION: MILLIMETERS.
A
3. DIMENSIONS
D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS
D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS
A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS
b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TI
P
.
7. DIMENSION
b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM
MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOO
T
.
D
GAGE
PLANE
6
1
5
2
4
3
L
L2
E1
E
DETAIL A
aaa
C
2X
2X 3 TIPS
bbb H
D
e
MILLIMETERS
DIM MIN
NOM MAX
−−−
INCHES
MIN
−−−
NOM MAX
−−−
0.043
−−−
0.004
6X
b
B
TOP VIEW
A
−−−
−−−
1.10
A1
0.00
A2
0.70
0.10 0.000
M
ddd
C A-B D
0.90
0.20
0.15
2.00
2.10
1.25
0.65 BSC
0.36
1.00 0.027 0.035 0.039
0.25 0.006 0.008 0.010
0.22 0.003 0.006 0.009
2.20 0.070 0.078 0.086
2.20 0.078 0.082 0.086
1.35 0.045 0.049 0.053
0.026 BSC
b
C
D
E
0.15
0.08
1.80
2.00
A2
DETAIL A
A
E1
1.15
e
L
0.26
0.46 0.010 0.014 0.018
0.006 BSC
L2
0.15 BSC
0.15
aaa
bbb
ccc
ddd
0.006
0.012
0.004
0.004
0.30
0.10
0.10
6X
ccc C
A1
SEATING
PLANE
c
C
SIDE VIEW
END VIEW
GENERIC
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT*
6
6X
0.30
XXXM
G
6X
0.66
G
1
2.50
XXX =
Specific Device Code
M
= Date Code*
G
= Pb
−
Free Package
0.65
(Note: Microdot may be in either location)
PITCH
*Date Code orientation and/or position may
vary depending upon manufacturing location.
DIMENSIONS: MILLIMETERS
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLES ON PAGE 2
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC
−
88/SC70
−
6/SOT
−
363
PAGE 1 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
SC
−
88/SC70
−
6/SOT
−
363
CASE 419B
−
02
ISSUE Y
DATE 11 DEC 2012
STYLE 1:
PIN 1.
EMITTER 2
2. BASE
2
STYLE 2:
CANCELLED
STYLE 3:
CANCELLED
STYLE 4:
STYLE 5:
STYLE 6:
PIN 1.
ANODE 2
2. N/C
PIN 1.
CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
PIN 1.
ANODE
2. ANODE
3. COLLECTOR
1
4. EMITTER
1
5. BASE
1
3. COLLECTOR
3. CATHODE
1
4. ANODE
1
5. N/C
4. EMITTER
5. BASE
6. COLLECTOR
2
6. ANODE
6. CATHODE
6. CATHODE
2
STYLE 7:
STYLE 8:
CANCELLED
STYLE 9:
STYLE 10:
STYLE 11:
STYLE 12:
PIN 1.
SOURCE 2
2. DRAIN
2
3. GATE
1
PIN 1.
EMITTER 2
2. EMITTER
1
3. COLLECTOR
1
4. BASE
1
PIN 1.
SOURCE 2
2. SOURCE
1
3. GATE
1
PIN 1.
CATHODE 2
2. CATHODE
2
3. ANODE
1
PIN 1.
ANODE 2
2. ANODE
2
3. CATHODE
1
4. ANODE
1
5. ANODE
1
6. CATHODE
2
4. SOURCE
1
5. DRAIN
1
6. GATE
2
4. DRAIN
1
5. DRAIN
2
6. GATE
2
4. CATHODE
1
5. CATHODE
1
6. ANODE
2
5. BASE
2
6. COLLECTOR
2
STYLE 13:
PIN 1.
ANODE
2. N/C
STYLE 14:
PIN 1.
VREF
2. GND
STYLE 15:
STYLE 16:
STYLE 17:
STYLE 18:
PIN 1.
VIN1
2. VCC
PIN 1.
ANODE 1
2. ANODE
2
PIN 1.
BASE 1
2. EMITTER
2
3. COLLECTOR
2
4. BASE
2
PIN 1.
BASE 1
2. EMITTER
1
3. COLLECTOR
2
4. BASE
2
3. COLLECTOR
4. EMITTER
5. BASE
3. GND
3. ANODE
3
3. VOUT2
4. VIN2
5. GND
6. VOUT1
4. IOUT
5. VEN
6. VCC
4. CATHODE
3
5. CATHODE
2
6. CATHODE
1
5. EMITTER
1
6. COLLECTOR
1
5. EMITTER
2
6. COLLECTOR
1
6. CATHODE
STYLE 19:
PIN 1.
I OUT
2. GND
STYLE 20:
STYLE 21:
PIN 1.
ANODE 1
2. N/C
STYLE 22:
PIN 1.
D1 (i)
2. GND
STYLE 23:
PIN 1.
Vn
2. CH1
3. Vp
STYLE 24:
PIN 1.
CATHODE
2. ANODE
PIN 1.
COLLECTOR
2. COLLECTOR
3. BASE
3. GND
3. ANODE
2
4. CATHODE
2
5. N/C
3. D2
(i)
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
4. V
CC
4. EMITTER
5. COLLECTOR
6. COLLECTOR
4. D2
(c)
5. VBUS
6. D1
(c)
4. N/C
5. V
EN
5. CH2
6. N/C
6. V
REF
6. CATHODE
1
STYLE 30:
STYLE 25:
STYLE 26:
PIN 1.
SOURCE 1
2. GATE
1
STYLE 27:
PIN 1.
BASE 2
2. BASE
1
STYLE 28:
PIN 1.
DRAIN
2. DRAIN
3. GATE
STYLE 29:
PIN 1.
ANODE
2. ANODE
PIN 1.
SOURCE 1
2. DRAIN
2
3. DRAIN
2
4. SOURCE
2
5. GATE
1
PIN 1.
BASE 1
2. CATHODE
3. COLLECTOR
2
4. BASE
2
3. DRAIN
2
4. SOURCE
2
5. GATE
2
3. COLLECTOR
1
4. EMITTER
1
5. EMITTER
2
6. COLLECTOR
2
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
4. SOURCE
5. DRAIN
6. DRAIN
5. EMITTER
6. COLLECTOR
1
6. DRAIN
1
6. DRAIN
1
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC
−
88/SC70
−
6/SOT
−
363
PAGE 2 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
onsemi
,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “
onsemi
” or its affiliates
and/or subsidiaries in the United States and/or other countries.
onsemi
owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of
onsemi
’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
.
onsemi
reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as
−
is” and
onsemi
makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does
onsemi
assume any liability arising out of the application or use
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and applications using
onsemi
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onsemi
. “Typical” parameters which may be provided in
onsemi
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onsemi
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under any of its intellectual property rights nor the rights of others.
onsemi
products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use
onsemi
products for any such unintended or unauthorized application, Buyer shall indemnify and hold
onsemi
and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
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onsemi
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:
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