onsemi-NTJD5121NT1G
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NTJD5121N
Power MOSFET
60
V
,
2
95 mA, Dual N
−
Channel with ESD
Protection, SC
−
88
Features
•
Low R
DS(on)
•
Low Gate Threshold
•
Low Input Capacitance
•
ESD Protected Gate
•
This is a Pb
−
Free Device
V
R
MAX
I Max
D
(BR)DSS
DS(on)
1.6
W
@ 10 V
2.5
W
@ 4.5 V
295 mA
60 V
Applications
•
Low Side Load Switch
•
DC
−
DC Converters (Buck and Boost Circuits)
SC
−
88 (SOT
−
363)
S
1
G
1
D
2
1
2
3
6
D
1
MAXIMUM RATINGS
(T =
25
°
C unless otherwise stated)
J
Parameter
Drain
−
to
−
Source Voltage
Symbol
Value
60
Unit
V
5
G
2
V
DSS
Gate
−
to
−
Source Voltage
V
GS
20
V
Continuous Drain
Current (Note
1)
Steady T
= 25
°
C
I
D
295
212
304
219
250
mA
A
4
S
2
State
T =
85
°
C
A
t
≤
5 s
T =
25
°
C
A
T
o
p View
T =
85
°
C
A
MARKING DIAGRAM &
PIN ASSIGNMENT
D1 G2 S2
Power Dissipation
(Note 1)
Steady T
= 25
°
C
P
D
mW
A
State
t
≤
5 s
266
900
6
1
Pulsed Drain Current
t =
10
m
s
p
I
mA
DM
TF M
G
SC
−
88/SOT
−
363
CASE 419B
STYLE 26
Operating Junction and Storage
T
e
mperature
T , T
−
55 to
°
C
J
STG
G
150
Source Current (Body Diode)
I
S
210
260
mA
1
S1 G1 D2
= Device Code
= Date Code
= Pb
−
Free Package
Lead
T
e
mperature for Soldering Purposes
(1/8” from case for 10 s)
°
C
T
L
TF
M
G
Gate
−
Source ESD Rating (HBM)
ESD
2000
V
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
(Note: Microdot may be in either location)
ORDERING INFORMATION
THERMAL RESISTANCE RATINGS
†
Device
Package
Shipping
Parameter
Symbol
Value
500
Unit
NTJD5121NT1G
SC
−
88
(Pb
−
Free)
3000 /
T
a
pe & Reel
3000 /
T
a
pe & Reel
Junction
−
to
−
Ambient – Steady State
Junction
−
to
−
Ambient – t
≤
5 s
R
°
C/W
q
JA
R
470
NTJD5121NT2G
SC
−
88
q
JA
(Pb
−
Free)
1. Surface
mounted on FR4 board using 1 in sq pad size
(Cu area = 1.127 in sq [2 oz] including traces).
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our
T
a
pe and Reel Packaging Specification
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
May, 2013
−
Rev. 4
NTJD5121N/D
NTJD5121N
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise stated)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain
−
to
−
Source Breakdown Voltage
V
V
GS
= 0
V
, I
= 250
m
A
60
V
(BR)DSS
D
Drain
−
to
−
Source Breakdown Voltage
T
e
mperature Coefficient
V
/T
J
I =
250
m
A, ref to 25
°
C
D
92
mV/
°
C
(BR)DSS
Zero Gate Voltage Drain Current
I
V
= 0
V
,
T =
25
°
C
1.0
500
10
m
A
m
A
DSS
GS
DS
J
V
= 60 V
T =
125
°
C
J
Gate
−
to
−
Source Leakage Current
Gate Threshold Voltage
I
V
= 0
V
, V
= 20
V
GSS
DS
GS
V
V
= V
, I
= 250
m
A
1.0
1.7
4.0
2.5
V
GS(TH)
GS
DS
D
Negative Threshold
T
e
mperature
Coefficient
V
/T
J
mV/
°
C
GS(TH)
Drain
−
to
−
Source On Resistance
R
V
= 10 V, I
= 500 mA
1.0
1.2
80
1.6
2.5
W
S
DS(on)
GS
D
V
GS
= 4.5 V, I
= 200 mA
D
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
g
FS
V
= 5
V
, I
= 200 mA
DS
D
C
26
4.4
2.5
0.9
0.2
0.3
0.28
pF
ISS
V
= 0
V
, f =
1
.0 MHz,
GS
Output Capacitance
C
C
OSS
RSS
V
DS
= 20 V
Reverse Transfer Capacitance
T
o
tal Gate Charge
Q
nC
ns
V
G(TOT)
Threshold Gate Charge
Gate
−
to
−
Source Charge
Gate
−
to
−
Drain Charge
Q
G(TH)
V
GS
= 4.5
V
, V
= 25 V,
DS
I
D
= 200 mA
Q
GS
GD
Q
Turn
−
On Delay Time
Rise Time
t
t
22
34
34
32
d(on)
t
r
V
D
= 4.5
V
, V
= 25 V,
GS
DD
I
= 200 mA, R
= 25
W
G
Turn
−
Off Delay Time
Fall Time
d(off)
t
f
DRAIN
−
SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
V
GS
= 0
V
,
T =
25
°
C
J
0.8
0.7
1.2
I =
200 mA
S
T =
85
°
C
J
2. Pulse
T
e
st: pulse width
≤
300
m
s, duty cycle
≤
2%.
3. Switching
characteristics are independent of operating junction temperatures.
2
NTJD5121N
TYPICAL PERFORMANCE CURVES
(T =
25
°
C unless otherwise noted)
J
1.6
1.2
0.8
0.4
0
1.2
T =
25
°
C
J
V
GS
= 10
5 V
4.5 V
4.2 V
V
DS
≥
10 V
1
0.8
0.6
0.4
0.2
0
4 V
3.8 V
3.6 V
3.4 V
3.2 V
2.4 V
2.2 V
3 V
2.8 V
2.6 V
25
°
C
T =
125
°
C
J
−
55
°
C
0
1
2
3
4
5
0
1
2
3
4
5
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
2.4
2
2.4
2
V
GS
= 4.5 V
V
GS
= 10 V
T =
125
°
C
J
T =
85
°
C
T =
125
°
C
J
J
1.6
1.2
0.8
0.4
0
1.6
1.2
0.8
0.4
0
T =
85
°
C
J
T =
25
°
C
J
T =
25
°
C
J
T =
−
55
°
C
J
T =
−
55
°
C
J
0
0.2
0.4
0.6
0.8
1
0
0.2
0.4
0.6
0.8
1
I
D,
DRAIN CURRENT (A)
I
D,
DRAIN CURRENT (A)
Figure 3. On
−
Resistance vs. Drain Current and
Figure 4. On
−
Resistance vs. Drain Current and
Temperature
Temperature
2.4
2
1.8
1.6
1.4
1.2
1
I
V
= 0.2 A
D
= 4.5 V and 10 V
GS
I
= 500 mA
D
1.6
1.2
0.8
4.5 V
10 V
I
D
= 200 mA
4
0.8
0.6
2
6
8
10
−
50
−
25
0
25
50
75
100
125 150
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
T , JUNCTION TEMPERATURE (
°
C)
J
Figure 5. On
−
Resistance versus
Gate
−
to
−
Source Voltage
Figure 6. On
−
Resistance Variation with
Temperature
3
NTJD5121N
TYPICAL PERFORMANCE CURVES
(T =
25
°
C unless otherwise noted)
J
40
30
20
10
0
5
T =
25
°
C
GS
J
V
I
= 0.2 A
D
= 0 V
T =
25
°
C
V
J
4
3
2
1
0
= 25 V
DD
C
iss
C
oss
C
rss
0
4
8
12
16
20
0
0.2
0.4
0.6
0.8
1
DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Q ,
TOTAL GATE CHARGE (nC)
g
Figure 7. Capacitance Variation
Figure 8. Gate
−
to
−
Source and
Drain
−
to
−
Source Voltage vs. Total Charge
1
V
GS
= 0 V
0.1
T =
85
°
C
J
T =
25
°
C
J
0.01
0.4
0.6
0.8
1
1.2
V
SD
, SOURCE
−
TO
−
DRAIN VOLTAGE (V)
Figure 9. Diode Forward Voltage vs. Current
4
NTJD5121N
PACKAGE DIMENSIONS
SC
−
88/SC70
−
6/SOT
−
363
CASE 419B
−
02
ISSUE Y
2X
aaa H
D
NOTES:
D
H
1. DIMENSIONING
AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING
DIMENSION: MILLIMETERS.
A
3. DIMENSIONS
D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS
D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS
A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS
b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TI
P
.
7. DIMENSION
b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM
MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOO
T
.
D
GAGE
PLANE
6
1
5
4
3
L
L2
E1
E
DETAIL A
2
aaa
C
2X
2X 3 TIPS
bbb H
D
e
MILLIMETERS
DIM MIN
NOM MAX
−−−
INCHES
MIN
−−−
NOM MAX
−−−
0.043
−−−
0.004
6X
b
B
A
−−−
−−−
1.10
A1
0.00
A2
0.70
0.10 0.000
M
ddd
C A-B D
TOP VIEW
0.90
0.20
0.15
2.00
2.10
1.25
0.65 BSC
0.36
1.00 0.027 0.035 0.039
0.25 0.006 0.008 0.010
0.22 0.003 0.006 0.009
2.20 0.070 0.078 0.086
2.20 0.078 0.082 0.086
1.35 0.045 0.049 0.053
0.026 BSC
b
C
D
E
0.15
0.08
1.80
2.00
A2
DETAIL A
A
E1
1.15
e
L
0.26
0.46 0.010 0.014 0.018
0.006 BSC
L2
0.15 BSC
0.15
aaa
bbb
ccc
ddd
0.006
0.012
0.004
0.004
0.30
0.10
0.10
6X
ccc C
A1
SEATING
PLANE
c
C
STYLE 26:
SIDE VIEW
END VIEW
PIN 1.
SOURCE 1
2. GATE
1
3. DRAIN
2
RECOMMENDED
SOLDERING FOOTPRINT*
4. SOURCE
2
5. GATE
2
6. DRAIN
1
6X
0.30
6X
0.66
2.50
0.65
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).
SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
. SCILLC
reserves the right to make changes without further notice to any products herein.
SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time.
All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
SCILLC
does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur.
Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part.
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PUBLICATION ORDERING INFORMATION
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T
:
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o
ll Free
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NTJD5121N/D
