onsemi-NTJS3157NT1G

Part #onsemi-NTJS3157NT1G
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onsemi-NTJS3157NT1G
NTJS3157N  

MOSFET

– Powe
r
,
S
ingle,  
N-Channel,
T
rench, SC-88  
20
V
,
4
.0 A  
Features  
•
Leading Trench Technology for Low R  
•
Fast Switching for Increased Circuit Efficiency  
•
SC
−
88 Small Outline (2 x 2 mm) for Maximum Circuit Board  
Utilization, Same as SC
−
70
−
6  
Extending Battery Life  
DS(ON)  
V
R
Typ  
I Max  
D
(BR)DSS  
DS(on)  
45 m
W
@ 4.5 V  
55 m
W
@ 2.5 V  
70 m
W
@ 1.8 V  
4.0 A  
20 V  
•
These are Pb
−
Free Devices  
Applications  
SC
−
88 (SOT
−
363)  
•
DC
−
DC Conversion  
•
Low Side Load Switch  
•
Cell Phones, Computing, Digital Cameras, MP3s and PDAs  
D
D
G
1
6
5
4
D
D
S
MAXIMUM RATINGS
(T =
 
25
°
C unless otherwise stated)  
J
2
3
Parameter  
Drain
−
to
−
Source Voltage  
Symbol Value  
Unit  
V
V
20  
8.0  
3.2  
2.3  
4.0  
1.0  
DSS  
Gate
−
to
−
Source Voltage  
V
V
GS  
Continuous Drain  
T =
 
25
°
C  
I
D
A
A
Steady  
State  
T
o
p View  
T =
 
85
°
C  
A
t
≤
5 s
 
T =
 
25
°
C  
A
MARKING DIAGRAM &  
PIN ASSIGNMENT  
Power Dissipation  
Steady  
State  
P
W
D
T =
 
25
°
C  
A
D
D
S
Pulsed Drain Current  
t =
 
10
m
s  
p
I
10  
A
DM  
6
1
Operating Junction and Storage
T
e
mperature  
T ,  
STG  
−
55 to  
150  
°
C  
J
T92 M
G  
T
SOT
−
363  
CASE 419B  
STYLE 28  
G
Source Current (Body Diode)  
I
S
1.6  
A
1
Lead
T
e
mperature for Soldering Purposes  
(1/8” from case for 10 s)  
260  
°
C  
T
L
D
D
G
THERMAL RESISTANCE RATINGS

T92  
M
G
= Device Code  
= Date Code  
= Pb
−
Free Package  
Parameter  
Symbol  
Max  
125  
80  
Unit  
Junction
−
to
−
Ambient – Steady State  
Junction
−
to
−
Ambient
−
t
≤
5 s  
Junction
−
to
−
Lead – Steady State  
R
°
C/W  
q
JA  
(Note: Microdot may be in either location)  
R
q
JA  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
R
45  
q
JL  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. Surface
 
mounted on FR4 board using 1 in sq pad size  
(Cu area = 1.127 in sq [1 oz] including traces).  
©
Semiconductor Components Industries, LLC, 2013  
1
Publication Order Number:  
May, 2019
−
Rev. 3  
NTJS3157N/D  
 

NTJS3157N  
ELECTRICAL CHARACTERISTICS
(T =
 
25
°
C unless otherwise stated)  
J
Parameter  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Drain
−
to
−
Source Breakdown Voltage  
V
V
V
= 0
V
, I
 
= 250
m
A  
20  
V
(BR)DSS  
GS  
D
Drain
−
to
−
Source Breakdown Voltage  
V
/T  
12  
mV/
°
C  
(BR)DSS  
J
= 0
V
, I
 
= 250
m
A  
GS  
D
T
e
mperature Coefficient  
Zero Gate Voltage Drain Current  
I
T =
 
25
°
C  
1.0  
5.0  
100  
m
A  
DSS  
J
V
= 0
V
,  
GS  
DS  
V
= 16 V  
T =
 
85
°
C  
J
Gate
−
to
−
Source Leakage Current  
ON CHARACTERISTICS

Gate Threshold Voltage  
I
V
= 0
V
, V  
=
8.0 V  
nA  
GSS  
DS  
GS  
V
0.40  
1.0  
V
GS(TH)  
V
GS  
= V
 
, I
 
= 250
m
A  
DS D  
Negative Threshold
T
e
mperature  
Coefficient  
V
/T  
−
4.0  
mV/
°
C  
GS(TH)  
J
Drain
−
to
−
Source On Resistance  
R
V
= 4.5 V, I
 
= 4.0 A  
45  
55  
70  
9.0  
60  
70  
85  
m
W  
DS(on)  
GS  
GS  
GS  
D
V
= 2.5 V, I
 
= 3.6 A  
D
V
= 1.8 V, I
 
= 2.0 A  
D
Forward Transconductance  
CHARGES AND CAPACITANCES  
Input Capacitance  
g
FS  
V
= 10 V, I
 
= 3.2 A  
S
GS  
D
C
500  
75  
pF  
ISS  
V
GS  
= 0
V
, f =
1
.0 MHz,  
Output Capacitance  
C
OSS  
RSS  
V
DS  
= 10 V  
Reverse Transfer Capacitance  
T
o
tal Gate Charge  
C
60  
Q
6.9  
1.0  
1.8  
15  
nC  
ns  
G(TOT)  
V
V
= 4.5 V, V
 
= 10 V,  
DS  
GS  
Gate
−
to
−
Source Charge  
Gate
−
to
−
Drain Charge  
Q
Q
GS  
I
D
= 3.2 A  
GD  
SWITCHING CHARACTERISTICS

Turn
−
On Delay Time  
Rise Time  
t
6.0  
12  
21  
11  
15  
25  
45  
25  
d(on)  
t
r
= 4.5 V, V
 
= 10 V,  
GS  
DD  
I
D
= 0.5 A, R
 
= 6.0
W  
G
Turn
−
Off Delay Time  
Fall Time  
t
d(off)  
t
f
DRAIN
−
SOURCE DIODE CHARACTERISTICS  
Forward Diode Voltage  
V
SD  
V
S
=0
V
,  
T =
 
25
°
C  
J
0.7  
1.0  
V
GS  
I =
 
1.6 A  
Reverse Recovery Time  
Charge Time  
t
15  
12  
ns  
RR  
T
a
V
GS  
= 0
V
, dI
 
/dt = 100 A/
m
s,  
S
I =
 
1.6 A  
S
Discharge Time  
T
3.0  
5.0  
b
Reverse Recovery Charge  
Q
nC  
RR  
2. Pulse
 
T
e
st: pulse width
≤
300
m
s, duty cycle
≤
2%.  
3. Switching
 
characteristics are independent of operating junction temperatures.  
2
 

NTJS3157N  
TYPICAL PERFORMANCE CURVES
(T =
 
25
°
C unless otherwise noted)  
J
10  
8
12  
V
DS  
≥
10 V  
V
GS  
= 1.8 V  
1.6 V  
8 V  
4 V  
2 V  
10  
8
T =
 
25
°
C  
J
6
6
1.4 V  
4
4
1.2 V  
1 V  
25
°
C  
2
0
0.8 V  
T =
 
−
55
°
C  
J
2
0
T =
 
125
°
C  
J
0
1
2
3
4
5
6
7
8
9
10  
0
0.5  
1
1.5  
2
2.5  
3
V
GS  
, GATE
−
TO
−
SOURCE VOLTAGE (VOLTS)  
V
DS  
, DRAIN
−
TO
−
SOURCE VOLTAGE (VOLTS)  
Figure 1. On
−
Region Characteristics  
Figure 2. Transfer Characteristics  
0.25  
0.2  
0.1  
0.09  
0.08  
0.07  
0.06  
0.05  
T =
 
25
°
C  
J
I
= 4 A  
D
T =
 
25
°
C  
J
0.15  
0.1  
V
GS  
= 1.8 V  
V
V
= 2.5 V  
= 4.5 V  
GS  
0.05  
0
0.04  
0.03  
GS  
1
3
5
7
1
2
3
4
5
6
7
8
9
V
GS  
, GATE
−
TO
−
SOURCE VOLTAGE (VOLTS)  
I
D,  
DRAIN CURRENT (AMPS)  
Figure 4. On
−
Resistance vs. Drain Current and  
Figure 3. On
−
Resistance vs. Gate
−
to
−
Source  
Gate Voltage  
Voltage  
1.8  
10000  
1000  
100  
I
V
= 4.0 A  
V
GS  
= 0 V  
D
= 4.5 V  
GS  
1.6  
1.4  
1.2  
1
T =
 
150
°
C  
J
T =
 
100
°
C  
J
0.8  
0.6  
−
50  
−
25  
0
25  
50  
75  
100  
125 150  
2
4
6
8
10  
12  
14  
16  
18  
20  
V
DS  
, DRAIN
−
TO
−
SOURCE VOLTAGE (VOLTS)  
T , JUNCTION TEMPERATURE (
°
C)  
J
Figure 5. On
−
Resistance Variation with  
Figure 6. Drain
−
to
−
Source Leakage Current  
Temperature  
vs. Voltage  
3

NTJS3157N  
TYPICAL PERFORMANCE CURVES
(T =
 
25
°
C unless otherwise noted)  
J
1400  
1200  
1000  
800  
5
10  
8
V
= 0 V  
V
GS  
= 0 V  
DS  
T =
 
25
°
C  
Q
G(TOT)  
J
C
iss  
4
3
2
V
DS  
V
GS  
6
4
Q
Q
GD  
600  
GS  
C
iss  
C
rss  
400  
1
0
2
0
I
= 3.2 A  
200  
0
D
C
oss  
T =
 
25
°
C  
J
C
rss  
8
4
0
4
8
12  
16  
20  
0
1
2
3
4
5
6
7
8
V
GS  
V
DS  
Q ,
 
TOTAL GATE CHARGE (nC)  
g
Figure 8. Gate
−
to
−
Source and  
Drain
−
to
−
Source Voltage vs. Total Charge  
GATE
−
TO
−
SOURCE OR DRAIN
−
TO
−
SOURCE  
VOLTAGE (VOLTS)  
Figure 7. Capacitance Variation  
6
5
4
3
2
100  
t
d(off)  
V
= 10 V  
= 0.5 A  
= 4.5 V  
V
= 0 V  
DS  
GS  
t
t
f
I
D
T =
 
25
°
C  
J
V
GS  
r
10  
t
d(on)  
1
0
1
1
10  
R ,
 
GATE RESISTANCE (OHMS)  
100  
0.2  
0.3  
0.4  
, SOURCE
−
TO
−
DRAIN VOLTAGE (VOLTS)  
SD  
0.5  
0.6  
0.7  
0.8  
0.9  
1
V
G
Figure 9. Resistive Switching Time Variation  
vs. Gate Resistance  
Figure 10. Diode Forward Voltage vs. Current  
4

NTJS3157N  
ORDERING INFORMATION  
Device  
†
Package  
Shipping  
NTJS3157NT1G  
SC
−
88  
(Pb
−
Free)  
3000 /
T
a
pe & Reel  
3000 /
T
a
pe & Reel  
NTJS3157NT2G  
SC
−
88  
(Pb
−
Free)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging  
Specifications Brochure, BRD8011/D.  
5

MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
SC
−
88/SC70
−
6/SOT
−
363  
CASE 419B
−
02  
ISSUE Y  
1
DATE 11 DEC 2012  
SCALE 2:1  
2X  
aaa H  
D
NOTES:  
D
H
1. DIMENSIONING
 
AND TOLERANCING PER ASME Y14.5M, 1994.  
2. CONTROLLING
 
DIMENSION: MILLIMETERS.  
A
3. DIMENSIONS
 
D AND E1 DO NOT INCLUDE MOLD FLASH,  
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-  
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.  
4. DIMENSIONS
 
D AND E1 AT THE OUTERMOST EXTREMES OF  
THE PLASTIC BODY AND DATUM H.  
5. DATUMS
 
A AND B ARE DETERMINED AT DATUM H.  
6. DIMENSIONS
 
b AND c APPLY TO THE FLAT SECTION OF THE  
LEAD BETWEEN 0.08 AND 0.15 FROM THE TI
P
.  
7. DIMENSION
 
b DOES NOT INCLUDE DAMBAR PROTRUSION.  
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN  
EXCESS OF DIMENSION b AT MAXIMUM
 
MATERIAL CONDI-  
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER  
RADIUS OF THE FOO
T
.  
D
GAGE  
PLANE  
6
1
5
2
4
3
L
L2  
E1  
E
DETAIL A  
aaa  
C
2X  
2X 3 TIPS  
bbb H  
D
e
MILLIMETERS  
DIM MIN
 
NOM MAX  
−−−  
INCHES  
MIN  
−−−  
NOM MAX  
−−−
0.043  
−−−
0.004  
6X
b  
B
TOP VIEW  
A
−−−  
−−−  
1.10  
A1
0.00  
A2
0.70  
0.10 0.000  
M
ddd  
C A-B D  
0.90  
0.20  
0.15  
2.00  
2.10  
1.25  
0.65 BSC  
0.36  
1.00 0.027 0.035 0.039  
0.25 0.006 0.008 0.010  
0.22 0.003 0.006 0.009  
2.20 0.070 0.078 0.086  
2.20 0.078 0.082 0.086  
1.35 0.045 0.049 0.053  
0.026 BSC  
b
C
D
E
0.15  
0.08  
1.80  
2.00  
A2  
DETAIL A  
A
E1
1.15  
e
L
0.26  
0.46 0.010 0.014 0.018  
0.006 BSC  
L2  
0.15 BSC  
0.15  
aaa  
bbb  
ccc  
ddd  
0.006  
0.012  
0.004  
0.004  
0.30  
0.10  
0.10  
6X  
ccc C  
A1  
SEATING  
PLANE  
c
C
SIDE VIEW  
END VIEW  
GENERIC  
MARKING DIAGRAM*  
RECOMMENDED  
SOLDERING FOOTPRINT*  
6
6X  
0.30  
XXXM
G  
6X  
0.66  
G
1
2.50  
XXX =
 
Specific Device Code  
M
= Date Code*  
G
= Pb
−
Free Package  
0.65  
(Note: Microdot may be in either location)  
PITCH  
*Date Code orientation and/or position may  
vary depending upon manufacturing location.  
DIMENSIONS: MILLIMETERS  
*For additional information on our Pb
−
Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
Pb
−
Free indicator, “G” or microdot “
G
”, may  
or may not be present. Some products may  
not follow the Generic Marking.  
STYLES ON PAGE 2  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions
 
are uncontrolled
 
except when stamped
 
“CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASB42985B  
SC
−
88/SC70
−
6/SOT
−
363  
PAGE 1 OF 2  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically  
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the  
rights of others.  
©
Semiconductor Components Industries, LLC, 2019  

SC
−
88/SC70
−
6/SOT
−
363  
CASE 419B
−
02  
ISSUE Y  
DATE 11 DEC 2012  
STYLE 1:  
PIN 1.
 
EMITTER 2  
2. BASE
 
2  
STYLE 2:  
CANCELLED  
STYLE 3:  
CANCELLED  
STYLE 4:  
STYLE 5:  
STYLE 6:  
PIN 1.
 
ANODE 2  
2. N/C  
PIN 1.
 
CATHODE  
2. CATHODE  
3. COLLECTOR  
4. EMITTER  
5. BASE  
PIN 1.
 
ANODE  
2. ANODE  
3. COLLECTOR
 
1  
4. EMITTER
 
1  
5. BASE
 
1  
3. COLLECTOR  
3. CATHODE
 
1  
4. ANODE
 
1  
5. N/C  
4. EMITTER  
5. BASE  
6. COLLECTOR
 
2  
6. ANODE  
6. CATHODE  
6. CATHODE
 
2  
STYLE 7:  
STYLE 8:  
CANCELLED  
STYLE 9:  
STYLE 10:  
STYLE 11:  
STYLE 12:  
PIN 1.
 
SOURCE 2  
2. DRAIN
 
2  
3. GATE
 
1  
PIN 1.
 
EMITTER 2  
2. EMITTER
 
1  
3. COLLECTOR
 
1  
4. BASE
 
1  
PIN 1.
 
SOURCE 2  
2. SOURCE
 
1  
3. GATE
 
1  
PIN 1.
 
CATHODE 2  
2. CATHODE
 
2  
3. ANODE
 
1  
PIN 1.
 
ANODE 2  
2. ANODE
 
2  
3. CATHODE
 
1  
4. ANODE
 
1  
5. ANODE
 
1  
6. CATHODE
 
2  
4. SOURCE
 
1  
5. DRAIN
 
1  
6. GATE
 
2  
4. DRAIN
 
1  
5. DRAIN
 
2  
6. GATE
 
2  
4. CATHODE
 
1  
5. CATHODE
 
1  
6. ANODE
 
2  
5. BASE
 
2  
6. COLLECTOR
 
2  
STYLE 13:  
PIN 1.
 
ANODE  
2. N/C  
STYLE 14:  
PIN 1.
 
VREF  
2. GND  
STYLE 15:  
STYLE 16:  
STYLE 17:  
STYLE 18:  
PIN 1.
 
VIN1  
2. VCC  
PIN 1.
 
ANODE 1  
2. ANODE
 
2  
PIN 1.
 
BASE 1  
2. EMITTER
 
2  
3. COLLECTOR
 
2  
4. BASE
 
2  
PIN 1.
 
BASE 1  
2. EMITTER
 
1  
3. COLLECTOR
 
2  
4. BASE
 
2  
3. COLLECTOR  
4. EMITTER  
5. BASE  
3. GND  
3. ANODE
 
3  
3. VOUT2  
4. VIN2  
5. GND  
6. VOUT1  
4. IOUT  
5. VEN  
6. VCC  
4. CATHODE
 
3  
5. CATHODE
 
2  
6. CATHODE
 
1  
5. EMITTER
 
1  
6. COLLECTOR
 
1  
5. EMITTER
 
2  
6. COLLECTOR
 
1  
6. CATHODE  
STYLE 19:  
PIN 1.
 
I OUT  
2. GND  
STYLE 20:  
STYLE 21:  
PIN 1.
 
ANODE 1  
2. N/C  
STYLE 22:  
PIN 1.
 
D1 (i)  
2. GND  
STYLE 23:  
PIN 1.
 
Vn  
2. CH1  
3. Vp  
STYLE 24:  
PIN 1.
 
CATHODE  
2. ANODE  
PIN 1.
 
COLLECTOR  
2. COLLECTOR  
3. BASE  
3. GND  
3. ANODE
 
2  
4. CATHODE
 
2  
5. N/C  
3. D2
 
(i)  
3. CATHODE  
4. CATHODE  
5. CATHODE  
6. CATHODE  
4. V
 
CC  
4. EMITTER  
5. COLLECTOR  
6. COLLECTOR  
4. D2
 
(c)  
5. VBUS  
6. D1
 
(c)  
4. N/C  
5. V
 
EN  
5. CH2  
6. N/C  
6. V
 
REF  
6. CATHODE
 
1  
STYLE 30:  
STYLE 25:  
STYLE 26:  
PIN 1.
 
SOURCE 1  
2. GATE
 
1  
STYLE 27:  
PIN 1.
 
BASE 2  
2. BASE
 
1  
STYLE 28:  
PIN 1.
 
DRAIN  
2. DRAIN  
3. GATE  
STYLE 29:  
PIN 1.
 
ANODE  
2. ANODE  
PIN 1.
 
SOURCE 1  
2. DRAIN
 
2  
3. DRAIN
 
2  
4. SOURCE
 
2  
5. GATE
 
1  
PIN 1.
 
BASE 1  
2. CATHODE  
3. COLLECTOR
 
2  
4. BASE
 
2  
3. DRAIN
 
2  
4. SOURCE
 
2  
5. GATE
 
2  
3. COLLECTOR
 
1  
4. EMITTER
 
1  
5. EMITTER
 
2  
6. COLLECTOR
 
2  
3. COLLECTOR  
4. EMITTER  
5. BASE/ANODE  
6. CATHODE  
4. SOURCE  
5. DRAIN  
6. DRAIN  
5. EMITTER  
6. COLLECTOR
 
1  
6. DRAIN
 
1  
6. DRAIN
 
1  
Note: Please refer to datasheet for  
style callout. If style type is not called  
out in the datasheet refer to the device  
datasheet pinout or pin assignment.  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions
 
are uncontrolled
 
except when stamped
 
“CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASB42985B  
SC
−
88/SC70
−
6/SOT
−
363  
PAGE 2 OF 2  
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