onsemi-NTLUS4C12NTAG
| Part # | onsemi-NTLUS4C12NTAG |
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NTLUS4C12N
N-Channel,
m
Cool, UDFN6,
2.0×2.0x0.55 mm
30
V
,
1
0.7 A
MOSFET
Features
•
Low Profile UDFN 2.0 x 2.0 x 0.55 mm for Board Space Saving with
Exposed Drain Pads for Excellent Thermal Conduction
V
R
MAX
I MAX
D
(BR)DSS
DS(on)
•
Ultra Low R
to Reduce Conduction Losses
DS(on)
9 m
W
@ 10 V
12 m
W
@ 4.5 V
15 m
W
@ 3.7 V
19 m
W
@ 3.3 V
•
Optimized Gate Charge to Reduce Switching Losses
•
Low Capacitance to Minimize Driver Losses
30 V
10.7 A
•
These Devices are Pb
−
Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
D
•
Power Load Switch
•
Synch DC
−
DC Converters
•
Wireless Charging Circuit
G
MAXIMUM RATINGS
(T =
25
°
C unless otherwise stated)
J
Parameter
Drain-to-Source Voltage
Gate-to-Source Voltage
Symbol
Value
30
Unit
V
S
V
DSS
N
−
CHANNEL MOSFET
V
GS
20
V
S
MARKING DIAGRAM
Continuous Drain
Steady
T =
25
°
C
I
10.7
7.7
A
A
D
D
State
1
T =
85
°
C
A
UDFN6
AGM
G
(
m
COOL
]
)
t
≤
5 s
T =
25
°
C
A
15.1
1.54
G
CASE 517BG
Pin 1
Power Dissipa-
Steady
State
T =
25
°
C
A
P
W
A
D
AG = Specific Device Code
M =
Date Code
t
≤
5 s
T =
25
°
C
A
3.1
6.8
4.9
0.63
43
G
= Pb
−
Free Package
Continuous Drain
Steady
State
T =
25
°
C
A
I
D
(Note: Microdot may be in either location)
T =
85
°
C
A
PIN CONNECTIONS
Pulsed Drain Current
T =
25
°
C
A
P
W
A
D
t =
10
m
s
p
I
DM
MOSFET Operating Junction and Storage
T
e
mperature
T ,
STG
-55 to
150
°
C
J
D
D
G
1
2
3
6
5
4
D
D
S
T
D
I
S
1.55
260
A
Lead
T
e
mperature for Soldering Purposes
(1/8
″
from case for 10 s)
T
L
°
C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Surface
Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[2 oz] including traces).
S
(
T
o
p View)
2. Surface-mounted
on FR4 board using the minimum recommended pad size,
2 oz. Cu.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
©
Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
May, 2019
−
Rev. 1
NTLUS4C12N/D
NTLUS4C12N
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
81
Unit
R
θJA
R
40.5
200
°
C/W
θJA
R
θJA
3. Surface-mounted
on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).
4. Surface-mounted
on FR4 board using the minimum recommended pad size, 2 oz. Cu.
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
OFF CHARACTERISTICS
Drain-to-Source Breakdown Voltage
V
V
GS
= 0
V
, I
=
2
50
m
A
30
V
(BR)DSS
D
Drain-to-Source Breakdown Voltage
T
e
mperature Coefficient
V
/T
J
I =
250
m
A, ref to 25
°
C
D
12
mV/
°
C
(BR)DSS
Zero Gate Voltage Drain Current
I
V
= 0
V
,
= 24 V
m
A
T =
25
°
C
1.0
10
DSS
GS
DS
J
V
T =
125
°
C
J
Gate-to-Source Leakage Current
Gate Threshold Voltage
I
V
= 0
V
, V
=
GS
20 V
100
nA
GSS
DS
V
V
= V
, I
= 250
m
A
1.3
2.1
V
GS(TH)
GS
DS
D
Negative Threshold
T
e
mp. Coefficient
Drain-to-Source On Resistance
V
/T
4.8
7.2
9.3
10.9
13
mV/
°
C
m
W
GS(TH)
J
R
V
= 10
V
, I
=
9
.0 A
9
DS(on)
GS
GS
GS
GS
D
V
V
V
= 4.5
V
, I
=
8
.0 A
12
15
19
D
= 3.7
V
, I
=
5
.0 A
D
= 3.3
V
, I
=
5
.0 A
D
Forward Transconductance
g
FS
V
DS
= 15
V
, I
=
9
.0 A
39
S
D
CHARGES, CAPACITANCES & GATE RESISTANCE
pF
Input Capacitance
C
1172
546
26
ISS
V
= 0
V
, f = 1
M
Hz,
DS
GS
Output Capacitance
Reverse Transfer Capacitance
T
o
tal Gate Charge
C
OSS
C
RSS
V
= 15 V
nC
Q
8.4
1.1
3.0
2.2
18
G(TOT)
Threshold Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
T
o
tal Gate Charge
Q
G(TH)
V
V
= 4.5
V
, V
=
1
5 V;
DS
GS
I
D
= 8.0 A
Q
GS
GD
Q
Q
= 10
V
, V
=
1
5 V;
nC
ns
G(TOT)
GS
DS
= 9.0 A
I
D
Turn-On Delay Time
Rise Time
t
9.4
15
d(ON)
t
r
V
= 4.5
V
, V
=
1
5
V
,
DD
GS
I
D
= 8.0 A, R
= 3
W
G
Turn-Off Delay Time
Fall Time
t
14
d(OFF)
t
3.5
f
ns
Turn-On Delay Time
Rise Time
t
6.3
14
d(ON)
t
r
V
= 10
V
, V
=
1
5
V
,
DD
GS
D
I
= 9.0 A, R
= 3
W
G
Turn-Off Delay Time
Fall Time
t
18
d(OFF)
t
f
2.4
6.
Switching characteristics are independent of operating junction temperatures.
2
NTLUS4C12N
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
V
DRAIN-SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
T =
25
°
C
0.72
0.52
29
1.1
J
V
S
= 0
V
,
= 1.5 A
GS
I
T =
125
°
C
J
ns
Reverse Recovery Time
Charge Time
t
RR
t
t
14.1
14.9
20
a
V
= 0
V
,
d
Is/dt = 100 A/
m
s,
GS
I
S
= 1.5 A
Discharge Time
b
Reverse Recovery Charge
Q
nC
RR
5. Pulse
T
e
st: pulse width
≤
300
m
s, duty cycle
≤
2%.
6. Switching
characteristics are independent of operating junction temperatures.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
TYPICAL CHARACTERISTICS
25
20
15
10
35
30
25
20
15
10
3.2
−
10 V
3.0 V
V
DS
= 5 V
V
GS
= 2.8 V
2.6 V
T =
25
°
C
J
T =
125
°
C
J
T =
25
°
C
J
2.4 V
2.2 V
5
0
5
0
T =
−
55
°
C
J
2.0 V
0
0.5
1.0
1.5
2.0
2.5
3.0
1.0
1.5
2.0
2.5
3.0
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
21
19
17
15
13
11
17
15
13
11
9
T =
25
°
C
J
T =
25
°
C
D
J
I
= 9 A
V
= 3.3 V
GS
V
V
= 3.7 V
= 4.5 V
GS
GS
V
= 10 V
GS
7
5
9
7
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
I ,
DRAIN CURRENT (A)
D
Figure 3. On
−
Resistance vs. Gate
−
to
−
Source
Figure 4. On
−
Resistance vs. Drain Current and
Voltage
Gate Voltage
3
NTLUS4C12N
TYPICAL CHARACTERISTICS
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
10,000
V
= 10 V
= 9 A
GS
T =
150
°
C
J
I
D
1000
T =
125
°
C
J
100
10
T =
85
°
C
J
0.7
0.6
−
50
−
25
V
GS
= 0 V
0
25
50
75
100
125 150
5
10
15
20
25
30
T , JUNCTION TEMPERATURE (
°
C)
J
V
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
DS
Figure 5. On
−
Resistance Variation with
Figure 6. Drain
−
to
−
Source Leakage Current
Temperature
vs. Voltage
1800
1600
1400
10
8
T =
25
°
C
GS
J
V
Q
T
= 0 V
C
iss
1200
1000
800
6
C
oss
4
Q
Q
gd
gs
600
T =
25
°
C
J
V
V
= 10 V
= 15 V
= 8 A
400
GS
DD
2
0
200
0
I
D
C
rss
0
5
10
15
20
25
30
0
2
4
6
8
10
12
14
16
18
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Q ,
TOTAL GATE CHARGE (nC)
g
Figure 7. Capacitance Variation
Figure 8. Gate
−
to
−
Source and
Drain
−
to
−
Source Voltage vs. Total Charge
1000
100
1.4
1.2
1.0
0.8
0.6
0.4
V
= 15 V
= 15 A
= 10 V
DD
V
= 0 V
GS
I
D
V
GS
t
t
d(off)
t
f
r
t
d(on)
10
1
T =
125
°
C
J
T =
25
°
C
J
0.2
0
1
10
R ,
GATE RESISTANCE (
W
)
100
0.4
0.5
, SOURCE
−
TO
−
DRAIN VOLTAGE (V)
SD
0.6
0.7
0.8
V
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
4
NTLUS4C12N
TYPICAL CHARACTERISTICS
100
10
1
10
m
s
100
m
s
1 ms
10 ms
dc
0 V < V
< 10 V
GS
T =
25
°
C
A
Single Pulse Response
0.1
R
Limit
DS(on)
Thermal Limit
Package Limit
0.01
0.01
0.1
1
10
100
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
100
10
1
50% Duty Cycle
20%
10%
5%
2%
1%
0.1
Single Pulse
0.01
0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 12. Thermal Response
DEVICE ORDERING INFORMATION
Device
†
Package
Shipping
NTLUS4C12NTAG
UDFN6
3000 /
T
a
pe & Reel
3000 /
T
a
pe & Reel
(Pb
−
Free)
NTLUS4C12NTBG
UDFN6
(Pb
−
Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
m
Cool is a trademark of Semiconductor Components Industries, LLC (SCILLC).
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
UDFN6 2×2, 0.65P
CASE 517BG
−
01
ISSUE A
DATE 04 FEB 2010
SCALE 4:1
NOTES:
1. DIMENSIONING
AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING
DIMENSION: MILLIMETERS.
3. DIMENSION
b APPLIES TO PLATED TERMINAL AND IS
MEASURED BETWEEN 0.15 AND 0.30 mm FROM TERMINAL.
4. COPLANARITY
APPLIES TO THE EXPOSED PAD AS WELL AS
THE TERMINALS.
1. CENTER
TERMINAL LEAD IS OPTIONAL. CENTER TERMINAL
IS CONNECTED TO TERMINAL LEAD # 4.
2. LEADS
1, 2, 5 AND 6 ARE TIED TO THE FLAG.
D
A
B
E
EXPOSED Cu
MOLD CMPD
PIN ONE
REFERENCE
PLATING
DETAIL B
OPTIONAL
CONSTRUCTIONS
MILLIMETERS
0.10
C
DIM
A
MIN
0.45
0.00
MAX
0.55
0.05
A1
A3
b
0.10
C
0.13 REF
L
L
TOP VIEW
0.25
0.51
0.35
0.61
b1
D
A
DETAIL B
2.00 BSC
L1
1.00
1.20
1.30
D2
E
A3
0.10
C
2.00 BSC
DETAIL A
1.10
E2
e
OPTIONAL
0.65 BSC
CONSTRUCTIONS
K
0.15 REF
0.27 BSC
0.65 BSC
0.08
C
A1
J
NOTE 4
J1
L
SEATING
PLANE
C
0.20
0.30
0.10
0.30
SIDE VIEW
L1
—
0.20
L2
D2
DETAIL A
GENERIC
MARKING DIAGRAM*
e
6X
L
L2
1
3
1
b1
XXM
G
0.10
0.05
C
C
A
B
G
E2
NOTE 5
XX =
Specific Device Code
M
= Date Code
(Note: Microdot may be in either location)
6
4
K
6X
b
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”,
may or may not be present.
J
J1
0.10
0.05
C
C
A
B
NOTE 3
BOTTOM VIEW
RECOMMENDED
MOUNTING FOOTPRINT
2.30
1.10
6X
0.35
6X
0.43
1
0.60
0.35
1.25
0.34
PACKAGE
OUTLINE
0.66
0.65
PITCH
DIMENSIONS: MILLIMETERS
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON48158E
UDFN6 2X2, 0.65P
PAGE 1 OF 1
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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rights of others.
©
Semiconductor Components Industries, LLC, 2019
onsemi
,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “
onsemi
” or its affiliates
and/or subsidiaries in the United States and/or other countries.
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’s product/patent coverage may be accessed at
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−
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.
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−
is” and
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onsemi
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