onsemi-NTMD4184PFR2G
| Part # | onsemi-NTMD4184PFR2G |
Download  | onsemi-NTMD4184PFR2G |
P-Channel, Schottky Diode,
Schottky Barrier Diode
-30
V
,
–
4.0 A, 20
V
,
2
.2ꢀA
NTMD4184PF
Features
•
FETKY
t
Surface Mount Package Saves Board Space
•
Independent Pin
−
Out for MOSFET and Schottky Allowing for
Design Flexibility
P
−
CHANNEL MOSFET
V
R
Max
DS(on)
I
D
Max
(BR)DSS
•
Low R
MOSFET and Low V
Schottky to Minimize
Conduction Losses
DS(on)
F
95 m
W
@
−
10 V
−
30 V
−
4.0 A
165 m
W
@
−
4.5 V
•
Optimized Gate Charge to Minimize Switching Losses
•
This is a Pb
−
Free Device
SCHOTTKY DIODE
V
R
Max
V
F
Max
I Max
F
Applications
20 V
0.58 V
2.2 A
•
Disk Drives
•
DC
−
DC Converters
•
Printers
A
C
S
MOSFET MAXIMUM RATINGS
(T =
25
°
C unless otherwise stated)
J
Rating
Drain
−
to
−
Source Voltage
Gate
−
to
−
Source Voltage
Continuous Drain
Symbol
Value
−
30
20
Unit
V
V
DSS
G
V
GS
V
T =
25
°
C
I
D
−
3.3
−
2.6
1.6
A
A
Current R
q
JA
D
T =
70
°
C
A
Power Dissipation
T =
25
°
C
P
D
W
A
P
−
Channel MOSFET
Schottky Diode
A
R
q
JA
Continuous Drain
T =
25
°
C
I
D
−
2.3
−
1.8
0.77
A
MARKING DIAGRAM
& PIN ASSIGNMENT
q
JA
T =
70
°
C
A
Steady
State
Power Dissipation
T =
25
°
C
P
D
W
A
A
C
C
D
D
R
q
JA
8
Continuous Drain
T =
25
°
C
I
D
−
4.0
−
3.2
2.31
A
4184P
AYWW
G
SOIC
−
8
CASE 751
STYLE 18
Current R
t < 10 s
q
JA
8
T =
70
°
C
A
1
Power Dissipation
T =
25
°
C
P
D
W
A
A
1
R
q
JA
A
A
S
G
Pulsed Drain Current
T =
25
°
C,
t =
10
m
s
I
−
10
A
p
DM
4184P =
Device Code
A
Y
= Assembly Location
=
Y
e
ar
= Work Week
Operating Junction and Storage
T
e
mperature
Source Current (Body Diode)
T , T
−
55 to
+150
°
C
J
STG
WW
G
= Pb
−
Free Package
I
S
−
1.3
A
Lead
T
e
mperature for Soldering Purposes
(1/8
″
from case for 10 s)
T
L
260
°
C
ORDERING INFORMATION
SCHOTTKY MAXIMUM RATINGS
(T =
25
°
C unless otherwise stated)
J
†
Device
NTMD4184PFR2G
Package
Shipping
Peak Repetitive Reverse Voltage
DC Blocking Voltage
V
RRM
20
20
V
V
A
V
R
SOIC
−
8 2500/
T
a
pe
& Reel
(Pb
−
Free)
Average Rectified Forward
Steady
State
I
F
2.2
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our
T
a
pe and Reel Packaging Specification
Brochure, BRD8011/D.
t < 10 s
3.2
©
Semiconductor Components Industries, LLC, 2008
1
Publication Order Number:
September, 2019
−
Rev. 1
NTMD4184PF/D
NTMD4184PF
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter MOSFET & Schottky
Symbol
Max
79
Unit
Junction
−
to
−
FOOT (Drain) Equivalent to R
R
q
JA
R
54
q
JA
°
C/W
R
50
q
q
JC
JF
R
163
q
JA
1. Surface
−
mounted on FR4 board using 1 inch sq pad size, 1 oz Cu.
2. Surface
−
mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
J
Characteristic
OFF CHARACTERISTICS
Symbol
Test Condition
Min
Typ
Max
Unit
Drain
−
to
−
Source Breakdown Voltage
V
V
GS
= 0
V
, I
= 250
m
A
−
30
V
(BR)DSS
D
Drain
−
to
−
Source Breakdown Voltage
T
e
mperature Coefficient
V
/T
J
30
(BR)DSS
mV/
°
C
T =
25
°
C
−
1.0
−
10
100
Zero Gate Voltage Drain Current
I
J
DSS
V
DS
= 0
V
,
GS
m
A
V
=
−
24 V
T =
125
°
C
J
Gate
−
to
−
Source Leakage Current
Gate Threshold Voltage
I
V
= 0
V
, V
=
GS
20 V
nA
GSS
DS
GS
V
V
= V
, I
= 250
m
A
−
1.0
−
3.0
V
GS(TH)
DS
D
Negative Threshold
T
e
mperature Coefficient
Drain
−
to
−
Source On Resistance
V
/T
4.4
70
mV/
°
C
GS(TH)
J
V
=
−
10 V
=
−
4.5 V
I
I
=
−
3.0 A
=
−
1.5 A
95
R
GS
GS
D
DS(on)
m
W
V
120
5.0
165
D
Forward Transconductance
g
FS
V
=
−
1.5
V
, I
=
−
3.0 A
S
DS
D
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
C
280
80
360
110
80
ISS
V
= 0
V
, f =
1
.0 MHz,
DS
GS
Output Capacitance
C
OSS
C
RSS
pF
V
=
−
10 V
Reverse Transfer Capacitance
T
o
tal Gate Charge
52
Q
2.8
0.4
1.1
1.1
5.8
4.2
G(TOT)
Threshold Gate Charge
Gate
−
to
−
Source Charge
Gate
−
to
−
Drain Charge
T
o
tal Gate Charge
Q
G(TH)
V
=
−
4.5
V
, V
=
−
10
V
,
DS
GS
nC
nC
I
D
=
−
3.0 A
Q
GS
GD
Q
Q
V
=
−
10
V
, V
=
−
10
V
,
8.8
G(TOT)
GS
DS
=
−
3.0 A
I
D
Turn
−
On Delay Time
Rise Time
t
7.2
12
15
24
36
6.0
d(ON)
t
r
V
=
−
10
V
, V
=
−
10
V
,
DS
GS
D
ns
I
=
−
1.0 A, R
= 6.0
W
G
Turn
−
Off Delay Time
Fall Time
t
18
d(OFF)
t
f
2.6
DRAIN
−
TO
−
SOURCE CHARACTERISTICS
T =
25
°
C
−
0.8
0.7
12.8
10
−
1.0
V
Forward Diode Voltage
V
J
SD
V
D
= 0 V
GS
I
=
−
1.3 A
T =
125
°
C
J
Reverse Recovery Time
Charge Time
t
RR
ns
nC
t
t
a
V
GS
= 0
V
, d
/
d =
100 A/
m
s,
IS t
I
S
=
−
1.3 A
Discharge Time
2.8
7.4
b
Reverse Recovery Time
Q
RR
2
NTMD4184PF
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
J
Characteristic
Symbol
Test Condition
Min
Typ
Max
Unit
SCHOTTKY DIODE ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
J
Parameter
Symbol
Test Conditions
I =
1.0 A
T =
25
°
C
Min
Typ
0.43
0.35
0.5
Max
0.50
0.39
0.58
0.53
0.02
14
Unit
Maximum Instantaneous
V
F
V
F
J
Forward Voltage
T =
125
°
C
J
I =
2.0 A
F
T =
25
°
C
J
T =
125
°
C
J
0.45
0.001
1.2
Maximum Instantaneous
Reverse Current
I
R
V
R
V
R
= 10 V
= 20 V
T =
25
°
C
mA
J
T =
125
°
C
J
T =
25
°
C
J
0.004
2.0
0.05
18
T =
125
°
C
J
3. Pulse
T
e
st: pulse width
v
300
m
s, duty cycle
v
2%.
4. Switching
characteristics are independent of operating junction temperatures.
TYPICAL CHARACTERISTICS
10
8
10
T =
25
°
C
J
5.0 V
V
GS
= 4.5 V
4.2 V
4.0 V
3.8 V
3.6 V
V
DS
≥
10 V
10 V
8
6
4
6
4
3.4 V
3.2 V
3.0 V
2.8 V
2
0
2
0
T =
25
°
C
T =
125
°
C
J
J
T =
−
55
°
C
2.6 V
J
0
2
4
6
8
10
0
1
2
3
4
5
6
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
0.30
0.25
0.20
0.15
0.25
0.20
0.15
ID = 3 A
T =
25
°
C
J
T =
25
°
C
J
V
V
= 4.5 V
GS
0.10
0.05
0.10
0.05
= 10 V
6
GS
2
4
6
8
10
2
3
4
5
7
8
9
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
I ,
DRAIN CURRENT (A)
D
Figure 3. On
−
Resistance vs. Gate Voltage
Figure 4. On
−
Resistance vs. Drain Current and
Gate Voltage
3
NTMD4184PF
TYPICAL CHARACTERISTICS
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
10,000
V
GS
= 0 V
ID = 3 A
= 10 V
V
GS
1000
T =
150
°
C
J
100
10
T =
125
°
C
J
0.7
0.6
−
50
−
25
0
25
50
75
100
125 150
0
0
0
5
10
15
20
25
30
T , JUNCTION TEMPERATURE (
°
C)
V
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
DS
J
Figure 5. On
−
Resistance Variation with
Figure 6. Drain
−
to
−
Source Leakage Current
Temperature
vs. Voltage
400
350
300
250
200
150
100
10
8
QT
T =
25
°
C
J
V
GS
C
iss
6
Q1
Q2
4
ID = 3 A
C
2
0
oss
50
0
T =
25
°
C
J
C
V
= 0 V
5
rss
GS
0
10
15
20
25
1
2
3
4
5
6
DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Q ,
TOTAL GATE CHARGE (nC)
g
Figure 7. Capacitance Variation
Figure 8. Gate
−
to
−
Source and
Drain
−
to
−
Source Voltage vs. Total Charge
100
10
1
3.0
2.5
2.0
1.5
1.0
V
= 15 V
ID = 1.0 A
= 10 V
DD
V
= 0 V
GS
T =
25
°
C
V
J
GS
t
f
t
d(off)
t
r
t
d(on)
0.5
0
1
10
R ,
GATE RESISTANCE (
W
)
100
0.2
0.4
0.6
0.8
1.0
V
, SOURCE
−
TO
−
DRAIN VOLTAGE (V)
G
SD
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
4
NTMD4184PF
TYPICAL CHARACTERISTICS
1000
100
0.5
0.2
0.1
0.05
10
1
0.02
0.01
0.1
Single Pulse
0.01
0.0000001 0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
1000
1.5
PULSE TIME (sec)
Figure 11. Thermal Response
−
R
q
JA
at Steady State (min pad)
100
10
1
0.5
0.2
0.1
0.05
0.02
0.01
0.1
Single Pulse
0.01
0.001
0.0000001 0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
PULSE TIME (sec)
Figure 12. Thermal Response
−
R
q
JA
at Steady State (1 inch sq pad)
100
10
100
T =
125
°
C
J
10
T =
125
°
C
J
T =
85
°
C
J
T =
25
°
C
J
T =
85
°
C
J
T =
25
°
C
J
1
1
T =
−
55
°
C
J
0.1
0.1
0.1
0.3
0.5
0.7
0.9
1.1
1.3
1.5
0.1
0.3
0.5
0.7
0.9
1.1
1.3
V , INSTANTANEOUS FORWARD VOLTAGE (V)
F
V , MAXIMUM INSTANTANEOUS FORWARD VOLTAGE (V)
F
Figure 13. Typical Forward Voltage
Figure 14. Maximum Forward Voltage
5
NTMD4184PF
TYPICAL CHARACTERISTICS
100E
−
3
10E
−
3
1E
−
3
100E
−
3
10E
−
3
1E
−
3
T =
125
°
C
J
T =
125
°
C
J
T =
85
°
C
J
T =
85
°
C
J
100E
−
6
10E
−
6
100E
−
6
10E
−
6
T =
25
°
C
J
T =
25
°
C
J
1E
−
6
1E
−
6
100E
−
9
100E
−
9
0
10
20
0
10
20
V ,
REVERSE VOLTAGE (V)
R
V ,
REVERSE VOLTAGE (V)
R
Figure 15. Typical Reverse Current
Figure 16. Maximum Reverse Current
1000
T =
25
°
C
J
100
10
0
5
10
15
20
25
V ,
REVERSE VOLTAGE (V)
R
Figure 17. Capacitance
FETKY is a registered trademark of International Rectifier Corporation.
6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC
−
8 NB
CASE 751
−
07
ISSUE AK
8
1
DATE 16 FEB 2011
SCALE 1:1
NOTES:
1. DIMENSIONING
AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING
DIMENSION: MILLIMETER.
3. DIMENSION
A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−
X
−
A
4. MAXIMUM
MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION
D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751
−
01 THRU 751
−
06 ARE OBSOLETE. NEW
STANDARD IS 751
−
07.
S
M
M
Y
B
0.25 (0.010)
1
K
−
Y
−
MILLIMETERS
DIM MIN
MAX
INCHES
G
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N
X 45
_
SEATING
PLANE
1.27 BSC
0.050 BSC
−
Z
−
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
0.10 (0.004)
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
8
1
8
1
8
8
XXXXX
ALYWX
XXXXXX
AYWW
G
XXXXX
ALYWX
XXXXXX
AYWW
1.52
0.060
G
1
1
Discrete
Discrete
(Pb
−
Free)
IC
IC
(Pb
−
Free)
7.0
0.275
4.0
0.155
XXXXX = Specific Device Code
XXXXXX = Specific Device Code
A
L
= Assembly Location
= Wafer Lot
A
= Assembly Location
=
Y
e
ar
Y
Y
W
G
=
Y
e
ar
= Work Week
= Pb
−
Free Package
WW
G
= Work Week
= Pb
−
Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”, may
or may not be present. Some products may
not follow the Generic Marking.
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
STYLES ON PAGE 2
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42564B
SOIC
−
8 NB
PAGE 1 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
SOIC
−
8 NB
CASE 751
−
07
ISSUE AK
DATE 16 FEB 2011
STYLE 1:
STYLE 2:
STYLE 3:
STYLE 4:
PIN 1.
EMITTER
2. COLLECTOR
3. COLLECTOR
4. EMITTER
5. EMITTER
6. BASE
PIN 1.
COLLECTOR, DIE, #1
2. COLLECTOR,
#1
3. COLLECTOR,
#2
4. COLLECTOR,
#2
5. BASE,
#2
PIN 1.
DRAIN, DIE #1
2. DRAIN,
#1
3. DRAIN,
#2
4. DRAIN,
#2
5. GATE,
#2
PIN 1.
ANODE
2. ANODE
3. ANODE
4. ANODE
5. ANODE
6. ANODE
7. ANODE
6. EMITTER,
#2
7. BASE,
#1
6. SOURCE,
#2
7. GATE,
#1
7. BASE
8. EMITTER
8. EMITTER,
#1
8. SOURCE,
#1
8. COMMON
CATHODE
STYLE 5:
STYLE 6:
PIN 1.
SOURCE
2. DRAIN
STYLE 7:
STYLE 8:
PIN 1.
COLLECTOR, DIE #1
2. BASE,
#1
PIN 1.
DRAIN
2. DRAIN
3. DRAIN
4. DRAIN
5. GATE
PIN 1.
INPUT
2. EXTERNAL
BYPASS
3. THIRD
STAGE SOURCE
4. GROUND
5. DRAIN
6. GATE
3
7. SECOND
STAGE Vd
8. FIRST
STAGE Vd
3. DRAIN
3. BASE,
#2
4. SOURCE
5. SOURCE
6. GATE
7. GATE
8. SOURCE
4. COLLECTOR,
#2
5. COLLECTOR,
#2
6. EMITTER,
#2
7. EMITTER,
#1
8. COLLECTOR,
#1
6. GATE
7. SOURCE
8. SOURCE
STYLE 9:
STYLE 10:
PIN 1.
GROUND
2. BIAS
1
STYLE 11:
PIN 1.
SOURCE 1
2. GATE
1
STYLE 12:
PIN 1.
EMITTER, COMMON
2. COLLECTOR,
DIE #1
3. COLLECTOR,
DIE #2
4. EMITTER,
COMMON
5. EMITTER,
COMMON
6. BASE,
DIE #2
PIN 1.
SOURCE
2. SOURCE
3. SOURCE
4. GATE
3. OUTPUT
4. GROUND
5. GROUND
6. BIAS
2
7. INPUT
8. GROUND
3. SOURCE
2
4. GATE
2
5. DRAIN
2
6. DRAIN
2
7. DRAIN
1
8. DRAIN
1
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
7. BASE,
DIE #1
8. EMITTER,
COMMON
STYLE 13:
PIN 1.
N.C.
2. SOURCE
3. SOURCE
4. GATE
STYLE 14:
PIN 1.
N
−
SOURCE
2. N
−
GATE
STYLE 15:
PIN 1.
ANODE 1
2. ANODE
1
STYLE 16:
PIN 1.
EMITTER, DIE #1
2. BASE,
DIE #1
3. P
−
SOURCE
4. P
−
GATE
5. P
−
DRAIN
6. P
−
DRAIN
7. N
−
DRAIN
8. N
−
DRAIN
3. ANODE
1
4. ANODE
1
5. CATHODE,
COMMON
6. CATHODE,
COMMON
7. CATHODE,
COMMON
8. CATHODE,
COMMON
3. EMITTER,
DIE #2
4. BASE,
DIE #2
5. COLLECTOR,
DIE #2
6. COLLECTOR,
DIE #2
7. COLLECTOR,
DIE #1
8. COLLECTOR,
DIE #1
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 17:
PIN 1.
VCC
2. V2OUT
3. V1OUT
4. TXE
STYLE 18:
STYLE 19:
PIN 1.
SOURCE 1
2. GATE
1
STYLE 20:
PIN 1.
ANODE
2. ANODE
3. SOURCE
4. GATE
PIN 1.
SOURCE (N)
2. GATE
(N)
3. SOURCE
(P)
4. GATE
(P)
5. DRAIN
3. SOURCE
2
4. GATE
2
5. DRAIN
2
6. MIRROR
2
7. DRAIN
1
8. MIRROR
1
5. RXE
6. VEE
7. GND
8. ACC
5. DRAIN
6. DRAIN
7. CATHODE
8. CATHODE
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 21:
STYLE 22:
STYLE 23:
STYLE 24:
PIN 1.
CATHODE 1
2. CATHODE
2
3. CATHODE
3
4. CATHODE
4
5. CATHODE
5
6. COMMON
ANODE
7. COMMON
ANODE
8. CATHODE
6
PIN 1.
I/O LINE 1
PIN 1.
LINE 1 IN
PIN 1.
BASE
2. COMMON
CATHODE/VCC
3. COMMON
CATHODE/VCC
4. I/O
LINE 3
5. COMMON
ANODE/GND
6. I/O
LINE 4
7. I/O
LINE 5
8. COMMON
ANODE/GND
2. COMMON
ANODE/GND
3. COMMON
ANODE/GND
4. LINE
2 IN
2. EMITTER
3. COLLECTOR/ANODE
4. COLLECTOR/ANODE
5. CATHODE
6. CATHODE
7. COLLECTOR/ANODE
8. COLLECTOR/ANODE
5. LINE
2 OUT
6. COMMON
ANODE/GND
7. COMMON
ANODE/GND
8. LINE
1 OUT
STYLE 25:
PIN 1.
VIN
2. N/C
STYLE 26:
PIN 1.
GND
2. dv/dt
STYLE 27:
PIN 1.
ILIMIT
2. OVLO
STYLE 28:
PIN 1.
SW_TO_GND
2. DASIC_OFF
3. DASIC_SW_DET
4. GND
3. REXT
4. GND
5. IOUT
6. IOUT
7. IOUT
8. IOUT
3. ENABLE
4. ILIMIT
5. SOURCE
6. SOURCE
7. SOURCE
8. VCC
3. UVLO
4. INPUT+
5. SOURCE
6. SOURCE
7. SOURCE
8. DRAIN
5. V_MON
6. VBULK
7. VBULK
8. VIN
STYLE 30:
PIN 1.
DRAIN 1
2. DRAIN
1
STYLE 29:
PIN 1.
BASE, DIE #1
2. EMITTER,
#1
3. BASE,
#2
3. GATE
2
4. SOURCE
2
5. SOURCE
1/DRAIN 2
6. SOURCE
1/DRAIN 2
7. SOURCE
1/DRAIN 2
8. GATE
1
4. EMITTER,
#2
5. COLLECTOR,
#2
6. COLLECTOR,
#2
7. COLLECTOR,
#1
8. COLLECTOR,
#1
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