onsemi-NTMFS5C645NT1G
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NTMFS5C645N
N-Channel
60
V
,
4
.5 m
W
, 94 A
Features
•
Small Footprint (5×6 mm) for Compact Design
•
Low R
to Minimize Conduction Losses
DS(on)
•
Low Q
and Capacitance to Minimize Driver Losses
G
•
These Devices are Pb
−
Free and are RoHS Compliant
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
60 V
4.5 m
W
@ 10 V
94 A
MAXIMUM RATINGS
(T =
25
°
C unless otherwise noted)
J
Parameter
Drain
−
to
−
Source Voltage
Symbol
Value
60
Unit
V
V
DSS
D (5)
Gate
−
to
−
Source Voltage
V
GS
20
V
Continuous Drain
Current R
T
= 25
°
C
I
94
A
C
D
q
JC
T
C
= 100
°
C
66
Steady
State
G (4)
Power Dissipation
T
C
= 25
°
C
P
80
40
20
W
A
D
R
q
JC
T
C
= 100
°
C
S (1,2,3)
N
−
CHANNEL MOSFET
Continuous Drain
Current R
T =
25
°
C
A
I
D
q
JA
T =
100
°
C
A
14
Steady
State
Power Dissipation
T =
25
°
C
A
P
3.7
1.8
630
W
D
R
q
JA
MARKING
DIAGRAM
T =
100
°
C
A
Pulsed Drain Current
T =
25
°
C, t
= 10
m
s
I
DM
A
A
p
D
1
Operating Junction and Storage
T
e
mperature
T , T
−
55 to
°
C
J
stg
S
S
S
G
D
D
+175
DFN5
(SO
−
8FL)
CASE 488AA
STYLE 1
5C645N
AYWZZ
Source Current (Body Diode)
I
S
88
A
Single Pulse Drain
−
to
−
Source Avalanche
E
AS
185
mJ
D
Energy (I
= 5 A)
L(pk)
5C645N Specific Device Code
Lead
T
e
mperature for Soldering Purposes
T
260
°
C
L
(1/8
″
from case for 10 s)
A
Y
= Assembly Location
=
Y
e
ar
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
W
ZZ
= Work Week
= Lot Traceability
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
Junction
−
to
−
Case
−
Steady State
R
1.9
41
°
C/W
q
JC
R
q
JA
1. The
entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2
2. Surface
−
mounted on FR4 board using a 650 mm
, 2 oz. Cu pad.
3. Maximum
current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
©
Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
May, 2019
−
Rev. 1
NTMFS5C645N/D
NTMFS5C645N
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain
−
to
−
Source Breakdown Voltage
V
V
GS
= 0
V
, I
=
2
50
m
A
60
V
(BR)DSS
D
Drain
−
to
−
Source Breakdown Voltage
T
e
mperature Coefficient
V
/
22.4
(BR)DSS
mV/
°
C
T
J
Zero Gate Voltage Drain Current
I
V
= 0
V
,
T =
25
°
C
10
DSS
GS
DS
J
V
= 60 V
m
A
T =
125
°
C
J
250
100
Gate
−
to
−
Source Leakage Current
Gate Threshold Voltage
I
V
= 0
V
, V
=
2
0 V
nA
GSS
DS
GS
GS
V
V
= V
, I
= 250
m
A
2.0
4.0
4.5
V
GS(TH)
DS
D
Threshold
T
e
mperature Coefficient
Drain
−
to
−
Source On Resistance
V
/T
J
−
8.3
mV/
°
C
m
W
GS(TH)
R
V
GS
= 10 V
I =
50 A
D
3.8
DS(on)
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
C
1510
1100
15
ISS
Output Capacitance
C
V
V
= 0
V
, f = 1
M
Hz, V
= 25 V
pF
OSS
RSS
GS
DS
Reverse Transfer Capacitance
T
o
tal Gate Charge
C
Q
20.4
4.5
G(TOT)
Threshold Gate Charge
Gate
−
to
−
Source Charge
Gate
−
to
−
Drain Charge
Plateau Voltage
Q
G(TH)
nC
V
Q
7.8
= 10
V
, V
=
4
8 V; I
= 50 A
GS
GD
GP
GS
DS
D
Q
V
2.4
5.0
Turn
−
On Delay Time
t
13.2
36.3
27
d(ON)
Rise Time
t
r
V
= 10
V
, V
=
4
8
V
,
DS
GS
D
ns
V
I
= 50 A, R
= 2.5
W
G
Turn
−
Off Delay Time
t
d(OFF)
Fall Time
t
5.8
f
DRAIN
−
SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
T =
25
°
C
0.87
0.76
42.2
20.4
21.8
34
1.2
J
V
S
= 0
V
,
GS
I
= 50 A
T =
125
°
C
J
Reverse Recovery Time
Charge Time
t
RR
t
a
ns
V
= 0
V
,
d
I
/dt = 100 A/
m
s,
S
GS
I
S
= 50 A
Discharge Time
t
b
Reverse Recovery Charge
Q
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse
T
e
st: pulse width
v
300
m
s, duty cycle
v
2%.
5. Switching
characteristics are independent of operating junction temperatures.
2
NTMFS5C645N
TYPICAL CHARACTERISTICS
150
125
100
75
150
10 V to
4.5 V
V
GS
= 6.0 V
V
DS
= 10 V
125
100
75
5.0 V
50
50
4.5 V
T =
25
°
C
J
25
0
25
0
T =
125
°
C
J
T =
−
55
°
C
J
0
0.5
1.0
1.5
2.0
2.5
3.0
0
1
2
3
4
5
6
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
V
GS
, GATE
−
TO
−
SOURCE VOLTAGE (V)
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
14
13
45
40
35
30
25
20
15
10
T =
25
°
C
D
J
T =
25
°
C
J
V
GS
= 4.5 V
I
= 50 A
12
11
10
9
8
7
6
V
= 10 V
45
GS
5
0
5
4
4
5
6
7
8
9
10
5
10
15
20
25
30
35
40
50
V
GS
, GATE VOLTAGE (V)
I ,
DRAIN CURRENT (A)
D
Figure 3. On
−
Resistance vs. Gate
−
to
−
Source
Figure 4. On
−
Resistance vs. Drain Current and
Voltage
Gate Voltage
2.0
100,000
10,000
1000
V
I
= 10 V
= 50 A
GS
1.8
1.6
1.4
1.2
1.0
D
T =
150
°
C
J
T =
125
°
C
J
T =
85
°
C
J
100
10
0.8
0.6
−
50
−
25
0
25
50
75
100
125 150
5
15
25
35
45
55
T , JUNCTION TEMPERATURE (
°
C)
J
V
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
DS
Figure 5. On
−
Resistance Variation with
Figure 6. Drain
−
to
−
Source Leakage Current
Temperature
vs. Voltage
3
NTMFS5C645N
TYPICAL CHARACTERISTICS
10,000
1000
100
10
C
ISS
8
6
4
C
OSS
Q
Q
GD
GS
10
1
V
= 48 V
V
= 0 V
DS
GS
C
2
0
RSS
T =
25
°
C
T =
25
°
C
J
J
I
D
= 50 A
f = 1 MHz
0
10
20
30
40
50
60
0
2
4
6
8
10 12 14 16 18
20
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Q ,
TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate
−
to
−
Source and
Drain
−
to
−
Source Voltage vs. Total Charge
100
100
t
r
t
d(off)
t
d(on)
10
10
t
f
V
= 10 V
= 48 V
T =
125
°
C
J
T =
25
°
C
J
T =
−
55
°
C
J
GS
V
DS
I
D
= 50 A
1
1
1
10
R ,
GATE RESISTANCE (
W
)
100
0.4
0.5
0.6
0.7
0.8
0.9
1.0
V
SD
, SOURCE
−
TO
−
DRAIN VOLTAGE (V)
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
100
10
10
m
s
T
= 25
°
C
J(initial)
10
T
= 25
°
C
C
T
= 100
°
C
J(initial)
Single Pulse
≤
10 V
V
1
GS
0.5 ms
1 ms
10 ms
1
R
Limit
DS(on)
Thermal Limit
Package Limit
0.1
0.1
0.1
1
10
(V)
100
1000
1E
−
04
1E
−
03
TIME IN AVALANCHE (s)
1E
−
02
V
DS
Figure 11. Safe Operating Area
Figure 12. I
PEAK
vs. Time in Avalanche
4
NTMFS5C645N
TYPICAL CHARACTERISTICS
100
10
50% Duty Cycle
20%
10%
5%
2%
1%
2
1
NVMFS5C646NL 650 mm
, 2 oz., Cu Single Layer Pad
0.1
Single Pulse
0.000001 0.00001
0.0001
0.01
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Characteristics
DEVICE ORDERING INFORMATION
Device
†
Marking
Package
Shipping
NTMFS5C645NT1G
5C645N
DFN5
(Pb
−
Free)
1500 /
T
a
pe & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN5 5×6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE N
1
SCALE 2:1
2 X
DATE 25 JUN 2018
NOTES:
1. DIMENSIONING
AND TOLERANCING PER
ASME Y14.5M, 1994.
0.20
C
2. CONTROLLING
DIMENSION: MILLIMETER.
3. DIMENSION
D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
D
A
2
B
E
2 X
D1
MILLIMETERS
0.20
C
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
MIN
0.90
0.00
0.33
0.23
5.00
4.70
3.80
6.00
5.70
3.45
NOM
1.00
−−−
0.41
0.28
5.15
4.90
4.00
6.15
MAX
1.10
0.05
0.51
0.33
5.30
5.10
4.20
6.30
6.10
3.85
4 X
q
E1
2
c
A1
5.90
3.65
1
2
3
4
1.27 BSC
0.575
1.35
0.575
0.125 REF
3.40
0.51
1.20
0.51
0.71
1.50
0.71
TOP VIEW
C
SEATING
DETAIL A
PLANE
0.10
0.10
C
C
3.00
0
3.80
q
−−−
12
A
_
_
GENERIC
SIDE VIEW
MARKING DIAGRAM*
DETAIL A
1
8X
b
A B
XXXXXX
AYWZZ
0.10
0.05
C
c
e/2
e
L
1
4
XXXXXX =
Specific Device Code
A
Y
= Assembly Location
=
Y
e
ar
K
RECOMMENDED
SOLDERING FOOTPRINT*
W
ZZ
= Work Week
= Lot Traceability
E2
2X
PIN 5
M
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “
G
”,
may or may not be present. Some products
may not follow the Generic Marking.
(EXPOSED PAD)
L1
0.495
4.560
2X
1.530
D2
G
2X
BOTTOM VIEW
0.475
3.200
1.330
4.530
STYLE 1:
STYLE 2:
PIN 1.
ANODE
2. ANODE
2X
0.905
PIN 1.
SOURCE
2. SOURCE
3. SOURCE
4. GATE
1
3. ANODE
4. NO
CONNECT
5. CATHODE
0.965
5. DRAIN
4X
1.000
1.270
PITCH
4X
0.750
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON14036D
DFN5 5×6, 1.27P (SO−8FL)
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2018
onsemi
,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “
onsemi
” or its affiliates
and/or subsidiaries in the United States and/or other countries.
onsemi
owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of
onsemi
’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
.
onsemi
reserves the right to make changes at any time to any
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−
is” and
onsemi
makes no warranty, representation or guarantee regarding the accuracy of the
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onsemi
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and applications using
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provided by
onsemi
. “Typical” parameters which may be provided in
onsemi
data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
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under any of its intellectual property rights nor the rights of others.
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onsemi
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PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMEN
T
:
TECHNICAL SUPPORT
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−
282
−
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o
ll Free USA/Canada
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